IXDN402 / IXDI402 / IXDF402

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1 IXD / IXDI / IXDF Ampere Dual Low-Side Ultrafast MOSFET Drivers Features Built using the advantages and compatibility of CMOS and IXYS HDMOS TM processes Latch-Up rotected up to.a High eak Output Current: A eak Wide Operating Range:.V to V - C to + C Extended Operating Temperature Standard High Capacitive Load Drive Capability: pf in <ns Matched Rise And Fall Times Low ropagation Delay Time Low Output Impedance Low Supply Current Two Drivers in Single Chip Applications Driving MOSFETs and IGBTs Motor Controls Line Drivers ulse Generators Local ower O/OFF Switch Switch Mode ower Supplies (SMS) DC to DC Converters ulse Transformer Driver Class D Switching Amplifiers General Description The IXD/IXDI/IXDF consists of two Amp CMOS high speed MOSFET drivers. Each output can source and sink A of peak current while producing voltage rise and fall times of less than ns to drive the latest IXYS MOSFETs & IGBTs. The input of the driver is TTL or CMOS compatible and is fully immune to latch up over the entire operating range. A patent-pending circuit virtually eliminates cross conduction and current shoot-through. Improved speed and drive capabilities are further enhanced by very low and matched rise and fall times. The IXD is configured as a dual non-inverting gate driver, the IXDI as a dual inverting gate driver, and the IXDF as a dual inverting + non-inverting gate driver. The IXD/IXDI/IXDF family are available in the standard pin -DI (I), SOIC- (SIA) and SOIC- (SIA- ) packages. For enhanced thermal performance, the SOIC- and SOIC- are also available with an exposed grounded backmetal package as the SI and SI- respectively. Ordering Information art umber ackage Type Temp. Range Configuration IXDI -in DI IXDSI -in SOIC with Grounded Backmetal IXDSIA -in SOIC - C to Dual on IXDSI- -in SOIC with Grounded Backmetal + C Inverting IXDSIA- -in SOIC IXDII -in DI IXDISI -in SOIC with Grounded Backmetal IXDISIA -in SOIC - C to IXDISI- -in SOIC with Grounded Backmetal + C Dual Inverting IXDISIA- -in SOIC IXDFI -in DI IXDFSI -in SOIC with Grounded Backmetal IXDFSIA -in SOIC - C to Inverting + on IXDFSI- -in SOIC with Grounded Backmetal + C Inverting IXDFSIA- -in SOIC OTE: Mounting or solder tabs on all packages are connected to ground Copyright IXYS CORORATIO First Release DS99B(/)

2 Figure - IXD Dual A on-inverting Gate Driver Functional Block Diagram IXD / IXDI / IXDF Vcc ATI-CROSS CODUCTIO ATI-CROSS CODUCTIO Figure - IXDI Dual Inverting A Gate Driver Functional Block Diagram Vcc ATI-CROSS CODUCTIO ATI-CROSS CODUCTIO Figure - IXDF Inverting + on-inverting A Gate Driver Functional Block Diagram Vcc ATI-CROSS CODUCTIO ATI-CROSS CODUCTIO * atent ending

3 IXD / IXDI / IXDF Absolute Maximum Ratings (ote ) arameter Value Supply Voltage V All Other ins -. V to V CC +. V Junction Temperature o C Storage Temperature - o C to o C Lead Temperature ( sec) o C Thermal Resistance (Junction to Case) (θ JC ) in SOIC (SI) K/W in SOIC (SI-) K/W Electrical Characteristics Unless otherwise noted, T A = o C,.V V CC V. All voltage measurements with respect to. IXDD configured as described in Test Conditions. All specifications are for one channel. Symbol arameter Test Conditions Min Typ Max Units V IH High input voltage.v V CC V V V IL Low input voltage.v V CC V. V V I Input voltage range - V CC +. V I I Input current V V I V CC - µa V OH High output voltage V CC -. V V OL Low output voltage. V R OH Output resistance V CC = V. Output high R OL Output resistance V CC = V. Output Low I EAK eak output current V CC is V A I DC Continuous output A current t R Rise time C L =pf Vcc=V ns t F Fall time C L =pf Vcc=V 9 ns t ODLY On-time propagation C L =pf Vcc=V ns delay t OFFDLY Off-time propagation delay C L =pf Vcc=V ns V CC ower supply voltage. V I CC ower supply current V I =.V V I = V V I = + V CC Specifications Subject To Change Without otice Operating Ratings arameter Value Operating Temperature Range - o C to o C Thermal Resistance (To Ambient) in DI (I) (θ JA ) K/W in SOIC (SIA) K/W in SOIC (SIA-) (θ JA ) K/W θ JA with heat sink ** Heat sink area of cm in SOIC K/W in SOIC-CT K/W Heat sink area of cm in SOIC 9 K/W in SOIC-CT 9 K/W ** Device soldered to metal back pane. Heat sink area is oz. copper on side of." thick FR C board. ma µa µa ote : Operating the device beyond the parameters listed as Absolute Maximum Ratings may cause permanent damage to the device. Typical values indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. The guaranteed specifications apply only for the test conditions listed. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.

4 Electrical Characteristics IXD / IXDI / IXDF Unless otherwise noted, temperature over - o C to o C,.V V CC V. All voltage measurements with respect to. IXDD configured as described in Test Conditions. All specifications are for one channel. Symbol arameter Test Conditions Min Typ Max Units V IH High input voltage.v V CC V. V V IL Low input voltage.v V CC V. V V I Input voltage range - V CC +. V I I Input current V V I V CC - µa V OH High output voltage V CC -. V V OL Low output voltage. V R OH Output resistance V CC = V Output high R OL Output Output Low V CC = V Ω I EAK eak output current V CC = V. A I DC Continuous output A current t R Rise time C L =pf Vcc=V ns t F Fall time C L =pf Vcc=V ns t ODLY On-time propagation C L =pf Vcc=V ns delay t OFFDLY Off-time propagation delay C L =pf Vcc=V ns V CC ower supply voltage. V I CC ower supply current V I =.V V I = V V I = + V CC Specifications Subject To Change Without otice ma µa µa

5 IXD / IXDI / IXDF in Description SYMBOL FUTIO DESCRITIO A Channel Input A Channel Input signal-ttl or CMOS compatible. Ground The system ground pin. Internally connected to all circuitry, this pin provides ground reference for the entire chip. This pin should be connected to a low noise analog ground plane for optimum performance. B Channel Input B Channel Input signal-ttl or CMOS compatible. B Channel Output B Channel Driver output. For application purposes, this pin is connected via a resistor to a gate of a MOSFET/IGBT. Supply Voltage ositive power-supply voltage input. This pin provides power to the entire chip. The range for this voltage is from.v to V. A Channel Output A Channel Driver output. For application purposes, this pin is connected via a resistor to a gate of a MOSFET/IGBT. CAUTIO: These devices are sensitive to electrostatic discharge. Follow proper ESD procedures when handling and assembling this component. Figure - Characteristics Test Diagram Vcc uf V In A Out A Gnd Vcc In B Out B Agilent A Current robe Agilent A Current robe pf pf

6 IXD / IXDI / IXDF Fig. 9 Rise Time vs. Supply Voltage CL = pf to pf Typical erformance Characteristics Fig. Fall Time vs. Supply Voltage CL = pf to pf Rise Time (ns) Supply Voltage (V) pf 9 pf pf pf pf Fall Time (ns) pf 9 pf pf pf pf Supply Voltage (V) Fig. Rise And Fall Times vs. Case Temperature CL = pf, Vcc = V Fig. 9 Output Rise Times vs. Load Capacitance t R V V Time (ns) t F Rise Time (ns) V V V V Fig. 9 Output Fall Times vs. Load Capacitance V Fig.. Max / Min Input vs. Temperature CL = pf Vcc = V V. Fall Times (ns) V V V V Max / Min Input Voltage Minimum Input High Maximum Input Low

7 IXD / IXDI / IXDF Fig. Supply Current vs. Load Capacitance Vcc = V MHz Fig. S upply C urrent vs. Frequency Vcc = V 9 pf 9 pf pf Supply Current (ma) MHz khz Supply Current (ma) pf pf pf. khz khz HkHz. Frequency (khz) Fig. Supply Current vs. Load Capacitance Vcc = V MHz Fig. Supply Current vs. Frequency Vcc = V Supply Current (ma) 9 Mhz khz Supply Current (ma) pf 9 pf pf pf pf pf. Supply Current (ma) khz khz khz Fig. 9 Supply Current vs. Load Capacitance Vcc = V MHz khz MHz khz khz khz Supply Current (ma). Fig.. Frequency (khz) Supply Current vs. Frequency Vcc = V. Frequency (khz) pf 9 pf pf pf pf pf

8 IXD / IXDI / IXDF Fig. Supply Current (ma) 9 Supply Current vs. Load Capacitance Vcc = V MHz MHz khz khz Supply Current (ma) Fig. Supply Current vs. Frequency Vcc = V pf 9 pf pf pf pf khz khz.. Frequency (khz) Fig. 9 ropagation Delay vs. Supply Voltage CL= pf Vin=V@KHz Fig. ropagation Delay vs. Input Voltage CL = pf Vcc = V ropagation Delay (ns) t ODLY t OFFDLY ropagation Delay (ns) t ODLY t OFFDLY Supply Voltage (V) 9 Input Voltage (V) Fig. ropagation Delay Times vs. Temperature CL = pf, Vcc = V Fig.. Quiescent Supply Current vs. Temperature Vcc = V, Vin = V@kHz, CL = pf Time (ns) t ODLY t OFFDLY Quiescent Vcc Input Current (ma)

9 IXD / IXDI / IXDF Fig. Fig. High State Output Resistance vs. Supply Voltage 9 Low State Output Resistance vs. Supply Voltage High State Output Resistance (Ohms) Low State Output Resistance (Ohms) Supply Voltage (V) Supply Voltage (V) Fig. Fig. Vcc vs. Channel Output Current Vcc vs. Channel Output Current Channel Output Current (A) Channel Output Current (A) - Vcc (V) Vcc (V) Fig. Channel Source Output Current vs. Temperature Vcc = V, CL = pf Fig.. Channel Output Current vs. Temperature Vcc = V CL = pf Channel Output Current (A).... Channel Output Current (A)

10 IXD / IXDI / IXDF I COFIGURATIOS V S V S V S IB Lead DI (I) in SOIC (SI) IXD IB Lead DI (I) in SOIC (SI) IXDI IB Lead DI (I) in SOIC (SI) IXDF 9 in SOIC IXDSI- 9 in SOIC IXDISI- 9 in SOIC IXDFSI- Supply Bypassing, Grounding ractices And Output Lead inductance When designing a circuit to drive a high speed MOSFET utilizing the IXD/IXDI/IXDF, it is very important to observe certain design criteria in order to optimize performance of the driver. articular attention needs to be paid to Supply Bypassing, Grounding, and minimizing the Output Lead Inductance. Say, for example, we are using the IXD to charge a pf capacitive load from to volts in ns. Using the formula: I= V C / t, where V=V C=pF & t=ns, we can determine that to charge pf to volts in ns will take a constant current of.a. (In reality, the charging current won t be constant, and will peak somewhere around A). SULY BYASSIG In order for our design to turn the load on properly, the IXD must be able to draw this.a of current from the power supply in the ns. This means that there must be very low impedance between the driver and the power supply. The most common method of achieving this low impedance is to bypass the power supply at the driver with a capacitance value that is an order of magnitude larger than the load capacitance. Usually, this would be achieved by placing two different types of bypassing capacitors, with complementary impedance curves, very close to the driver itself. (These capacitors should be carefully selected and should have low inductance, low resistance and high-pulse current-service ratings). Lead lengths may radiate at high frequency due to inductance, so care should be taken to keep the lengths of the leads between these bypass capacitors and the IXD to an absolute minimum. GROUDIG In order for the design to turn the load off properly, the IXD must be able to drain this.a of current into an adequate grounding system. There are three paths for returning current that need to be considered: ath # is between the IXD and its load. ath # is between the IXD and its power supply. ath # is between the IXD and whatever logic is driving it. All three of these paths should be as low in resistance and inductance as possible, and thus as short as practical. In addition, every effort should be made to keep these three ground paths distinctly separate. Otherwise, the returning ground current from the load may develop a voltage that would have a detrimental effect on the logic line driving the IXD. OUTUT LEAD IDUCTAE Of equal importance to Supply Bypassing and Grounding are issues related to the Output Lead Inductance. Every effort should be made to keep the leads between the driver and its load as short and wide as possible. If the driver must be placed farther than (mm) from the load, then the output leads should be treated as transmission lines. In this case, a twistedpair should be considered, and the return line of each twisted pair should be placed as close as possible to the ground pin of the driver, and connected directly to the ground terminal of the load.

11 IXD / IXDI / IXDF IXYS Corporation Bassett St; Santa Clara, CA 9 Tel: -9-; Fax: sales@ixys.net IXYS Semiconductor GmbH Edisonstrasse ; D-; Lampertheim Tel: +9---; Fax: marcom@ixys.de Directed Energy, Inc. An IXYS Company Research Blvd. Ste., Ft. Collins, CO Tel: 9-9-9; Fax: deiinfo@directedenergy.com

IXDF502 / IXDI502 / IXDN502

IXDF502 / IXDI502 / IXDN502 IXDF / IXDI / IXD Ampere Dual Low-Side Ultrafast MOSFET Drivers Features Built using the advantages and compatibility of CMOS and IXYS HDMOS TM processes Latch-Up Protected up to Amps High A Peak Output