Package Type. IXDD604D2TR 8-Pin DFN Tape & Reel Pin Power SOIC with Exposed Metal Back Tube 100

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1 -Ampere Dual Low-Side Ultrafast MOSFET Drivers Features A Peak Source/Sink Drive Current Wide Operating oltage Range:.5 to 35 - C to +5 C Extended Operating Temperature Range Logic Input Withstands Negative Swing of up to 5 Outputs May be Connected in Parallel for Higher Drive Current Matched Rise and Fall Times Low Propagation Delay Time Low, A Supply Current Low Output Impedance Applications Efficient Power MOSFET and IGBT Switching Switch Mode Power Supplies Motor Controls DC to DC Converters Class-D Switching Amplifiers Pulse Transformer Driver Pb e3 Description The IXDD/IXDF/IXDI/IXDN dual high-speed gate drivers are especially well suited for driving the latest IXYS MOSFETs and IGBTs. Each of the two outputs can source and sink A of peak current while producing voltage rise and fall times of less than ns. The input of each driver is virtually immune to latch up, and proprietary circuitry eliminates cross conduction and current shoot-through. Low propagation delay and fast, matched rise and fall times make the family ideal for high-frequency and high-power applications. The IXDD is a dual non-inverting driver with an enable. The IXDN is a dual non-inverting driver, the IXDI is a dual inverting driver, and the IXDF has one inverting driver and one non-inverting driver. The family is available in a standard 8-pin DIP (PI), 8-pin SOIC (SIA), 8-pin Power SOIC with an exposed metal back (SI), and an 8-pin DFN (D) package. Ordering Information Part Number Logic Configuration Package Type Packing Method Quantity IXDDDTR 8-Pin DFN Tape & Reel IXDDPI ENA 8-Pin DIP Tube 5 IXDDSI A 8-Pin Power SOIC with Exposed Metal Back Tube IXDDSITR ENB 8-Pin Power SOIC with Exposed Metal Back Tape & Reel IXDDSIA B 8-Pin SOIC Tube IXDDSIATR 8-Pin SOIC Tape & Reel IXDFPI 8-Pin DIP Tube 5 IXDFSI A 8-Pin Power SOIC with Exposed Metal Back Tube IXDFSITR 8-Pin Power SOIC with Exposed Metal Back Tape & Reel IXDFSIA B 8-Pin SOIC Tube IXDFSIATR 8-Pin SOIC Tape & Reel IXDIPI 8-Pin DIP Tube 5 IXDISI A 8-Pin Power SOIC with Exposed Metal Back Tube IXDISITR 8-Pin Power SOIC with Exposed Metal Back Tape & Reel IXDISIA B 8-Pin SOIC Tube IXDISIATR 8-Pin SOIC Tape & Reel IXDNPI 8-Pin DIP Tube 5 IXDNSI A 8-Pin Power SOIC with Exposed Metal Back Tube IXDNSITR 8-Pin Power SOIC with Exposed Metal Back Tape & Reel IXDNSIA B 8-Pin SOIC Tube IXDNSIATR 8-Pin SOIC Tape & Reel DS--R5

2 . Specifications Pin Configurations Pin Definitions Absolute Maximum Ratings Recommended Operating Conditions Electrical Characteristics: T A = 5 C Electrical Characteristics: - C < T A < +5 C Thermal Characteristics Performance Timing Diagrams Characteristics Test Diagram Block Diagrams & Truth Tables IXDD IXDI IXDF IXDN Typical Performance Characteristics Manufacturing Information Moisture Sensitivity ESD Sensitivity Reflow Profile Mechanical Dimensions R5

3 Specifications. Pin Configurations. Pin Definitions ENA IXDDPI/SI/SIA 8 ENB ENA IXDDD 8 Pin Name Description A 7 A 7 Channel A Logic Input 3 3 B Channel B Logic Input B 5 IXDIPI/SI/SIA ENB 5 IXDFPI/SI/SIA ENA Channel A Enable Input - Drive pin low to disable Channel A and force Channel A Output to a high impedance state NC 3 A 8 7 NC NC 3 A 8 7 NC ENB Channel B Enable Input - Drive pin low to disable Channel A and force Channel A Output to a high impedance state B 5 B 5 Channel A Output - Sources or sinks current to turn-on or turn-off a discrete MOSFET or IGBT NC IXDNPI/SI/SIA 8 NC Channel B Output - Sources or sinks current to turn-on or turn-off a discrete MOSFET or IGBT A 7 Supply oltage - Provides power to the device 3 B 5 Ground - Common ground reference for the device.3 Absolute Maximum Ratings Parameter Symbol Minimum Maximum Units Supply oltage -.3 Input oltage INx, ENx Output Current I OUT - ± A Junction Temperature T J C Storage Temperature T STG C Absolute maximum electrical ratings are at 5 C Absolute maximum ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied.. Recommended Operating Conditions Parameter Symbol Range Units Supply oltage.5 to 35 Operating Temperature Range T A - to +5 C R5 3

4 .5 Electrical Characteristics: T A = 5 C Test Conditions:.5 < < 35, one channel (unless otherwise noted). Parameter Conditions Symbol Minimum Typical Maximum Units Input oltage, High.5 < < 8 IH Input oltage, Low.5 < < 8 IL Input Current < IN < I IN - - ± A High EN Input oltage IXDD only ENH /3 - - Low EN Input oltage IXDD only ENL - - /3 Output oltage, High - OH Output oltage, Low - OL Output Resistance, High State =8, I OUT =-ma R OH Output Resistance, Low State =8, I OUT =ma R OL -. Output Current, Continuous Limited by package power dissipation I DC - - ± A Rise Time =8, OAD =pf t r - 9 Fall Time =8, OAD =pf t f - 8 On-Time Propagation Delay =8, OAD =pf t ondly Off-Time Propagation Delay =8, OAD =pf t offdly ns Enable to Output-High Delay Time IXDD only, =8 t ENOH Disable to High Impedance State Delay Time IXDD only, =8 t DOLD - 55 Enable Pull-Up Resistor - R EN - - k =8, IN =3.5-3 ma Power Supply Current =8, IN = I CC - < A CC =8, IN = - <. Electrical Characteristics: - C < T A < +5 C Test Conditions:.5 < < 35, one channel (unless otherwise noted). Parameter Conditions Symbol Minimum Maximum Units Input oltage, High.5 < < 8 IH 3. - Input oltage, Low.5 < < 8 IL -.5 Input Current < IN < I IN - A Output oltage, High - OH Output oltage, Low - OL -.5 Output Resistance, High State =8, I OUT =-ma R OH - 3 Output Resistance, Low State =8, I OUT =ma R OL -.5 Output Current, Continuous Limited by package power dissipation I DC - ± A Rise Time =8, OAD =pf t r - ma Fall Time =8, OAD =pf t f - On-Time Propagation Delay =8, OAD =pf t ondly - 5 Off-Time Propagation Delay =8, OAD =pf t offdly - 5 ns Enable to Output-High Delay Time IXDD only, =8 t ENOH - 5 Disable to High Impedance State Delay Time IXDD only, =8 t DOLD - 5 =8, IN = Power Supply Current =8, IN = I CC - 5 A CC =8, IN = R5

5 .7 Thermal Characteristics Package Parameter Symbol Rating Units D (8-Pin DFN) 35 PI (8-Pin DIP) 5 Thermal Resistance, Junction-to-Ambient JA SI (8-Pin Power SOIC) 85 C/W SIA (8-Pin SOIC) SI (8-Pin Power SOIC) Thermal Resistance, Junction-to-Case JC C/W Performance. Timing Diagrams IH IH INx IL INx IL t offdly t ondly OUTx 9% % t ondly OUTx 9% % t offdly t f t r t r t f. Characteristics Test Diagram.μF μf + - OAD Tektronix Current Probe 3 IN ENA ENB OAD Tektronix Current Probe 3 R5 5

6 3 Block Diagrams & Truth Tables 3. IXDD 3.3 IXDF IXDD IXDF kω ENA kω ENB IN X EN X OUT X or open or open Z Z 3. IXDI 3. IXDN IXDI IXDN IN X OUT X IN X OUT X R5

7 Typical Performance Characteristics Rise Time (ns) 8 A&B Rise Times vs. Supply oltage (Input=-5, f=khz, T A =5ºC) =nf =nf =7pF Supply oltage () Fall Time (ns) 8 A&B Fall Times vs. Supply oltage (Input=-5, f=khz, T A =5ºC) =nf =nf =7pF Supply oltage () Rise & Fall Times (ns) A&B Rise and Fall Times vs. Temperature (Input=-5, =8, =nf) t r t f Rise Time (ns) 8 A&B Rise Time vs. Load Capacitance at arious Levels =.5 =8 = =8 = =35 Fall Time (ns) 8 A&B Fall Time vs. Load Capacitance at arious Levels =.5 =8 = =8 = =35 8 Load Capacitance (pf) 8 Load Capacitance (pf) Propagation Delay (ns) 8 Propagation Delay vs. Supply oltage ( IN =-5, =nf, f=khz) t ondly t offdly Supply oltage () Propagation Delay (ns) Propagation Delay vs. Input oltage ( =5, =nf) t offdly t ondly 8 Input oltage () Propagation Delay (ns) Propagation Delay vs. Temperature t offdly t ondly Input Threshold oltage () Input Threshold oltage vs. Temperature ( =8, =nf) Min IH Max IL Input Threshold () Input Threshold vs. Supply oltage IH IL Supply oltage () Enable Threshold () Enable Threshold vs. Supply oltage 8 ENH ENL Supply oltage () R5 7

8 Supply Current vs. Load Capacitance ( =35) f=mhz f=mhz f=5khz f=khz f=5khz f=khz Load Capacitance (pf) Supply Current vs. Load Capacitance ( =8) f=mhz f=5khz f=khz f=5khz f=mhz Load Capacitance (pf) Supply Current vs. Load Capacitance ( =) f=mhz f=mhz f=5khz f=khz f=5khz Load Capacitance (pf) Supply Current vs. Load Capacitance ( =8) f=mhz f=mhz f=5khz f=khz f=5khz Load Capacitance (pf) Supply Current vs. Frequency ( =35) =nf =nf =7pF Frequency (khz). Supply Current vs. Frequency ( =8) =nf =nf =7pF Frequency (khz).. Supply Current vs. Frequency ( =) =nf =nf =7pF Frequency (khz).. Supply Current vs. Frequency ( =8) =nf =nf =7pF Frequency (khz) Quiesent Supply Current vs. Temperature ( =8) IN =3.5 IN =5 IN =.5 IN = & Dynamic Supply Current vs. Temperature ( =8, IN =5, f=khz, =nf) Output Source Current (A) Output Source Current vs. Supply oltage ( =nf) Supply oltage () Output Sink Current (A) 8 Output Sink Current vs. Supply oltage ( =nf) Supply oltage () 8 R5

9 Output Source Current vs. Temperature ( =8, =nf). Output Sink Current vs. Temperature ( =8, =nf) Output Source Current (A) 5 3 Output Sink Current (A) High State Output Resistance vs. Supply oltage (I OUT = -ma). Low State Output Resistance vs. Supply oltage (I OUT = +ma) Resistance (Ω) Resistance (Ω) Supply oltage () Supply oltage () R5 9

10 5 Manufacturing Information 5. Moisture Sensitivity All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, IPC/JEDEC J-STD-, in force at the time of product evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and information in that standard as well as to any limitations set forth in the information or standards referenced below. Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-33. Device Moisture Sensitivity Level (MSL) Rating SI / SIA / PI MSL D MSL 3 5. ESD Sensitivity This product is ESD Sensitive, and should be handled according to the industry standard JESD Reflow Profile This product has a maximum body temperature and time rating as shown below. All other guidelines of J-STD- must be observed. Device SI / SIA / D PI Maximum Temperature x Time C for 3 seconds 5 C for 3 seconds Pb e3 R5

11 5. Mechanical Dimensions 5.. SIA (8-Pin SOIC) Pin ±.5 (.3 ±.).7 REF (.5) ±.5 (.55 ±.).7 ±.5 (.3 ±.) PCB Land Pattern. (.) Pin. ±.7 (. ±.3) 5. (.3).55 (.).98 ±.5 (.9 ±.).559 ±.5 (. ±.).3 ±.7 (.53 ±.3).5 MIN -.5 MAX (. MIN -. MAX).7 (.5) Dimensions mm (inches) 5.. SI (8-Pin Power SOIC with Exposed Metal Back) 3.8 (.5) 5.99 ±.5 (.3 ±.) ±.5 (.55 ±.).7 ±.5 (.3 ±.) (.9) (.8).55 (.) Pin. ±.7 (. ±.3).98 ±.5 (.9 ±.).7 REF (.5).3 ±.7 (.53 ±.3).5 ±.5 (. ±.).7 (.5). (.) Recommended PCB Land Pattern 7º.5 MIN -.5 MAX (. MIN -. MAX) 3.55 ±.5 (. ±.) Dimensions mm (inches) Note: The exposed metal pad on the back of the SI package should be connected to. It is not suitable for carrying current. R5

12 5..3 Tape & Reel Information for SI and SIA Packages 33. DIA. (3. DIA.) Top Cover Tape Thickness. MAX. (. MAX.) B =5.3 (.9) W=. (.7) K =. (.83) A =.5 (.5) P=8. (.35) Embossed Carrier User Direction of Feed Dimensions mm (inches) Embossment NOTE: Tape dimensions not shown comply with JEDEC Standard EIA PI (8-Pin DIP).5 ±.7 (. ±.5).35 ±.7 (.5 ±.5) Pin.57 ±.7 (.8 ±.3). TYP (.) 9.5 ±.38 (.38 ±.5) 3.3 ±.5 (.3 ±.) 7. ±.5 (.3 ±.) 9. ±.58 (.3 ±.) 7.39 TYP. (.85).5 ±.7 (. ±.5) 8-.8 DIA. (8-.3 DIA.).35 ±.7 (.5 ±.5) 7. ±.7 (.3 ±.5) PCB Hole Pattern.5 ±.7 (. ±.5) 7. ±.7 (.3 ±.5).83 ±. (.3 ±.) Dimensions mm (inches) R5

13 5..5 D (8-Pin DFN) Pin 5. BSC (.97 BSC).8 /. (.3 /.39). REF (.8 REF).95 (.37).35 x 5º (. x 5º).5 (.77). BSC (.57 BSC).5 (.8) 3. (.).7 /.83 (.9 /.33). (.). (.7). (.).95 BSC (.37 BSC).35 /.5 x 5º (. /.8 x 5º) Pin Pin 8.3 /.5 (. /.8).53 /. (. /.) 3.3 / 3. (.9 /.) Recommended PCB Land Pattern Dimensions mm MIN / mm MAX (inches MIN / inches MAX) NOTE: The exposed metal pad on the back of the D package should be connected to. Pad is not suitable for carrying current. 5.. Tape & Reel Information for D Package 33. DIA. (3. DIA.) R.75 TYP. ±. See Note #. ±.5.55 ±.5.75 ±. Top Cover Tape Thickness. MAX. (. MAX.) 5º MAX (.5) 5.5 ±.5 B =5. ±. (.5). ±.3 Embossed Carrier K =.9 ±. 8. ±..5 (MIN) Embossment.3 ±.5 5º MAX A =.5 ±. NOTES:. A & B measured at.3mm above base of pocket.. pitches cumulative tol. ±.mm 3. ( ) Reference dimensions only.. Unless otherwise specified, all dimensions in millimeters. For additional information please visit our website at: IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated Circuits Division s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division s product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice. Specification: DS--R5 Copyright, IXYS Integrated Circuits Division All rights reserved. Printed in USA. /8/ R5 3

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