TC4427 TC A DUAL HIGH-SPEED POWER MOSFET DRIVERS 1.5A DUAL HIGH-SPEED POWER MOSFET DRIVERS TC4426 TC4426 GENERAL DESCRIPTION FEATURES
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1 FEATURES High Peak Output Current....A Wide Operating Range....V to V High Capacitive Load Drive Capability... pf in nsec Short Delay Time... < nsec Typ. Consistent Delay Times With Changes in Supply Voltage Low Supply Current With Logic Input... ma With Logic Input... µa Low Output Impedance... Ω Latch-Up Protected... Will Withstand >.A Reverse Current... Down to V Input Will Withstand Negative Inputs ESD Protected...kV Pinout Same as TC/TC/TC ORDERING INFORMATION Temperature Part No. Package Range COA -Pin SOIC C to + C CPA -Pin Plastic DIP C to + C EOA -Pin SOIC C to + C EPA -Pin Plastic DIP C to + C MJA -Pin CerDIP C to + C COA -Pin SOIC C to + C CPA -Pin Plastic DIP C to + C EOA -Pin SOIC C to + C EPA -Pin Plastic DIP C to + C MJA -Pin CerDIP C to + C COA -Pin SOIC C to + C CPA -Pin Plastic DIP C to + C EOA -Pin SOIC C to + C EPA -Pin Plastic DIP C to + C MJA -Pin CerDIP C to + C GENERAL DESCRIPTION The // are improved versions of the earlier TC// family of buffer/drivers (with which they are pin compatible). They will not latch up under any conditions within their power and voltage ratings. They are not subject to damage when up to V of noise spiking (of either polarity) occurs on the ground pin. They can accept, without damage or logic upset, up to ma of reverse current (of either polarity) being forced back into their outputs. All terminals are fully protected against up to kv of electrostatic discharge. As MOSFET drivers, the // can easily switch pf gate capacitances in under nsec, and provide low enough impedances in both the ON and OFF states to ensure the MOSFET's intended state will not be affected, even by large transients. Other compatible drivers are the A/A/A. These drivers have matched input to output leading edge and falling edge delays, td and td, for processing short duration pulses in the nsec range. They are pin compatible with the //. FUTIONAL BLOCK DIAGRAM INPUT.V mv INVERTING OUTPUTS NONINVERTING OUTPUTS // GND EFFECTIVE INPUT C = pf NOTES:. has inverting drivers; has noninverting drivers.. has one inverting and one noninverting driver.. Ground any unused driver input. OUTPUT //- //9 TelCom Semiconductor reserves the right to make changes in the circuitry and specifications of its devices.
2 ABSOLUTE MAXIMUM RATINGS* Supply Voltage... +V Input Voltage, IN A or IN B. ( +.V) to (GND.V) Maximum Chip Temperature... + C Storage Temperature Range... C to + C Lead Temperature (Soldering, sec)... + C Package Thermal Resistance CerDIP R θj-a... C/W CerDIP R θj-c... C/W PDIP R θj-a... C/W PDIP R θj-c... C/W SOIC R θj-a... C/W SOIC R θj-c... C/W PIN CONFIGURATIONS Operating Temperature Range C Version... C to + C E Version... C to + C M Version... C to + C Package Power Dissipation (T A C) Plastic...mW CerDIP...mW SOIC...mW *Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. IN A GND OUT A IN A GND OUT A IN A GND OUT A IN B OUT B IN B OUT B IN B OUT B,,,, INVERTING = NO INTERNAL CONNECTION NOTE: SOIC pinout is identical to DIP. NONINVERTING DIFFERENTIAL ELECTRICAL CHARACTERISTICS: T A = + C with.v V, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit Input V IH Logic High Input Voltage. V V IL Logic Low Input Voltage. V I IN Input Current V V IN µa Output V OH High Output Voltage. V V OL Low Output Voltage. V R O Output Resistance = V, I O = ma Ω I PK Peak Output Current Duty Cycle %, t µsec. A I REV Latch-Up Protection Duty Cycle % >. A Withstand Reverse Current t µsec Switching Time (Note ) t R Rise Time Figure 9 nsec t F Fall Time Figure 9 nsec t D Delay Time Figure nsec t D Delay Time Figure nsec Power Supply I S Power Supply Current V IN = V (Both Inputs). ma V IN = V (Both Inputs). ma NOTE:. Switching times are guaranteed by design.
3 ELECTRICAL CHARACTERISTICS: Specifications measured over operating temperature range with.v V, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit Input V IH Logic High Input Voltage. V V IL Logic Low Input Voltage. V I IN Input Current V V IN µa Output V OH High Output Voltage. V V OL Low Output Voltage. V R O Output Resistance = V, I O = ma 9 Ω I PK Peak Output Current Duty Cycle %, t µsec. A I REV Latch-Up Protection Duty Cycle % >. A Withstand Reverse Current t µsec Switching Time (Note ) t R Rise Time Figure nsec t F Fall Time Figure nsec t D Delay Time Figure nsec t D Delay Time Figure nsec Power Supply I S Power Supply Current V IN = V (Both Inputs) ma V IN = V (Both Inputs). ma NOTE:. Switching times are guaranteed by design. A sec 9 Crossover Energy Loss INPUT = V. µf,,. µf OUTPUT C L = pf +V INPUT V OUTPUT V % t D t F t D t R % % Inverting Driver MAX. POWER (mw) 9 Pin DIP Pin CerDIP Pin SOIC Thermal Derating Curves 9 AMBIENT TEMPERATURE ( C) INPUT: khz, square wave, trise = tfall ns +V INPUT V OUTPUT V % t D t R td % % Noninverting Driver Figure. Switching Time Test Circuit NOTE: The values on this graph represent the loss seen by both drivers in a package during one complete cycle. For a single driver, divide the stated values by. For a single transition of a single driver, divide the stated value by. t F
4 TYPICAL CHARACTERISTICS t RISE (nsec) Rise Time vs. Supply Voltage Fall Time vs. Supply Voltage pf T A = C pf T A = C pf pf pf t FALL (nsec) pf pf pf pf pf Rise TIme vs. Capacitive Load Fall TIme vs. Capacitive Load V T V A = C T A = C t RISE (nsec) V V t FALL (nsec) V V, C LOAD (pf), C LOAD (pf) Rise and Fall Times vs. Temperature C LOAD = pf =.V Propagation Delay vs. Supply Voltage C LOAD = pf t D TIME (nsec) t FALL DELAY TIME (nsec) t D T A = C t RISE TEMPERATURE ( C)
5 TYPICAL CHARACTERISTICS (Cont.) DELAY TIME (nsec) Effect of Input Amplitude on Delay Time C LOAD = pf = V t D DELAY TIME (nsec) Propagation Delay Time vs. Temperature = V V LOAD= pf t D t D t D V DRIVE (V) T A ( C) Quiescent Supply Current vs. Voltage T = + C A Quiescent Supply Current vs. Temperature. = V I QUIESCENT (ma) BOTH INPUTS = I QUIESCENT (ma)... BOTH INPUTS = BOTH INPUTS =.. T A ( C) High-State Output Resistance Low-State Output Resistance R DS(ON) (Ω) WORST T J = + C T A = + C R DS(ON) (Ω) WORST T J = + C T A = + C
6 SUPPLY CURRENT CHARACTERISTICS (Load on Single Output Only) Supply Current vs. Capacitive Load MHz = V 9 khz khz Supply Current vs. Frequency pf = V pf pf khz khz, C LOAD (pf) FREQUEY (khz) Supply Current vs. Capacitive Load Supply Current vs. Frequency pf = V MHz = V 9 khz khz pf pf khz khz, C LOAD (pf) FREQUEY (khz) Supply Current vs. Capacitive Load Supply Current vs. Frequency = V V DD = V MHz pf pf 9 khz khz khz khz, C LOAD (pf) FREQUEY (khz) pf
7 PACKAGE DIMENSIONS -Pin CerDIP. (.9).9 (.9) PIN. (.). (.). (.) MAX.. (.) MIN.. (.). (9.). (.).9 (.). (.). (.). (.). (.). (.). (.). (.) MIN.. (.). (.) MIN.. (.). (.). (.). (.). (.). (.) -Pin Plastic DIP PIN. (.). (.). (.). (.). (.). (.). (.). (.). (.).9 (.). (.). (.). (.). (.9). (.). (.). (.). (.) MIN.. (.9).9 (.9). (.). (.). (.). (.) Dimensions: inches (mm)
8 PACKAGE DIMENSIONS Cont.) -Pin SOIC PIN indicated by dot and / or beveled edge. (.99). (.). (.). (.9). (.) TYP..9 (.).9 (.). (.). (.). (.). (.).9 (.). (.) MAX.. (.). (.). (.). (.) Dimensions: inches (mm) Sales Offices TelCom Semiconductor Terra Bella Avenue P.O. Box Mountain View, CA 99- TEL: -9-9 FAX: liter@csmtp.telcom-semi.com TelCom Semiconductor Austin Product Center 9 Burnet Rd. Suite Austin, TX TEL: -- FAX: -- TelCom Semiconductor H.K. Ltd. Sam Chuk Street, Ground Floor San Po Kong, Kowloon Hong Kong TEL: -- FAX: --99 Printed in the U.S.A.
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