MM74HCU04 Hex Inverter

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Milton Foster
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MM74HCU04 Hex Inverter General Description The MM74HCU04 inverters utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of

1 MM74HCU04 Hex Inverter General Description The MM74HCU04 inverters utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. The MM74HCU04 is an unbuffered inverter. It has high noise immunity and the ability to drive 15 LS-TTL loads. The 74HCU logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs September 1983 Revised February 1999 are protected from damage due to static discharge by internal diode clamps to V CC and ground. Features Typical propagation delay: 7 ns Fanout of 15 LS-TTL loads Quiescent power consumption: 10 µa maximum at room temperature Low input current: 1 µa maximum MM74HCU04 Hex Inverter Ordering Code: Order Number Package Number Package Description MM74HCU04M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, Narrow MM74HCU04SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCU04MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HCU04N N14A 14-Lead Plastic Dual-In-Lead Package (PDIP), JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Connection Diagram Schematic Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Top View 1999 Fairchild Semiconductor Corporation DS prf

2 MM74HCU04 Absolute Maximum Ratings(Note 1) (Note 2) Supply Voltage (V CC ) 0.5 to +7.0V DC Input Voltage (V IN ) 1.5 to V CC +1.5V DC Output Voltage (V OUT ) 0.5 to V CC +0.5V Clamp Diode Current (I IK, I OK ) ±20 ma DC Output Current, per pin (I OUT ) ±25 ma DC V CC or GND Current, per pin (I CC ) ±50 ma Storage Temperature Range (T STG ) 65 C to +150 C Power Dissipation (P D ) (Note 3) 600 mw S.O. Package only 500 mw Lead Temperature (T L ) (Soldering 10 seconds) 260 C Recommended Operating Conditions Min Max Units Supply Voltage (V CC ) 2 6 V DC Input or Output Voltage 0 V CC V (V IN, V OUT ) Operating Temperature Range (T A ) C Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating plastic N package: 12 mw/ C from 65 C to 85 C. DC Electrical Characteristics (Note 4) Symbol Parameter Conditions V CC T A = 25 C T A = 40 to 85 C T A = 55 to 125 C Units Typ Guaranteed Limits V IH Minimum HIGH Level 2.0V V Input Voltage 4.5V V 6.0V V V IL Maximum LOW Level 2.0V V Input Voltage 4.5V V 6.0V V V OH Minimum HIGH Level V IN = V IL Output Voltage I OUT 20 µa 2.0V V 4.5V V 6.0V V V IN = GND I OUT 4.0 ma 4.5V V I OUT 5.2 ma 6.0V V V OL Maximum LOW Level V IN = V IH Output Voltage I OUT 20 µa 2.0V V 4.5V V 6.0V V V IN = V CC I OUT 6.0 ma 4.5V V I OUT 7.8 ma 6.0V V I IN Maximum Input V IN = V CC or GND 6.0V ±0.1 ±1.0 ±1.0 µa Current I CC Maximum Quiescent V IN = V CC or GND 6.0V µa Supply Current I OUT = 0 µa Note 4: For a power supply of 5V ±10% the worst case output voltages (V OH, and V OL ) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case V IH and V IL occur at V CC = 5.5V and 4.5V respectively. (The V IH value at 5.5V is 3.85V.) The worst case leakage current (I IN, I CC, and I OZ ) occur for CMOS at the higher voltage and so the 6.0V values should be used. 2

3 AC Electrical Characteristics V CC = 5V, T A = 25 C, C L = 15 pf, t r = t f = 6 ns Guaranteed Symbol Parameter Conditions Typ Limit Units t PHL, t PLH Maximum Propagation 7 13 ns Delay MM74HCU04 AC Electrical Characteristics V CC = 2.0V to 6.0V, C L = 50 pf, t r = t f = 6 ns (unless otherwise specified) Symbol Parameter Conditions V CC T A =25 C T A = 40 to 85 C T A = 55 to 125 C Units Typ Guaranteed Limits t PHL, t PLH Maximum Propagation 2.0V ns Delay 4.5V ns 6.0V ns t TLH, t THL Maximum Output Rise 2.0V ns and Fall Time 4.5V ns 6.0V ns C PD Power Dissipation (per gate) 90 pf Capacitance (Note 5) C IN Maximum Input pf Capacitance Note 5: C PD determines the no load dynamic power consumption, P D = C PD V CC 2 f + I CC V CC, and the no load dynamic current consumption, I S = C PD V CC f + I CC. Typical Applications FIGURE 1. Crystal Oscillator FIGURE 2. Stable RC Oscillator FIGURE 3. Schmitt Trigger 3

4 MM74HCU04 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, Narrow Package Number M14A 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 4

5 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) MM74HCU04 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 5

6 MM74HCU04 Hex Inverter Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, Wide Package Number N14A LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

MM74HC132 Quad 2-Input NAND Schmitt Trigger

MM74HC132 Quad 2-Input NAND Schmitt Trigger Quad 2-Input NAND Schmitt Trigger General Description The utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability