TC4426 TC4427 TC A DUAL HIGH-SPEED POWER MOSFET DRIVERS GENERAL DESCRIPTION FEATURES ORDERING INFORMATION
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1 1.A DUAL HIGH-SPEED POWER MOSFET DRIVERS FEATURES High Peak Output Current... 1.A Wide Operating Range....V to 1V High Capacitive Load Drive Capability... pf in nsec Short Delay Time... < nsec Typ. Consistent Delay Times With Changes in Supply Voltage Low Supply Current With Logic 1 Input... ma With Logic Input... µa Low Output Impedance... Ω Latch-Up Protected... Will Withstand >.A Reverse Current... Down to V Input Will Withstand Negative Inputs ESD Protected...kV Pinout Same as TC/TC/TC ORDERING INFORMATION Temperature Part No. Package Range COA -Pin SOIC C to + C CPA -Pin Plastic DIP C to + C EOA -Pin SOIC C to + C EPA -Pin Plastic DIP C to + C MJA -Pin CerDIP C to +1 C COA -Pin SOIC C to + C CPA -Pin Plastic DIP C to + C EOA -Pin SOIC C to + C EPA -Pin Plastic DIP C to + C MJA -Pin CerDIP C to +1 C COA -Pin SOIC C to + C CPA -Pin Plastic DIP C to + C EOA -Pin SOIC C to + C EPA -Pin Plastic DIP C to + C MJA -Pin CerDIP C to +1 C GENERAL DESCRIPTION The // are improved versions of the earlier TC// family of buffer/drivers (with which they are pin compatible). They will not latch up under any conditions within their power and voltage ratings. They are not subject to damage when up to V of noise spiking (of either polarity) occurs on the ground pin. They can accept, without damage or logic upset, up to ma of reverse current (of either polarity) being forced back into their outputs. All terminals are fully protected against up to kv of electrostatic discharge. As MOSFET drivers, the // can easily switch pf gate capacitances in under nsec, and provide low enough impedances in both the ON and OFF states to ensure the MOSFET's intended state will not be affected, even by large transients. Other compatible drivers are the A/A/A. These drivers have matched input to output leading edge and falling edge delays, td1 and td, for processing short duration pulses in the nsec range. They are pin compatible with the //. FUTIONAL BLOCK DIAGRAM INPUT.V mv INVERTING OUTPUTS NONINVERTING OUTPUTS // GND EFFECTIVE INPUT C = 1 pf NOTES: 1. has inverting drivers; has noninverting drivers.. has one inverting and one noninverting driver.. Ground any unused driver input. OUTPUT 1 Microchip Technology Inc. DS1A //- /1/9
2 ABSOLUTE MAXIMUM RATINGS* Supply Voltage... +V Input Voltage, IN A or IN B. ( +.V) to (GND.V) Maximum Chip Temperature C Storage Temperature Range... C to +1 C Lead Temperature (Soldering, sec)... + C Package Thermal Resistance CerDIP R θj-a... 1 C/W CerDIP R θj-c... C/W PDIP R θj-a... 1 C/W PDIP R θj-c... C/W SOIC R θj-a... 1 C/W SOIC R θj-c... C/W PIN CONFIGURATIONS Operating Temperature Range C Version... C to + C E Version... C to + C M Version... C to +1 C Package Power Dissipation (T A C) Plastic...mW CerDIP...mW SOIC...mW *Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability IN A GND OUT A IN A GND OUT A IN A GND OUT A IN B OUT B IN B OUT B IN B OUT B,,,, INVERTING = NO INTERNAL CONNECTION NOTE: SOIC pinout is identical to DIP. NONINVERTING DIFFERENTIAL ELECTRICAL CHARACTERISTICS: T A = + C with.v 1V, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit Input V IH Logic 1 High Input Voltage. V V IL Logic Low Input Voltage. V I IN Input Current V V IN 1 1 µa Output V OH High Output Voltage. V V OL Low Output Voltage. V R O Output Resistance = 1V, I O = ma Ω I PK Peak Output Current Duty Cycle %, t µsec 1. A I REV Latch-Up Protection Duty Cycle % >. A Withstand Reverse Current t µsec Switching Time (Note 1) t R Rise Time Figure 1 19 nsec t F Fall Time Figure 1 19 nsec t D1 Delay Time Figure 1 nsec t D Delay Time Figure 1 nsec Power Supply I S Power Supply Current V IN = V (Both Inputs). ma V IN = V (Both Inputs). ma NOTE: 1. Switching times are guaranteed by design. //- /1/9 1 Microchip Technology Inc. DS1A
3 ELECTRICAL CHARACTERISTICS: Specifications measured over operating temperature range with.v 1V, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit Input V IH Logic 1 High Input Voltage. V V IL Logic Low Input Voltage. V I IN Input Current V V IN µa Output V OH High Output Voltage. V V OL Low Output Voltage. V R O Output Resistance = 1V, I O = ma 9 1 Ω I PK Peak Output Current Duty Cycle %, t µsec 1. A I REV Latch-Up Protection Duty Cycle % >. A Withstand Reverse Current t µsec Switching Time (Note 1) t R Rise Time Figure 1 nsec t F Fall Time Figure 1 nsec t D1 Delay Time Figure 1 nsec t D Delay Time Figure 1 nsec Power Supply I S Power Supply Current V IN = V (Both Inputs) ma V IN = V (Both Inputs). ma NOTE: 1. Switching times are guaranteed by design. A sec 9 Crossover Energy Loss INPUT = 1V. µf,,.1 µf OUTPUT C L = pf +V INPUT V OUTPUT V % 9% t D1 t F t D t R 9% 9% % % Inverting Driver V INPUT V % 9% MAX. POWER (mw) Pin DIP Pin CerDIP Pin SOIC Thermal Derating Curves AMBIENT TEMPERATURE ( C) INPUT: khz, square wave, t RISE = t FALL ns OUTPUT V 9% t D1 Figure 1. Switching Time Test Circuit t R 9% td % % Noninverting Driver NOTE: The values on this graph represent the loss seen by both drivers in a package during one complete cycle. For a single driver, divide the stated values by. For a single transition of a single driver, divide the stated value by. t F 1 Microchip Technology Inc. DS1A //- /1/9
4 TYPICAL CHARACTERISTICS t RISE (nsec) Rise Time vs. Supply Voltage Fall Time vs. Supply Voltage pf T A = C pf T A = C 1 pf pf pf t FALL (nsec) 1 pf pf pf pf pf Rise TIme vs. Capacitive Load Fall TIme vs. Capacitive Load V T V A = C T A = C t RISE (nsec) V 1V t FALL (nsec) V 1V, C LOAD (pf), C LOAD (pf) Rise and Fall Times vs. Temperature C LOAD = pf = 1.V Propagation Delay vs. Supply Voltage C LOAD = pf t D TIME (nsec) t FALL DELAY TIME (nsec) t D1 T A = C t RISE //- /1/9 1 1 TEMPERATURE ( C) Microchip Technology Inc. DS1A
5 TYPICAL CHARACTERISTICS (Cont.) DELAY TIME (nsec) Effect of Input Amplitude on Delay Time C LOAD = pf = V t D DELAY TIME (nsec) Propagation Delay Time vs. Temperature = 1V V LOAD= pf t D t D1 t D1 V DRIVE (V) 1 1 T A ( C) Quiescent Supply Current vs. Voltage T = + C A Quiescent Supply Current vs. Temperature. = 1V I QUIESCENT (ma) 1 BOTH INPUTS = 1 I QUIESCENT (ma)... BOTH INPUTS = 1 BOTH INPUTS = T A ( C) High-State Output Resistance Low-State Output Resistance R DS(ON) (Ω) 1 WORST T J = +1 C T A = + C R DS(ON) (Ω) 1 WORST T J = +1 C T A = + C Microchip Technology Inc. DS1A //- /1/9
6 SUPPLY CURRENT CHARACTERISTICS (Load on Single Output Only) Supply Current vs. Capacitive Load MHz = 1V 9 khz khz Supply Current vs. Frequency pf = 1V pf pf khz khz, C LOAD (pf) FREQUEY (khz) Supply Current vs. Capacitive Load Supply Current vs. Frequency pf = 1V MHz = 1V 9 khz khz pf pf khz khz, C LOAD (pf) FREQUEY (khz) Supply Current vs. Capacitive Load Supply Current vs. Frequency = V V DD = V MHz pf pf 9 khz khz khz khz, C LOAD (pf) //- /1/9 FREQUEY (khz) pf 1 Microchip Technology Inc. DS1A
7 PACKAGE DIMENSIONS.1 (.9).9 (.9) -Pin CerDIP PIN 1. (.). (.). (1.) MAX.. (.1) MIN.. (.1). (9.). (.1).9 (.). (.).1 (.). (1.). (.1). (.).1 (.1).1 (.1) MIN..1 (.). (.) MIN.. (1.). (1.1). (.1).1 (.1) -Pin Plastic DIP. (.1). (.1) PIN 1. (.). (.). (1.1). (.). (.1). (.). (1.). (1.). (.).9 (.). (.).1 (.).1 (.1).11 (.9). (1.). (.1).1 (.). (.) MIN..1 (.9).9 (.9). (.).1 (.). (.1). (.) Dimensions: inches (mm) 1 Microchip Technology Inc. DS1A //- /1/9
8 PACKAGE DIMENSIONS Cont.) -Pin SOIC.1 (.99).1 (.1). (.). (.9). (1.) TYP..19 (.).19 (.). (.1).1 (.). (.). (.).9 (1.). (1.) MAX.. (.). (.1). (1.).1 (.) Dimensions: inches (mm) //- /1/9 1 Microchip Technology Inc. DS1A
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