27C K (32K x 8) CMOS EPROM FEATURES PACKAGE TYPES DESCRIPTION

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1 256K (32K x 8) CMS EPRM 27C256 FEATURES PACKAGE TYPES High speed performance - 9 ns access time available CMS Technology for low power consumption - 2 ma Active current - µa Standby current Factory programming available Auto-insertion-compatible plastic packages Auto ID aids automated programming Separate chip enable and output enable controls High speed express programming algorithm rganized 32K x 8: JEDEC standard pinouts - 28-pin Dual-in-line package - 32-pin PLCC Package - 28-pin SIC package - Tape and reel Data Retention > 2 years Available for the following temperature ranges: - Commercial: C to +7 C - Industrial: -4 C to +85 C - Automotive: -4 C to +25 C DESCRIPTIN The 27C256 is a CMS 256K bit electrically Programmable Read nly Memory (EPRM). The device is organized as 32K words by 8 bits (32K bytes). Accessing individual bytes from an address transition or from power-up (chip enable pin going low) is accomplished in less than 9 ns. This very high speed device allows the most sophisticated microprocessors to run at full speed without the need for WAIT states. CMS design and processing enables this part to be used in systems where reduced power consumption and reliability are requirements. A complete family of packages is offered to provide the most flexibility in applications. For surface mount applications, PLCC, or SIC packaging is available. Tape and reel packaging is also available for PLCC or SIC packages. PLCC DIP/SIC A6 5 A5 6 A4 7 A3 8 A2 9 A A NC 2 3 PP A2 A7 A6 A5 A4 A3 A2 A A 2 SS A7 A PP NU cc A4 A SS NU C256 27C A8 28 A9 27 A 26 NC 25 E 24 A 23 CE CC A4 A3 A8 A9 A E A CE DSM-page

2 . ELECTRICAL CHARACTERISTICS. Maximum Ratings* CC and input voltages w.r.t. SS to PP voltage w.r.t. SS during programming to +4. oltage on A9 w.r.t. SS to +3.5 utput voltage w.r.t. SS to CC +. Storage temperature C to +5 C Ambient temp. with power applied C to +25 C *Notice: Stresses above those listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE -: Name A-A4 CE E PP - 7 CC SS NC NU PIN FUNCTIN TABLE Address Inputs Chip Enable utput Enable Function Programming oltage Data utput +5 Power Supply Ground No Connection; No Internal Connection Not Used; No External Connection Is Allowed TABLE -2: READ PERATIN DC CHARACTERISTICS CC = +5 (±%) Commercial: Tamb = C to +7 C Industrial: Tamb = -4 C to +85 C Extended (Automotive): Tamb = -4 C to +25 C Parameter Part* Status Symbol Min. Max. Units Conditions Input oltages all Logic "" Logic "" CC+.8 Input Leakage all ILI - µa IN = to CC utput oltages all Logic "" Logic "" H L IH = -4 µa IL = 2. ma utput Leakage all IL - µa UT = to CC Input Capacitance all CIN 6 pf IN = ; Tamb = 25 C; f = MHz utput Capacitance all CUT 2 pf UT = ; Tamb = 25 C; f = MHz Power Supply Current, Active Power Supply Current, Standby IPP Read Current PP Read oltage C I,E C I, E all all all TTL input TTL input TTL input TTL input CMS input Read Mode Read Mode ICC ICC ICC(S) 2 3 IPP PP CC-.7 CC ma ma CC = 5.5; PP = CC f = MHz; E = CE = ; IUT = ma; = -. to.8; = 2. to CC; Note ma ma µa CE = CC ±.2 µa PP = 5.5 * Parts: C=Commercial Temperature Range; I, E=Industrial and Extended Temperature Ranges Note : Typical active current increases.75 ma per MHz up to operating frequency for all temperature ranges. DSM-page 2 998

3 TABLE -3: READ PERATIN AC CHARACTERISTICS AC Testing Waveform: = 2.4 and =.45; H = 2. L =.8 utput Load: TTL Load + pf Input Rise and Fall Times: ns Ambient Temperature: Commercial: Tamb = C to +7 C Industrial: Tamb = -4 C to +85 C Automotive: Tamb = -4 C to +25 C Parameter Sym 27C256-9* 27C256-* 27C C C256-2 Min Max Min Max Min Max Min Max Min Max Units Conditions Address to utput Delay tacc ns CE=E = CE to utput Delay tce ns E = E to utput Delay te ns CE = CE or E to /P High Impedance utput Hold from Address CE or E, whichever goes first tff ns th ns * -, -9 AC Testing Waveform: = 2.4 and =.45; H =.5 and L =.5 utput Load: TTL Load + 3pF FIGURE -: READ WAEFRMS Address Address alid CE tce(2) E te(2) th tff(,3) utputs - 7 H L High Z alid utput High Z tacc Notes: () tff is specified for E or CE, whichever occurs first (2) E may be delayed up to tce - te after the falling edge of CE without impact on tce (3) This parameter is sampled and is not % tested. 998 DSM-page 3

4 TABLE -4: PRGRAMMING DC CHARACTERISTICS Ambient Temperature: Tamb = 25 C ± 5 C CC = 6.5 ±.25, PP = H = 3. ±.25 Parameter Status Symbol Min Max. Units Conditions Input oltages Logic Logic CC+.8 Input Leakage ILI - µa IN = to CC utput oltages Logic Logic H L IH = -4 µa IL = 2. ma CC Current, program & verify ICC2 2 ma Note PP Current, program IPP2 25 ma Note A9 Product Identification H Note : CC must be applied simultaneously or before PP and removed simultaneously or after PP TABLE -5: PRGRAMMING AC CHARACTERISTICS for Program, Program erify AC Testing Waveform: =2.4 and =.45; H=2.; L=.8 and Program Inhibit Modes utput Load: TTL Load + pf Ambient Temperature: Tamb=25 C ± 5 C CC= 6.5 ±.25, PP = H = 3. ±.25 Parameter Symbol Min. Max. Units Remarks Address Set-Up Time tas 2 µs Data Set-Up Time tds 2 µs Data Hold Time tdh 2 µs Address Hold Time tah µs Float Delay (2) tdf 3 ns CC Set-Up Time tcs 2 µs Program Pulse Width () tpw 95 5 µs µs typical CE Set-Up Time tces 2 µs E Set-Up Time tes 2 µs PP Set-Up Time tps 2 µs Data alid from E te ns Note : For express algorithm, initial programming width tolerance is µs ±5%. 2: This parameter is only sampled and not % tested. utput float is defined as the point where data is no longer driven (see timing diagram). DSM-page 4 998

5 FIGURE -2: PRGRAMMING WAEFRMS Program erify Address Address Stable Data tas Data Stable High Z Data ut alid tah tds tdh tdf () 3.(2) PP 5. tps CC 6.5(2) 5. tcs CE E tpw tes te () Notes: () (2) tdf and te are characteristics of the device but must be accommodated by the programmer CC = 6.5 ±.25, PP = H = 3. ±.25 for express algorithm TABLE -6: MDES peration Mode CE E PP A9-7 Read CC X DUT Program H X DIN Program erify H X DUT Program Inhibit H X High Z Standby X CC X High Z utput Disable CC X High Z Identity CC H Identity Code X = Don t Care.2 Read Mode (See Timing Diagrams and AC Characteristics) Read Mode is accessed when: a) the CE pin is low to power up (enable) the chip b) the E pin is low to gate the data to the output pins For Read operations, if the addresses are stable, the address access time (tacc) is equal to the delay from CE to output (tce). Data is transferred to the output after a delay from the falling edge of E (te). 998 DSM-page 5

6 .3 Standby Mode The standby mode is defined when the CE pin is high () and a program mode is not defined. When these conditions are met, the supply current will drop from 2 ma to µa..4 utput Enable This feature eliminates bus contention in multiple bus microprocessor systems and the outputs go to a high impedance when the following condition is true: The E pin is high and the program mode is not defined..5 Erase Mode (U.. Windowed ersions) Windowed products offer the ability to erase the memory array. The memory matrix is erased to the all s state when exposed to ultraviolet light. To ensure complete erasure, a dose of 5 watt-second/cm 2 is required. This means that the device window must be placed within one inch and directly underneath an ultraviolet lamp with a wavelength of 2537 Angstroms, intensity of 2,µW/cm 2 for approximately 2 minutes..6 Programming Mode The Express Algorithm has been developed to improve on the programming throughput times in a production environment. Up to ten -microsecond pulses are applied until the byte is verified. No overprogramming is required. A flowchart of the express algorithm is shown in Figure -3. Programming takes place when: a) CC is brought to the proper voltage, b) PP is brought to the proper H level, c) the E pin is high, and d) the CE pin is low. Since the erased state is in the array, programming of is required. The address to be programmed is set via pins A-A4 and the data to be programmed is presented to pins -7. When data and address are stable, a low going pulse on the CE line programs that location..7 erify After the array has been programmed it must be verified to ensure all the bits have been correctly programmed. This mode is entered when all the following conditions are met: a) CC is at the proper level, b) PP is at the proper H level, c) the CE line is high, and d) the E line is low..8 Inhibit When programming multiple devices in parallel with different data, only CE need be under separate control to each device. By pulsing the CE line low on a particular device, that device will be programmed; all other devices with CE held high will not be programmed with the data, although address and data will be available on their input pins..9 Identity Mode In this mode specific data is output which identifies the manufacturer as and device type. This mode is entered when Pin A9 is taken to H (.5 to 2.5). The CE and E lines must be at. A is used to access any of the two non-erasable bytes whose data appears on through 7. Pin Input utput Identity Manufacturer Device Type* A * Code subject to change H e x 29 8C DSM-page 6 998

7 FIGURE -3: PRGRAMMING EXPRESS ALGRITHM Conditions: Tamb = 25 C ±5 C CC = 6.5 ±.25 PP = 3. ±.25 Start ADDR = First Location CC = 6.5 PP = 3. X = Program one µs pulse Increment X erify Byte Pass Fail No Yes Device X =? Failed Last Address? Yes No Increment Address CC = PP = 4.5, 5.5 Device Passed Yes All bytes = original data? No Device Failed 998 DSM-page 7

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11 27C256 Product Identification System To order or to obtain information (e.g., on pricing or delivery), please use listed part numbers, and refer to factory or listed sales offices. 27C256 9 I /TS Package: L = Plastic Leaded Chip Carrier P = Plastic DIP (Mil 6) S = Plastic SIC (Mil 3) Temperature Blank = C to +7 C Range: I = -4 C to +85 C E = -4 C to +25 C Access Time: 9 = 9 ns = ns 2 = 2 ns 5 = 5 ns 2 = 2 ns Device 27C K (32K x 8) CMS EPRM 998 DSM-page

WRLDWIDE SALES AND SERICE AMERICAS Corporate ffice 2355 West Chandler Blvd. Chandler, AZ 85224-699 Tel: 48-786-72 Fax: 48-786-7277 Technical Support: 48-786-7627 Web Address: http://www.microchip.

12 WRLDWIDE SALES AND SERICE AMERICAS Corporate ffice 2355 West Chandler Blvd. Chandler, AZ Tel: Fax: Technical Support: Web Address: Atlanta 5 Sugar Mill Road, Suite 2B Atlanta, GA 335 Tel: Fax: Boston 5 Mount Royal Avenue Marlborough, MA 752 Tel: Fax: Chicago 333 Pierce Road, Suite 8 Itasca, IL 643 Tel: Fax: Dallas 457 Westgrove Drive, Suite 6 Addison, TX Tel: Fax: Dayton Two Prestige Place, Suite 5 Miamisburg, H Tel: Fax: Detroit Tri-Atria ffice Building Northwestern Highway, Suite 9 Farmington Hills, MI Tel: Fax: Los Angeles 82 on Karman, Suite 9 Irvine, CA 9262 Tel: Fax: New York 5 Motor Parkway, Suite 22 Hauppauge, NY 788 Tel: Fax: San Jose 27 North First Street, Suite 59 San Jose, CA 953 Tel: Fax: AMERICAS (continued) Toronto 5925 Airport Road, Suite 2 Mississauga, ntario L4 W, Canada Tel: Fax: ASIA/PACIFIC Hong Kong Microchip Asia Pacific Unit 2, Tower 2 Metroplaza 223 Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: Fax: Beijing Microchip Technology, Beijing Unit 95, 6 Chaoyangmen Bei Dajie Dong Erhuan Road, Dongcheng District New China Hong Kong Manhattan Building Beijing 27 PRC Tel: Fax: India India Liaison ffice No. 6, Legacy, Convent Road Bangalore 56 25, India Tel: Fax: Japan Microchip Technology Intl. Inc. Benex S- 6F 3-8-2, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa Japan Tel: Fax: Korea Microchip Technology Korea 68-, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea Tel: Fax: Shanghai Microchip Technology RM 46 Shanghai Golden Bridge Bldg. 277 Yan an Road West, Hong Qiao District Shanghai, PRC 2335 Tel: Fax: ASIA/PACIFIC (continued) Singapore Microchip Technology Singapore Pte Ltd. 2 Middle Road #7-2 Prime Centre Singapore 8898 Tel: Fax: Taiwan, R..C Microchip Technology Taiwan F-C 27 Tung Hua North Road Taipei, Taiwan, RC Tel: Fax: EURPE United Kingdom Arizona Microchip Technology Ltd. 55 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG4 5TU Tel: Fax: Denmark Microchip Technology Denmark ApS Regus Business Centre Lautrup hoj -3 Ballerup DK-275 Denmark Tel: Fax: France Arizona Microchip Technology SARL Parc d Activite du Moulin de Massy 43 Rue du Saule Trapu Batiment A - ler Etage 93 Massy, France Tel: Fax: Germany Arizona Microchip Technology GmbH Gustav-Heinemann-Ring 25 D-8739 München, Germany Tel: Fax: Italy Arizona Microchip Technology SRL Centro Direzionale Colleoni Palazzo Taurus. Le Colleoni 24 Agrate Brianza Milan, Italy Tel: Fax: /5/99 Microchip received QS-9 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 999. The Company s quality system processes and procedures are QS-9 compliant for its PICmicro 8-bit MCUs, KEELQ code hopping devices, Serial EEPRMs and microperipheral products. In addition, Microchip s quality system for the design and manufacture of development systems is IS 9 certified. All rights reserved. 999 Microchip Technology Incorporated. Printed in the USA. /99 Printed on recycled paper. Information contained in this publication regarding device applications and the like is intended for suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. The Microchip logo and name are registered trademarks of in the U.S.A. and other countries. All rights reserved. All other trademarks mentioned herein are the property of their respective companies. 999

256K (32K x 8) CMOS EPROM TSOP A11 A3 14 V PP A12 A7 A6 A5 A4 A3 PLCC VSOP A13 A14 A Microchip Technology Inc.

256K (32K x 8) CMOS EPROM TSOP A11 A3 14 V PP A12 A7 A6 A5 A4 A3 PLCC VSOP A13 A14 A Microchip Technology Inc. This document was created with FrameMaker 44 256K (2K x 8) CMS EPRM 27C256 FEATURES High speed performance - 9 ns access time available CMS Technology for low power consumption - 2 ma Active current -