HIGH FREQUENCY 7660 DC-TO-DC VOLTAGE CONVERTER TC7660H GENERAL DESCRIPTION FEATURES ORDERING INFORMATION

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1 HIGH FREQUENCY DC-TO-DC EALUATION KIT AAILABLE HIGH FREQUENCY DC-TO-DC FEATURES Pin Compatible with, High Frequency Performance DC-to-DC Converter Low Cost, Two Low alue External Capacitors Required... (.µf) Converts Logic Supply to ± System Wide Input oltage Range.... to oltage Conversion % Power Efficiency... % Available in -Pin SOIC and -Pin PDIP Packages PIN CONFIGURATION (DIP and SOIC) NC CAP GND CPA EPA CAP NC CAP GND CAP COA EOA OSC LOW OLTAGE (L) OUT OSC LOW OLTAGE (L) OUT GENERAL DESCRIPTION The is a pin-compatible, high frequency upgrade to the Industry standard TC charge pump voltage converter. It converts a. to input to a corresponding. to output using only two lowcost capacitors, eliminating inductors and their associated cost, size and EMI. The operates at a frequency of khz (versus khz for the TC), allowing the use of.µf external capacitors. Oscillator frequency can be reduced (for lower supply current applications) by connecting an external capacitor from OSC to ground. The is available in -pin DIP and small outline (SOIC) packages in commercial and extended temperature ranges. ORDERING INFORMATION Temperature Part No. Package Range COA -Pin SOIC C to C CPA -Pin Plastic DIP C to C EOA -Pin SOIC C to C EPA -Pin Plastic DIP C to C TCE Evaluation Kit for Charge Pump Family NC = NO INTERNAL CONNECTION FUNCTIONAL BLOCK DIAGRAM CAP OSC RC OSCILLATOR OLTAGE LEEL TRANSLATOR CAP L OUT INTERNAL OLTAGE REGULATOR LOGIC NETWORK - //9 TelCom Semiconductor reserves the right to make changes in the circuitry and specifications of its devices. GND

2 HIGH FREQUENCY DC-TO-DC ABSOLUTE MAXIMUM RATINGS* Supply oltage.... L and OSC Inputs oltage (Note ).... to (.) for <. (.) to (.) for >. Current Into L (Note )... µa for >. Output Short Duration ( SUPPLY.)... Continuous Power Dissipation (T A C) (Note ) SOIC...mW Plastic DIP...mW Operating Temperature Range C Suffix... C to C E Suffix... C to C Storage Temperature Range... C to C Lead Temperature (Soldering, sec)... C *Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS: Over Operating Temperature Range with = C I = C = µf, C OSC =, Test Circuit (Figure ), unless otherwise indicated. Symbol Parameter Test Conditions Min Typ Max Unit I Supply Current R L =.. ma H Supply oltage Range, High Min T A Max, R L = kω, L Open L Supply oltage Range, Low Min T A Max,.. R L = kω, L to GND R OUT Output Source Resistance I OUT = ma, T A = C Ω I OUT = ma, C T A C 9 Ω (C Device) I OUT = ma, C T A C Ω (E Device) =, I OUT = ma, L to GND Ω C T A C F OSC Oscillator Frequency khz P EFF Power Efficiency I OUT = ma, Min T A Max % EFF oltage Efficiency R L = % NOTES:. Connecting any input terminal to voltages greater than or less than GND may cause destructive latch-up. It is recommended that no inputs from sources operating from external supplies be applied prior to "power up" of the.. Derate linearly above C by.mw/ C.

3 HIGH FREQUENCY DC-TO-DC C. µf I S () To improve low-voltage operation, the L pin should be connected to GND. For supply voltages greater than., the L terminal must be left open to ensure latch-upproof operation and prevent device damage. Theoretical Power Efficiency Considerations In theory, a capacitative charge pump can approach % efficiency if certain conditions are met: () The drive circuitry consumes minimal power. () The output switches have extremely low ON resistance and virtually no offset. () The impedances of the pump and reservoir capacitors are negligible at the pump frequency. C. µf R L Detailed Description The contains all the necessary circuitry to implement a voltage inverter, with the exception of two external capacitors, which may be inexpensive.µf non-polarized capacitors. Operation is best understood by considering Figure, which shows an idealized voltage inverter. Capacitor C is charged to a voltage,, for the half cycle when switches S and S are closed. (Note: Switches S and S are open during this half cycle.) During the second half cycle of operation, switches S and S are closed, with S and S open, thereby shifting capacitor C negatively by volts. Charge is then transferred from C to C, such that the voltage on C is exactly, assuming ideal switches and no load on C. GND Figure. Test Circuit S S S S C OUT = IN The approaches these conditions for negative voltage multiplication if large values of C and C are used. Energy is lost only in the transfer of charge between capacitors if a change in voltage occurs. The energy lost is defined by: E = / C ( ) and are the voltages on C during the pump and transfer cycles. If the impedances of C and C are relatively high at the pump frequency (refer to Figure ), compared to the value of R L, there will be a substantial difference in voltages and. Therefore, it is not only desirable to make C as large as possible to eliminate output voltage ripple, but also to employ a correspondingly large value for C in order to achieve maximum efficiency of operation. Do's and Don'ts Do not exceed maximum supply voltages. Do not connect L terminal to GND for supply voltages greater than.. Do not short circuit the output to supply for voltages above. for extended periods; however, transient conditions including start-up are okay. When using polarized capacitors in the inverting mode, the terminal of C must be connected to pin of the and the terminal of C must be connected to GND Pin. Figure. Idealized Charge Pump Inverter

4 HIGH FREQUENCY DC-TO-DC Simple Negative oltage Converter Figure shows typical connections to provide a negative supply where a positive supply is available. A similar scheme may be employed for supply voltages anywhere in the operating range of. to, keeping in mind that pin (L) is tied to the supply negative (GND) only for supply voltages below.. The output characteristics of the circuit in Figure are those of a nearly ideal voltage source in series with Ω. Thus, for a load current of ma and a supply voltage of, the output voltage would be.. The dynamic output impedance of the is due, primarily, to capacitive reactance of the charge transfer capacitor (C ). Since this capacitor is connected to the output for only / of the cycle, the equation is: X C = =.Ω, πf C where f = khz and C =.µf. Paralleling Devices OUT * C C. µf. µf Any number of voltage converters may be paralleled to reduce output resistance (Figure ). The reservoir capacitor, C, serves all devices, while each device requires its own pump capacitor, C. The resultant output resistance would be approximately: R OUT = *NOTES:. OUT = n for. Figure. Simple Negative Converter R OUT (of ) n (number of devices). µf "". µf "n" OUT * *NOTES:. OUT = n for.. µf Figure. Increased Output oltage by Cascading Devices Cascading Devices The may be cascaded as shown in (Figure ) to produce larger negative multiplication of the initial supply voltage. However, due to the finite efficiency of each device, the practical limit is probably devices for light loads. The output voltage is defined by: OUT = n ( IN ) where n is an integer representing the number of devices cascaded. The resulting output resistance would be approximately the weighted sum of the individual R OUT values. Changing the Oscillator Frequency It may be desirable in some applications (due to noise or other considerations) to increase or decease the oscillator frequency. This can be achieved by overdriving the oscillator from an external clock, as shown in Figure. In order to prevent possible device latch-up, a kω resistor must be used in series with the clock output. In a situation where the designer has generated the external clock frequency using TTL logic, the addition of a kω pull-up resistor to supply is required. Note that the pump frequency with external clocking, as with internal clocking, will be / of the clock frequency. Output transitions occur on the positive-going edge of the clock.

5 HIGH FREQUENCY DC-TO-DC C "" C R L "n" R L C Figure. Paralleling Devices Lowers Output Impedance. µf kω Figure. External Clocking Positive oltage Multiplication. µf CMOS GATE OUT The may be employed to achieve positive voltage multiplication using the circuit shown in Figure. In this application, the pump inverter switches of the are used to charge C to a voltage level of F (where is the supply voltage and F is the forward voltage drop of diode D ). On the transfer cycle, the voltage on C plus the supply voltage ( ) is applied through diode D to capacitor C. The voltage thus created on C becomes ( ) ( F ), or twice the supply voltage minus the combined forward voltage drops of diodes D and D. The source impedance of the output ( OUT ) will depend on the output current, but for = and an output current of ma, it will be approximately Ω. D D OUT = ( ) ( F ) Combined Negative oltage Conversion and Positive Supply Multiplication Figure combines the functions shown in Figures and to provide negative voltage conversion and positive voltage multiplication simultaneously. This approach would be, for example, suitable for generating 9 and from an existing supply. In this instance, capacitors C and C perform the pump and reservoir functions, respectively, for the generation of the negative voltage, while capacitors C and C are pump and reservoir, respectively, for the multiplied positive voltage. There is a penalty in this configuration which combines both functions, however, in that the source impedances of the generated supplies will be somewhat higher due to the finite impedance of the common charge pump driver at pin of the device. C C D D OUT = ( F ) C OUT = ( ) ( F ) C C C Figure. Positive oltage Multiplier Figure. Combined Negative Converter and Positive Multiplier

6 HIGH FREQUENCY DC-TO-DC Efficient Positive oltage Multiplication/ Conversion Since the switches that allow the charge pumping operation are bidirectional, the charge transfer can be performed backwards as easily as forwards. Figure 9 shows a transforming to (or to, etc.). The only problem here is that the internal clock and switchdrive section will not operate until some positive voltage has been generated. An initial inefficient pump, as shown in Figure 9, could be used to start this circuit up, after which it will bypass the diode and resistor shown dotted in Figure 9. C. µf OUT = MΩ INPUT Figure 9. Positive oltage Conversion. µf TYPICAL PERFORMANCE CHARACTERISTICS (Circuit of Figure ) OUTPUT SOURCE RESISTANCE (Ω) Output Source Resistance vs. Supply oltage k T A = C k Ω Ω SUPPLY OLTAGE () Output Source Resistance vs. Temperature OUTPUT SOURCE RESISTANCE (Ω) I OUT = ma = = TEMPERATURE ( C) OUTPUT OLTAGE () 9 Output oltage vs. Output Current C I C =µf T A = C L OPEN 9 OUTPUT CURRENT (ma) OUTPUT OLTAGE () Output oltage vs. Load Current T A = C = SLOPE Ω LOAD CURRENT (ma)

7 HIGH FREQUENCY DC-TO-DC PACKAGE DIMENSIONS -Pin Plastic DIP PIN. (.). (.). (.). (.). (.). (.). (.). (.). (.).9 (.). (.). (.). (.). (.9). (.). (.). (.). (.) MIN.. (.9).9 (.9). (.). (.). (.). (.) PIN -Pin SOIC. (.99). (.). (.). (.9). (.) TYP..9 (.).9 (.). (.). (.). (.). (.).9 (.). (.) MAX.. (.). (.). (.). (.) Dimensions: inches (mm) Sales Offices TelCom Semiconductor Terra Bella Avenue P.O. Box Mountain iew, CA 99- TEL: -9-9 FAX: TelCom Semiconductor Austin Product Center 9 Burnet Rd. Suite Austin, TX TEL: -- FAX: -- TelCom Semiconductor H.K. Ltd. Sam Chuk Street, Ground Floor San Po Kong, Kowloon Hong Kong TEL: -- FAX: --99 Printed in the U.S.A.

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