Programmable RS-232/RS-485 Transceiver

Transcription

1 SP334 Programmable RS-3/ Transceiver V Only Operation Software Programmable RS-3 or RS- 48 Selection Three RS-3 Drivers and Five Receivers in RS-3 Mode Two Full-Duplex Transceivers in Mode Full Differential Driver Tri-State (Hi-Z) Control Receiver Output Tri-State Control DESCRIPTION The SP334 is a programmable RS-3 and/or transceiver IC. The SP334 contains three drivers and five receivers when selected in RS-3 mode; and two drivers and two receivers when selected in mode. The RS-3 transceivers can typically operate at 30kbps while adhering to the RS-3 specifications. The transceivers can operate up to 10Mbps while adhering to the specifications. The drivers can be disabled (High-Z output) by the TXEN enable pin. The RS-3 and receiver outputs can be disabled by the RXEN enable pin. TI3 TXEN(n/c) TX4(n/c) TX3 VCC TX1 TX C1 V C C1 C V SP TI TI1 RXEN RS3/RS48 RI RX RX4 RX3 RX RX1 RI4 RI3 RI RI1 (in RS-3 mode) 1

2 ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. V CC...7V Storage Temperature...-6 C to 10 C Power Dissipation 8-pin Plastic DIP mW 8-pin Plastic SOIC mW Package Derating: 8-pin Plastic DIP ø JA...40 C/W 8-pin Plastic SOIC ø JA...40 C/W SPECIFICATIONS Typically = V unless otherwise noted. MIN. TYP. MAX. UNITS CONDITIONS LOGIC INPUTS V IL 0.8 Volts V IH.0 Volts LOGIC OUTPUTS V OL 0.4 Volts I OUT = -3.mA V OH.4 Volts I OUT = 1.0mA Output Tri-state Leakage 10 µa 0.4V V OUT.4V RS-3 DRIVER DC Characteristics HIGH Level Output.0 1 Volts R L =3kΩ, V IN =0.8V LOW Level Output Volts R L =3kΩ, V IN =. Open Circuit Voltage 1 1 Volts Short Circuit Current ±100 ma V OUT = Power Off Impedance 300 Ω V cc =, V out = ±. AC Characteristics Slew Rate 30 V/µs R L =3kΩ, C L = 0pF V CC =., T C Transition Time 1.6 µs R L =3kΩ, C L =00pF ; between ±3V, T C Maximum Data Rate 10 3 kbps R L =3kΩ, C L =00pF Propagation Delay t PHL 8 µs Measured from 1.V of V IN t PLH 8 µs to 0% of V OUT ; R L =3kΩ RS-3 RECEIVER DC Characteristics HIGH Threshold Volts LOW Threshold Volts Receiver Open Circuit Bias.0 Volts Input Impedance 3 7 kω V IN = 1V to 1V AC Characteristics Maximum Data Rate 10 3 kbps Propagation Delay t PHL 0. 1 µs Measured from 0% of V IN t PLH 0. 1 µs to 1.V of V OUT. DRIVER DC Characteristics Open Circuit Voltage 6.0 Volts Differential Output 1..0 Volts R L =4Ω, C L =0pF

3 SPECIFICATIONS Typically = V unless otherwise noted. MIN. TYP. MAX. UNITS CONDITIONS DRIVER Balance ±0. Volts V T - V T Common-Mode Output 3.0 Volts Output Current 8.0 ma R L =4Ω Short Circuit Current ±0 ma Terminated in 7V to 1 AC Characteristics Maximum Data Rate 10 Mbps R L =4Ω Output Transition Time 30 ns Rise/fall time, 10%0% Propagation Delay See Figures 3A & t PHL ns R DIFF =4Ω, C L1 =C L =100pF t PLH ns R DIFF =4Ω, C L1 =C L =100pF Driver Output Skew 0 ns per figure, t SKEW = t DPLH - t DPHL RECEIVER DC Characteristics Inputs Common Mode Range Volts Receiver Sensitivity ±0. Volts 7V V CM 1V Input Impedance 1 1 kω 7V V CM 1V AC Characteristics Maximum Data Rate 10 Mbps Propagation Delay See Figures 3A & 7 t PHL ns R DIFF =4Ω, C L1 =C L =100pF t PLH ns R DIFF =4Ω, C L1 =C L =100pF Differential Receiver Skew 10 0 ns t SKEW = t PLH t PHL ; R DIFF =4Ω, C L1 =C L =100pF, see Figure 8 ENABLE TIMING Driver Enable Time See Figures 4 & 6 Enable to Low ns C L =1pF, S 1 Enable to High ns C L =1pF, S Disable Time See Figures 4 & 6 Disable From Low ns C L =1pF, S 1 Disable From High ns C L =1pF, S Receiver Enable Time See Figures & 8 Enable to Low ns C L =1pF, S 1 Enable to High ns C L =1pF, S Disable Time See Figures & 8 Disable From Low ns C L =1pF, S 1 Disable From High ns C L =1pF, S POWER REQUIREMENTS Supply Voltage V CC 4.7. Volts Supply Current I CC No Load (T x Disabled) 1 0 ma TXEN = No Load (RS-3 Mode) 0 0 ma RS3/RS48 = No Load ( Mode) 1 0 ma RS3/RS48 = V ENVIRONMENTAL Operating Temperature Commercial (..C..) 0 70 C Industrial (..E..) 40 8 C Storage Temperature 6 10 C 3

4 RECEIVER INPUT GRAPH RECEIVER 1.0mA 7V 3V 0.6mA 6V 1V 1 Unit Load Maximum Input Current versus Voltage TEST CIRCUITS A R Receiver Test Point Output S 1 1KΩ V CC V OD C RL 1KΩ B R V OC S Figure 1. Driver DC Test Load Circuit Figure. Receiver Timing Test Load Circuit DI A B R L C L1 C L A B RO 1pF Output Under Test C L 00Ω S 1 V CC S Figure 3a. Driver/Receiver Timing Test Circuit Figure 4. Driver Timing Test Load # Circuit 4

5 SWITCHING WAVEFORMS DRIVER INPUT DRIVER OUTPUT DIFFERENTIAL OUTPUT V A V B 3V B A V O V O t SKEW = t DPLH - t DPHL f 1MHz; t R 10ns; t F 10ns 1.V 1.V t PLH t PHL V 1/V O O t DPLH t DPHL t R t F 1/V O Figure. Driver Propagation Delays f = 1MHz; t R 10ns; t F 10ns 3V 1.V 1.V T x EN t ZL t LZ V A, B.3V V OL Output normally LOW 0.V A, B V OH.3V t ZH Output normally HIGH 0.V t HZ Figure 6. Driver Enable and Disable Times f = 1MHz; t R 10ns; t F 10ns V 0D A B V 0D INPUT V OH RECEIVER OUT 1.V OUTPUT 1.V V OL t PHL t PLH Figure 7. Receiver Propagation Delays

6 3V R X EN 1.V f = 1MHz; t R 10ns; t F 10ns 1.V t ZL t LZ V RECEIVER OUT 1.V Output normally LOW V 0.V IL V IH RECEIVER OUT 1.V t ZH Output normally HIGH 0.V t HZ t SKEW = t PHL - t PLH Figure 8. Receiver Enable and Disable Times TTL Input Driver Output Figure. Typical RS-3 Driver Output Figure 10. Typical Driver Output 6

7 7 Figure 1. Typical Operating Circuit Figure 11. SP334 Pinout 1 14 V VCC V V T1 T T3 R1 TX1 TX TX3 RI1 TI1 TI TI3 RX1 RX RX4 RX3 RX RI RI4 RI3 RI C1 C1- C C RS3/RS RS RS-3 RS-3 RS-3 RS-3 4 KΩ KΩ KΩ KΩ SP334 R R3 KΩ R4 R RS-3 RS-3 RS-3 RXEN 6 3 N/C N/C C1 C1- C C- TXEN V VCC R1 V V V RI RI1 TX3 TX4 TX1 TX TI1 TI3 RX RI4 RI3 RX3 1KΩ 1KΩ RXEN SP334 3 RS3/RS48 1KΩ 1KΩ R3 T1 T3 TI3 TXEN(n/c) TX4(n/c) TX3 VCC TX1 TX C1 V C C1 C V TI TI1 RXEN RS3/RS48 RI RX RX4 RX3 RX RX1 RI4 RI3 RI RI SP334 (in RS-3 mode)

8 THEORY OF OPERATION The SP334 is made up of four separate circuit blocks the charge pump, drivers, receivers, and decoder. Each of these circuit blocks is described in more detail below. ChargePump The charge pump is a Sipexpatented design (U.S.,306,4) and uses a unique approach compared to older lessefficient designs. The charge pump still requires four external capacitors, but uses a fourphase voltage shifting technique to attain symmetrical 1 power supplies. Figure 17(a) shows the waveform found on the positive side of capcitor C, and figure 17(b) shows the negative side of capcitor C. There is a freerunning oscillator that controls the four phases of the voltage shifting. A description of each phase follows. Phase 1 V SS charge storage During this phase of the clock cycle, the positive side of capacitors C 1 and C are initially charged to V. C l is then switched to ground and charge on C 1 is transferred to C. Since C is connected to V, the voltage potential across capacitor C is now 1. Phase V SS transfer Phase two of the clock connects the negative terminal of C to the V SS storage capacitor and the positive terminal of C to ground, and transfers the generated l to C 3. Simultaneously, the positive side of capacitor C 1 is switched to V and the negative side is connected to ground. Phase 3 V DD charge storage The third phase of the clock is identical to the first phase the charge transferred in C 1 produces V in the negative terminal of C 1, which is applied to the negative side of capacitor C. Since C is at V, the voltage potential across C is l. capacitor C 1 is switched to V and the negative side is connected to ground, and the cycle begins again. Since both V and V are separately generated from V CC in a noload condition, V and V will be symmetrical. Older charge pump approaches that generate V from V will show a decrease in the magnitude of V compared to V due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at 1kHz. The external capacitors must be a minimum of with a 16V breakdown rating. External Power Supplies For applications that do not require V only, external supplies can be applied at the V and V pins. The value of the external supply voltages must be no greater than ±l. The current drain for the ±1 supplies is used for RS3. For the RS-3 driver the current requirement will be 3.mA per driver. The external power supplies should provide a power supply sequence of :l, then V, followed by l. Drivers The SP334 has three independent RS-3 singleended drivers and two differential drivers. Control for the mode selection is done by the RS-3/ select pin. The drivers are pre-arranged such that for each mode of V CC = V V C 1 C V V Figure 13. Charge Pump Phase 1. V CC = V C 4 C 3 V DD Storage Capacitor V SS Storage Capacitor Phase 4 V DD transfer The fourth phase of the clock connects the negative terminal of C to ground and transfers the generated l across C to C 4, the V DD storage capacitor. Again, simultaneously with this, the positive side of C 1 C 1 Figure 14a. Charge Pump Phase. C 4 C 3 V DD Storage Capacitor V SS Storage Capacitor 8

9 V CC = V V C 1 C V V Figure 1. Charge Pump Phase 3. V CC = V C 1 C 1 Figure 16. Charge Pump Phase 4. V DD Storage Capacitor V SS Storage Capacitor operation the relative position and functionality of the drivers are set up to accommodate the selected interface mode. As the mode of the drivers is changed, the electrical characteristics will change to support the requirements of clock, data, and control line signal levels. Unused driver inputs can be left floating; however, to ensure a desired state with no input signal, pullup resistors to V or pulldown resistors to ground are suggested. Since the driver inputs are both TTL or CMOS compatible, any value resistor less than 100kΩ will suffice. When in RS-3 mode, the single-ended RS- 3 drivers produce compliant RS-3E and ITU V.8 signals. Each of the three drivers output single-ended bipolar signals in excess of C 4 C 3 C 4 C 3 V DD Storage Capacitor V SS Storage Capacitor ±V with a full load of 3kΩ and 00pF applied as specified. These drivers can also operate at least 10kbps. When programmed to mode, the differential drivers produce complaint signals. Each driver outputs a unipolar signal on each output pin with a magnitude of at least 1.V while loaded with a worst case of 4Ω between the driver's two output pins. The signal levels and drive capability of the drivers allow the drivers to also comply with RS-4 levels. The transmission rate for the differential drivers is 10Mbps. Receivers The SP334 has five single-ended receivers when programmed for RS-3 mode and two differential receivers when programmed for mode. Control for the mode selection is done by the same select pin as the drivers. As the operating mode of the receivers is changed, the electrical characteristics will change to support the requirements of the appropriate serial standard. Unused receiver inputs can be left floating without causing oscillation. To ensure a desired state of the receiver output, a pullup resistor of 100kΩ to V should be connected to the inverting input for a logic low, or the noninverting input for a logic high. For single-ended receivers, a pulldown resistor to ground of kω is internally connected, which will ensure a logic high output. 1 a) C b) C - -1 Figure 17. Charge Pump Waveforms

10 The RS-3 receiver has a singleended input with a threshold of 0.8V to.4v. The RS-3 receiver has an operating voltage range of ±1V and can receive signals up to 10kbps. RS-3 receivers are used in RS-3 mode for all signal types include data, clock, and control lines of the RS-3 serial port. The differential receiver has an input impedance of 1kΩ and a differential threshold of ±00mV. Since the characteristics of an RS- 4 receiver are actually subsets of RS48, the receivers for RS-4 requirements are identical to the receivers. All of the differential receivers can receive data up to 10Mbps. Enable Pins The SP334 drivers can be enabled by use of the TXEN pin. A logic HIGH will enable the driver outputs and a logic LOW will tri-state the outputs. The drivers can only be tri-stated in mode. The drivers are always active in RS-3 mode. The receiver outputs can also be tri-stated by use of the RXEN pin. A logic LOW will enable the receiver outputs and a logic HIGH will tri-state the outputs. The receiver tri-state capability is offered for both RS-3 and modes. The input impedance if the receivers during tri-state is at least 1kΩ. Applications The SP334 allows the user flexibility in having a RS-3 or serial port without using two different discrete active ICs. Figure 18 shows a connection to a standard DB- RS-3 connector. In mode, the SP334 is a full duplex transceiver, however, a half duplex configuration can be made by connecting the driver outputs to the receiver inputs. V C1 VCC 1 C1-11 C 13 C- RS3/RS48 SP V 14 V TxD 7 TI1 T1 TX1 6 RTS DTR RxD CTS DSR 8 TI 1 TI3 T T3 TX 7 TX3 4 RI1 R1 1 RX1 KΩ 1 RI R 0 RX KΩ 16 RI3 R3 1 RX3 KΩ 17 1 DCD DSR RxD RTS TxD CTS DTR RI SG 6 DCD RX4 R4 RI4 KΩ 18 RI 3 RX R RI KΩ 4 8 RXEN 6 Figure 18. SP334 Configuration to a DB- Serial Port 10

11 PACKAGE: 8-PIN PLASTIC SMALL OUTLINE (SOIC) E H D A Ø e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) A A1 B D E e H L Ø 8PIN 0.03/0.104 (.3/.64) 0.004/0.01 (0.10/0.300) 0.013/0.00 (0.330/0.08) 0.68/0.706 (17.73/17.3) 0.1/0. (7.40/7.600) 0.00 BSC (1.70 BSC) 0.34/0.41 (10.00/10.64) 0.016/0.00 (0.406/1.70) 0 /8 (0 /8 ) 11

12 ORDERING INFORMATION Model Temperature Range Package Types SP334CT... 0 C to 70 C... 8-pin Plastic SOIC SP334ET C to 8 C... 8-pin Plastic SOIC Please consult the factory for pricing and availability on a Tape-On-Reel option. Corporation SIGNAL PROCESSING EXCELLENCE Sipex Corporation Headquarters and Sales Office Linnell Circle Billerica, MA 0181 TEL: (78) FAX: (78) sales@sipex.com Sales Office 33 South Hillview Drive Milpitas, CA 03 TEL: (408) FAX: (408) Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others. 1

13 This datasheet has been download from: Datasheets for electronics components.