Low Power, High ESD +5V RS232 Transceivers

Transcription

1 SP0ESPE Low Power, High ESD V RS Transceivers Meets All EIA- and ITU V. Specifications Single V Supply Operation ma Typical Static Supply Current 4 x External Charge Pump Capacitors Typical 0kbps Transmission Rates Standard SOIC and SSOP Footprints µa Shutdown Mode (SPE & SPE) Two Wake-Up Receivers (SPE) Tri-State/RxEnable (SPE & SPE) Improved ESD Specifications: kv Human Body Model kv IEC Air Discharge kv IEC Contact Discharge Now Available in Lead Free Packaging Device Drivers Receivers Pins SP0E 4 SP0E SPE 4 SPE 4 Table. Model Selection Table V INPUT.V.V TTL/CMOS OUTPUTS TTL/CMOS INPUTS V T IN T IN 0 C C C T IN T 4 IN T IN R OUT R OUT R OUT 4 C SP0E T T T T 4 V V 0 T R R R.V V T OUT T OUT T OUT 4 T 4 OUT 4 T OUT R IN R IN R IN RS- INPUTS RS- OUTPUTS DESCRIPTION The SP0E-SPE are enhanced transceivers intended for use in RS- and V. serial communication. These devices feature very low power consumption and single-supply operation making them ideal for space-constrained applications. Sipex-patented (,0,4) on-board charge pump circuitry generates fully compliant RS- voltage levels using small and inexpensive charge pump capacitors. External V and -V supplies are not required. The SPE and SPE feature a low-power shutdown mode, which reduces power supply drain to µa. SPE includes two receivers that remain active during shutdown to monitor for signal activity. The SP0E-SPE devices are pin-to-pin compatible with our previous SP0, SP0, SP and SP as well as industry-standard competitor devices. Driver output and receiver input pins are protected against ESD to over ±kv for both Human Body Model and IEC Air Discharge test methods. Data rates of over 0kbps are guaranteed with 0kbps typical, making them compatible with high speed modems and PC remote-access applications. Receivers also incorporate hysteresis for clean reception of slow moving signals. Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

2 ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. Power Dissipation Per Package 4-pin SSOP (derate.mw/ o C above 0 o C)...00mW 4-pin PDIP (derate.mw/ o C above 0 o C)...00mW 4-pin SOIC (derate.mw/ o C above 0 o C)...000mW -pin SSOP (derate.mw/ o C above 0 o C)...00mW -pin SOIC (derate.mw/ o C above 0 o C)...000mW... V V... ( 0.V) to.v V....V Input Voltages T IN... 0.V to ( 0.V) R IN... ±0V Output Voltages T OUT... (V, 0.V) to (V, 0.V) R OUT... 0.V to ( 0.V) Short Circuit Duration on T OUT... Continuous SPECIFICATIONS. at nominal ratings; charge pump capacitors; T MIN to T MAX, unless otherwise noted. PARAMETER MIN. TYP. MAX. UNIT CONDITIONS TTL INPUTS T IN, EN, SD Logic Threshold V IL 0. Volts V IH.0 Volts Logic Pullup Current 00 µa T IN = 0V Maximum Transmssion Rate 0 0 kbps C L = 000pF, R L = KΩ TTL OUTPUTS Compatibility TTL/CMOS V OL 0.4 Volts I OUT =.ma; = V V OH. Volts I OUT =.0mA Leakage Current µa 0V R OUT ; SP EN = 0V; SP EN = T A = C RS OUTPUT Output Voltage Swing Volts All transmitter outputs loaded with KΩ to ground Output Resistance 00 Ω = 0V; V OUT = V Output Short Circuit Current ma Infinite duration, V OUT = 0V RS INPUT Voltage Range Volts Voltage Threshold Low 0.. Volts = V, T A = C High.. Volts = V, T A = C Hysteresis Volts = V Resistance kω V IN =V; T A = C DYNAMIC CHARACTERISTICS Driver Propagation Delay. µs TTLtoRS- Receiver Propagation Delay 0.. µs RS-toTTL Instantaneous Slew Rate 0 V/µs C L = 0pF, R L = KΩ; T A = C; from V Transition Time. µs C L =,00pF, R L = KΩ; measured from V to V or V to V Output Enable Time 400 ns Output Disable Time 0 ns Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

3 SPECIFICATIONS at nominal ratings; charge pump capacitors; T MIN to T MAX, unless otherwise noted. PARAMETER MIN. TYP. MAX. UNIT CONDITIONS POWER REQUIREMENTS SP Volts All other parts Volts I CC T A = C ma No load; = ±0% ma All transmitters R L = KΩ Shutdown Current 0 µa T A = C ENVIRONMENTAL AND MECHANICAL Operating Temperature Commercial, C 0 0 C Extended, E 40 C Storage Temperature C Package A Shrink (SSOP) small outline T Wide (SOIC) small outline P Narrow (PDIP) Plastic Dual-In-Line Transmitter 0kbps R L =KΩ, C L =,000pF Transmitter 0kbps R L =KΩ, CL=,00pF Transmitter 40kbps R L =KΩ, C L =,000pF Transmitter 40kbps R L =KΩ, C L =,00pF Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

4 PINOUT T OUT 4 T 4 OUT T OUT 4 T OUT T OUT R IN T OUT R IN T OUT R OUT R IN R OUT R IN 4 T IN R OUT 4 T 4 IN R OUT 0 T OUT T IN 0 T 4 OUT T IN T IN SP0E T 4 IN T IN R OUT R OUT R IN SP0E T IN T IN R 4 OUT C V C 0 4 R IN V C C C V C 0 4 R 4 IN V C C T OUT T OUT T OUT R IN R OUT T IN T IN R OUT R IN C V C SPE 4 0 T 4 OUT R IN R OUT SHUTDOWN (SD) EN R 4 IN R 4 OUT T 4 IN T IN R OUT R IN V C C T OUT T OUT T OUT R IN R OUT T IN T IN R OUT R IN C V C SPE 4 0 T 4 OUT R IN R OUT SHUTDOWN (SD) EN R 4 IN R 4 OUT T 4 IN T IN R OUT R IN V C C Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation 4

5 FEATURES The SP0E, SP0E, SPE and SPE multichannel transceivers fit most RS-/V. communication needs. All of these devices feature lowpower CMOS con-struction and SIPEXproprietary onboard charge pump circuitry to generate RS- signal-voltages, making them ideal for applications where V and -V supplies are not available. The highly efficient charge pump is optimized to use small and inexpensive charge pump capacitors, saving board space and reducing overall circuit cost. Each device provides a different driver/ receiver combination to match standard application requirements. The SP0E is a -driver, -receiver device, ideal for DCE applications such as modems, printers or other peripherals. SP0E is a 4-driver/ 4receiver device, ideal for providing handshaking signals in V. applications or other general-purpose serial communications. The SPE and SPE are each -driver, -receiver devices ideal for DTE serial ports on a PC or other data-terminal equipment. The SP and SPE feature a low power shutdown mode, which reduces power supply drain to µa. The SPE includes a Wake-Up function which keeps two receivers active in the shutdown mode, unless disabled by the EN pin. The family is available in and 4 pin SO (wide) and SSOP (shrink) small outline packages. Devices can be specified for commercial (0 C to 0 C) and industrial/ extended (40 C to C) operating temperatures. THEORY OF OPERATION Sipex RS transceivers contain three basic circuit blocks a) transmitter/driver, b) receiver and c) the SIPEXproprietary charge pump. SPE and SPE also include SHUTDOWN and ENABLE functions. Transmitter/Drivers The drivers are single-ended inverting transmitters, which accept either TTL or CMOS inputs and output the RS- signals with an inverted sense relative to the input logic levels. Should the input of the driver be left open, an internal pullup to VCC forces the input high, thus committing the output to a logic- (MARK) state. The slew rate of the transmitter output is internally limited to a maximum of 0V/µs in order to meet the EIA/RS- and ITU V. standards. The transition of the output from high to low also meets the monotonicity requirements of the standard even when loaded. Driver output voltage swing is ±V (typical) with no load, and ±V or greater at maximum load. The transmitter outputs are protected against infinite shortcircuits to ground without degradation in reliability. The drivers of the SPE, and SPE can be tristated by using the SHUTDOWN function. In this power-off state the charge pump is turned off and current drops to µa typical. Driver output impedance will remain greater than 00Ω, satisfying the RS- and V. specifications. For SPE SHUTDOWN is active when pin is driven high. For SPE SHUTDOWN is active when pin is driven low. Receivers The receivers convert RS- level input signals to inverted TTL level signals. Because signals are often received from a transmission line where long cables and system interference can degrade signal quality, the inputs have enhanced sensitivity to detect weakened signals. The receivers also feature a typical hysteresis margin of 00mV for clean reception of slowly transitioning signals in noisy conditions. These enhancements ensure that the receiver is virtually immune to noisy transmission lines. Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

6 Receiver input thresholds are between. to. volts typical. This allows the receiver to detect standard TTL or CMOS logic-level signals as well as RS signals. If a receiver input is left unconnected or undriven, a kω pulldown resistor to ground will commit the receiver to a logic- output state. HIGHLY EFFICIENT CHARGEPUMP The onboard dual-output charge pump is used to generate positive and negative signal voltages for the RS drivers. This enables fully compliant RS and V. signals from a single power supply device. The charge pumps use four external capacitors to hold and transfer electrical charge. The Sipexpatented design (US Patent #,0,4) uses a unique approach compared to older, lessefficient designs. The pumps use a fourphase voltage shifting technique to attain symmetrical V and V- power supplies. An intelligent control oscillator regulates the operation of the charge pump to maintain the proper voltages at maximum efficiency. = V V C C V V C 4 C V DD Storage Capacitor V SS Storage Capacitor Phase V SS transfer and invert: Phase two connects the negative terminal of C to the V SS storage capacitor and the positive terminal of C to ground. This transfers the doubled and inverted (V-) voltage onto C. Meanwhile, capacitor C charged from to prepare it for its next phase. = V C C 0V Figure. Charge Pump Phase C 4 C V DD Storage Capacitor V SS Storage Capacitor Phase V DD charge store and double: Phase three is identical to the first phase. The positive terminals of capacitors C and C are charged from with their negative terminals initially connected to ground. C l is then connected to ground and the stored charge from C is superimposed onto C. Since C is still connected to the voltage potential across capacitor C is now x. = V Figure. Charge Pump Phase Phase V SS charge store and double: The positive terminals of capacitors C and C are charged from with their negative terminals initially connected to ground. C l is then connected to ground and the stored charge from C is superimposed onto C. Since C is still connected to the voltage potential across capacitor C is now x. V V C C V C 4 Figure. Charge Pump Phase C V DD Storage Capacitor V SS Storage Capacitor Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

7 Phase 4 V DD transfer The fourth phase connects the negative terminal of C to ground and the positive terminal of C to the V DD storage capacitor. This transfers the doubled (V) voltage onto C 4. Meanwhile, capacitor C is charged from to prepare it for its next phase. = V C C 0V Figure 4. Charge Pump Phase 4 C 4 C V DD Storage Capacitor V SS Storage Capacitor The Sipex charge-pump generates V and V- independently from. Hence in a no load condition V and V- will be symmetrical. Older charge pump approaches generate V and then use part of that stored charge to generate V-. Because of inherent losses, the magnitude of V- will be smaller than V on these older designs. Under lightly loaded conditions the intelligent pump oscillator maximizes efficiency by running only as needed to maintain V and V-. Since interface transceivers often spend much of their time at idle, this power-efficient innovation can greatly reduce total power consumption. This improvement is made possible by the independent phase sequence of the Sipex charge-pump design. The clock rate for the charge pump typically operates at greater than khz, allowing the pump to run efficiently with small capacitors. Efficient operation depends on rapidly charging and discharging C and C, therefore capacitors should be mounted close to the IC and have low ESR (equivalent series resistance). Low cost surface mount ceramic capacitors (such as are widely used for power-supply decoupling) are ideal for use on the charge pump. However the charge pumps are designed to be able to function properly with a wide range of capacitor styles and values. If polarized capacitors are used, the positive and negative terminals should be connected as shown. Voltage potential across any of the capacitors will never exceed x. Therefore capacitors with working voltages as low as 0V rating may be used with a nominal supply. C will never see a potential greater than, so a working voltage of.v is adequate. The reference terminal of the V DD capacitor may be connected either to or ground, but if connected to ground a minimum V working voltage is required. Higher working voltages and/or capacitance values may be advised if operating at higher or to provide greater stability as the capacitors age. a) C b) C 0V 0V Figure : typical waveforms seen on capacitor C when all drivers are at maximum load. Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

8 SHUTDOWN MODE SPE and SPE feature a control input which will shut down the device and reduce the power supply current to less than 0µA, making the parts ideal for batterypowered systems. In shutdown mode the transmitters will be tristated, the V output of the charge pump will discharge to VCC, and the V output will discharge to ground. Shutdown will tristate all receiver outputs of the SPE. SPE WAKEUP FUNCTION On the SPE, shutdown will tri-state receivers -. Receivers 4 and remain active to provide a wake-up function and may be used to monitor handshaking and control inputs for activity. With only two receivers active during shutdown, the SPE draws only 0µA of supply current. A typical application of this function would be where a modem is interfaced to a computer in a powerdown mode. The ring indicator signal from the modem could be passed through an active receiver in the SPE that is itself in the shutdown mode. The ring indicator signal would propagate through the SPE to the power management circuitry of the computer to power up the microprocessor and the SPE drivers. After the supply voltage to the SPE reaches.0v, the SHUTDOWN pin can be disabled, taking the SPE out of the shutdown mode. All receivers that are active during shutdown maintain 00mV (typ.) of hysteresis. All receivers on the SPE may be put into tristate using the ENABLE pin. SHUTDOWN CONDITIONS For complete shutdown to occur and the 0µA power drain to be realized, the following conditions must be met: SPE: V must be applied to the SD pin ENABLE must be either Ground,.0V or not connected the transmitter inputs must be either.0v or not connected VCC must be V Receiver inputs must be greater than Ground and less than V SPE: Zero Volts must be applied to the SD pin ENABLE must be either Ground,.0V or not connected The transmitter inputs must be either.0v or not connected VCC must be V Receiver inputs must be greater than Ground and less than V Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

9 RECEIVER ENABLE SPE and SPE feature an enable input, which allows the receiver outputs to be either tristated or enabled. This can be especially useful when the receiver is tied directly to a shared microprocessor data bus. For the SPE, enable is active low; that is, Zero Volts applied to the ENABLE pin will enable the receiver outputs. For the SPE, enable is active high; that is, V applied to the ENABLE pin will enable the receiver outputs. Table. Shut-down and WakeUp Truth Tables SPE SD EN# Drivers Receivers 0 Active Tri-State 0 0 Active Active Off Tri-State 0 Off Tri-State SPE SD# EN Drivers Rx - Rx 4-0 Off Tri-State Active 0 0 Off Tri-State Tri-State Active Active Active 0 Active Tri-State Tri-State POWER UP WITH SD ACTIVE (Charge pump in shutdown mode) t 0 (POWERUP) V R DATA VALID OUT 0V t WAIT ENABLE SD DISABLE POWER UP WITH SD DISABLED (Charge pump in active mode) t 0 (POWERUP) R OUT V 0V ENABLE SD DISABLE DATA VALID t ENABLE EXERCISING WAKEUP FEATURE t 0 (POWERUP) R OUT V 0V DATA VALID DATA VALID DATA VALID t ENABLE t ENABLE t ENABLE SD DISABLE ENABLE t WAIT = V ±0%; T A = C t WAIT = ms typical, ms maximum t ENABLE = ms typical, ms maximum DISABLE Figure. WakeUp Timing Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

10 ESD TOLERANCE The SP0E Family incorporates ruggedized ESD cells on all driver output and receiver input pins. The ESD structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. The improved ESD tolerance is at least kv without damage nor latch-up. There are different methods of ESD testing applied: a) MIL-STD-, Method 0. b) IEC Air-Discharge c) IEC Direct Contact The Human Body Model has been the generally accepted ESD testing method for semiconductors. This method is also specified in MIL-STD-, Method 0. for ESD testing. The premise of this ESD test is to simulate the human body s potential to store electro-static energy and discharge it to an integrated circuit. The simulation is performed by using a test model as shown in Figure. This method will test the IC s capability to withstand an ESD transient during normal handling such as in manufacturing areas where the ICs tend to be handled frequently. The IEC , formerly IEC0-, is generally used for testing ESD on equipment and systems. For system manufacturers, they must guarantee a certain amount of ESD protection since the system itself is exposed to the outside environment and human presence. The premise with IEC is that the system is required to withstand an amount of static electricity when ESD is applied to points and surfaces of the equipment that are accessible to personnel during normal usage. The transceiver IC receives most of the ESD current when the ESD source is applied to the connector pins. The test circuit for IEC is shown on Figure. There are two methods within IEC000-4-, the Air Discharge method and the Contact Discharge method. With the Air Discharge Method, an ESD voltage is applied to the equipment under test (EUT) through air. This simulates an electrically charged person ready to connect a cable onto the rear of the system only to find an unpleasant zap just before the person touches the back panel. The high energy potential on the person discharges through an arcing path to the rear panel of the system before he or she even touches the system. This energy, whether discharged directly or through air, is predominantly a R C R S SW SW DC Power Source C S Device Under Test Figure. ESD Test Circuit for Human Body Model Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation 0

11 R C R S Contact-Discharge Module R V SW SW DC Power Source C S Device Under Test R S and R V add up to 0Ω for IEC Figure. ESD Test Circuit for IEC function of the discharge current rather than the discharge voltage. Variables with an air discharge such as approach speed of the object carrying the ESD potential to the system and humidity will tend to change the discharge current. For example, the rise time of the discharge current varies with the approach speed. The Contact Discharge Method applies the ESD current directly to the EUT. This method was devised to reduce the unpredictability of the ESD arc. The discharge current rise time is constant since the energy is directly transferred without the air-gap arc. In situations such as hand held systems, the ESD charge can be directly discharged to the equipment from a person already holding the equipment. The current is transferred on to the keypad or the serial port of the equipment directly and then travels through the PCB and finally to the IC. The circuit model in Figures and represent the typical ESD testing circuit used for all three methods. The C S is initially charged with the DC power supply when the first switch (SW) is on. Now that the capacitor is charged, the second switch (SW) is on while SW switches off. The voltage stored i 0A A 0A t=0ns t=0ns t Figure. ESD Test Waveform for IEC in the capacitor is then applied through R S, the current limiting resistor, onto the device under test (DUT). In ESD tests, the SW switch is pulsed so that the device under test receives a duration of voltage. For the Human Body Model, the current limiting resistor (R S ) and the source capacitor (C S ) are.kw an 00pF, respectively. For IEC , the current limiting resistor (R S ) and the source capacitor (C S ) are 0W an 0pF, respectively. The higher C S value and lower R S value in the IEC model are more stringent Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

12 than the Human Body Model. The larger storage capacitor injects a higher voltage to the test point when SW is switched on. The lower current limiting resistor increases the current charge onto the test point. EIA STANDARDS The Electronic Industry Association (EIA) developed several standards of data transmission which are revised and updated in order to meet the requirements of the industry. In data processing, there are two basic means of communicating between systems and components. The RS-- standard was first introduced in and, since that time, has become an industry standard. DEVICE PIN HUMAN BODY IEC TESTED MODEL Air Discharge Direct Contact Level Driver Outputs kv kv kv 4 Receiver Inputs kv kv kv 4 Table. Transceiver ESD Tolerance Levels Specification RSD RS4A RS4 RS4 RS Mode of Operation SingleEnded SingleEnded Differential Differential SingleEnded No. of Drivers and Receivers Driver Driver Driver Drivers Driver Allowed on One Line Receiver 0 Receivers 0 Receivers Receivers Receiver Maximum Cable Length 0 feet 4,000 feet 4,000 feet 4,000 feet <0Kbps; >0Kbps Maximum Data Rate 0Kb/s 00Kb/s 0Mb/s 0Mb/s 4Kb/s Driver output Maximum Voltage ±V ±V 0.V to V V to V.V to.v Driver Output Signal Level Loaded ±V ±.V ±V ±.V ±.V Unloaded ±V ±V ±V ±V ±.V Driver Load Impedance Kohm 40 ohm 00 ohm 4 ohm Kohm Max. Driver Output Current (High Impedance State) Power On ±00µA Power Off V MAX /00 00µA ±00µA ±00µA Slew Rate 0V/µs max. Controls Provided 0V/µs max. Receiver Input Voltage Range ±V ±V V to V V to V ±V Receiver Input Sensitivity ±V ±00mV ±00mV ±00mV ±V Receiver Input Resistance Kohm 4Kohm min. 4Kohm min. Kohm min. Kohm Table 4. EIA Standard Definitions Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

13 TYPICAL APPLICATION CIRCUITS...SP0E TO SPE V 4 C C - C V V- Typical EIA- Application: SPE, UART & DB- Connector C - C0 UART DCD DSR SI RTS SO CTS DTR 0 4 DCD DSR Rx RTS Tx CTS DTR RI 4 RI CS NC NC SG CS or CS * 4 SHUTDOWN EN Figure 0. Typical SPE Application Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

14 TYPICAL APPLICATION CIRCUITS...SP0E TO SPE V INPUT 0 C.V.V C C V 4 C VCC SP0E V V.V V V INPUT 0 C.V.V C C V 4 C VCC SP0E V V.V V TTL/CMOS INPUTS T IN T IN T IN T4 IN T T T T4 T OUT T OUT T OUT 4 T4 OUT RS- OUTPUTS TTL/CMOS INPUTS T IN T IN T IN T4 IN T T T T4 T OUT T OUT 4 T OUT 0 T4 OUT RS- OUTPUTS TTL/CMOS OUTPUTS T IN R OUT R OUT R OUT 0 T R R R 4 T OUT R IN R IN R IN RS- INPUTS TTL/CMOS OUTPUTS R OUT R OUT R OUT R4 OUT R 4 R R IN R IN R R IN R4 R4 IN RS- INPUTS V INPUT C.V.V 4 C C V C VCC SPE V V.V V V INPUT C.V.V 4 C C V C VCC SPE V V.V V TTL/CMOS INPUTS T IN T IN 0 T IN T4 IN T T T T4 T OUT T OUT T OUT T4 OUT RS- OUTPUTS TTL/CMOS INPUTS T IN T IN 0 T IN T4 IN T T T T4 T OUT T OUT T OUT T4 OUT RS- OUTPUTS TTL/CMOS OUTPUTS R OUT R OUT R 4 R R IN R OUT R R IN 4 EN SD 0 R IN R OUT R R IN R4 OUT R4 R4IN RS- INPUTS Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation 4 TTL/CMOS OUTPUTS R OUT R OUT R OUT 4 R R IN R OUT* R R IN* 4 EN SD 0 R IN R R IN R4 OUT* R4 R4IN* *Receivers active during shutdown R RS- INPUTS

15 PACKAGE: PLASTIC SHRINK SMALL OUTLINE (SSOP) E H D A Ø e B A L DIMENSIONS (Inches) Minimum/Maximum (mm) A A B D E e H L Ø 4PIN 0.0/0.0 (./.) 0.00/0.00 (0.0/0.) 0.00/0.0 (0./0.) 0./0. (.0/.) 0.0/0. (.0/.) 0.0 BSC (0. BSC) 0.0/0. (./.0) 0.0/0.0 (0./0.) 0 / (0 / ) PIN 0.0/0.0 (./.) 0.00/0.00 (0.0/0.) 0.00/0.0 (0./0.) 0./0.40 (0.0/0.) 0.0/0. (.0/.) 0.0 BSC (0. BSC) 0.0/0. (./.0) 0.0/0.0 (0./0.) 0 / (0 / ) Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

16 PACKAGE: PLASTIC SMALL OUTLINE (SOIC) (WIDE) E H D A Ø e B A L DIMENSIONS (Inches) Minimum/Maximum (mm) A A B D E e H L Ø 4PIN 0.0/0.04 (./.4) 0.004/0.0 (0.0/0.00) 0.0/0.00 (0.0/0.0) 0./0.4 (.0/.) 0./0. (.40/.00) 0.00 BSC (.0 BSC) 0.4/0.4 (0.00/0.4) 0.0/0.00 (0.40/.0) 0 / (0 / ) PIN 0.0/0.04 (./.4) 0.004/0.0 (0.0/0.00) 0.0/0.00 (0.0/0.0) 0./0. (.0/.0) 0./0. (.40/.00) 0.00 BSC (.0 BSC) 0.4/0.4 (0.00/0.4) 0.0/0.00 (0.40/.0) 0 / (0 / ) Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

17 PACKAGE: PLASTIC DUALINLINE (NARROW) E E D = 0.00" min. (0. min.) D A = 0.0" min. (0.min.) A = 0.0" max. (.4 max). e = 0.00 BSC (.40 BSC) B B ALTERNATE END PINS (BOTH ENDS) L A Ø C e A = 0.00 BSC (.0 BSC) DIMENSIONS (Inches) Minimum/Maximum (mm) A B B C D E E L Ø 4PIN 0./0. (./4.) 0.04/0.0 (0./0.) 0.04/0.00 (.4/.) 0.00/0.04 (0.0/0.).0/.0 (.4/.) 0.00/0. (.0/.) 0.40/0.0 (.0/.) 0./0.0 (./.0) 0 / (0 / ) Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

18 RS Transceivers: ORDERING INFORMATION Model... Drivers... Receivers... Temperature Range... Package Type SP0ECA C to 0 C... 4pin SSOP SP0ECP C to 0 C... 4pin Plastic DIP SP0ECT C to 0 C... 4pin SOIC SP0EEA C to C... 4pin SSOP SP0EEP C to C... 4pin Plastic DIP SP0EET C to C... 4pin SOIC SP0ECA C to 0 C... 4pin SSOP SP0ECP C to 0 C... 4pin Plastic DIP SP0ECT C to 0 C... 4pin SOIC SP0EEA C to C... 4pin SSOP SP0EEP C to C... 4pin Plastic DIP SP0EET C to C... 4pin SOIC RS Transceivers with LowPower Shutdown and Tristate Enable: Model... Drivers... Receivers... Temperature Range... Package Type SPECA C to 0 C pin SSOP SPECT C to 0 C pin SOIC SPEEA C to C pin SSOP SPEET C to C pin SOIC RS Transceivers with LowPower Shutdown, Tristate Enable, andwakeup Function: Model... Drivers... Receivers... Temperature Range... Package Type SPECA , with active in Shutdown... 0 C to 0 C......pin SSOP SPECT , with active in Shutdown... 0 C to 0 C... pin SOIC SPEEA , with active in Shutdown C to C... pin SSOP SPEET , with active in Shutdown C to C... pin SOIC Please consult the factory for pricing and availability on a Tape-On-Reel option. Available in lead free packaging. To order add "-L" suffix to part number. Example: SPEET/TR = standard; SPEET-L/TR = lead free. /TR = Tape and Reel Solved by SipexTM Sipex Corporation Headquarters and Sales Office South Hillview Drive Milpitas, CA 0 TEL: (40) 4-00 FAX: (40) -00 Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others. Date: //0 SP0E Low Power, High ESD V RS Transceivers Copyright 00 Sipex Corporation

19 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Exar: SPECA-L SP0ECA-L SPEET-L SPECA-L SPEEA-L SP0EEA-L SP0EET-L SPECA- L/TR SP0EET-L/TR SPEEA-L/TR SPECT-L/TR SPEEA-L/TR SPEET-L/TR SP0ECT-L SP0ECT-L/TR SP0EEA-L/TR SPECA-L/TR SP0ECA-L/TR