CD4069UBC Inverter Circuits
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1 CD4069UBC Inverter Circuits General Description The CD4069UB consists of six inverter circuits and is manufactured using complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity, and symmetric controlled rise and fall times. This device is intended for all general purpose inverter applications where the special characteristics of the MM74C901, MM74C907, and CD4049A Hex Inverter/Buffers are not required. In those applications requiring larger noise immunity the MM74C14 or MM74C914 Hex Schmitt Trigger is suggested. October 1987 Revised January 1999 All inputs are protected from damage due to static discharge by diode clamps to V DD and V SS. Features Wide supply voltage range: 3.0V to 15V High noise immunity: 0.45 V DD typ. Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS Equivalent to MM74C04 CD4069UBC Inverter Circuits Ordering Code: Order Number Package Number Package Description CD4069UBCM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, Narrow Body CD4069UBCSJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide CD4069UBCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, Wide Device also available in Tape and Reel. Specify by appending suffix X to the ordering code. Connection Diagram Schematic Diagram Pin Assignments for SOIC and DIP 1999 Fairchild Semiconductor Corporation DS prf
2 CD4069UBC Absolute Maximum Ratings(Note 1) (Note 2) DC Supply Voltage (V DD ) 0.5V to +18 V DC Input Voltage (V IN ) 0.5V to V DD +0.5 V DC Storage Temperature Range (T S ) 65 C to +150 C Power Dissipation (P D ) Dual-In-Line 700 mw Small Outline 500 mw Lead Temperature (T L ) (Soldering, 10 seconds) 260 C Recommended Operating Conditions (Note 2) DC Supply Voltage (V DD ) Input Voltage (V IN ) Operating Temperature Range (T A ) Note 1: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of Recommended Operating Conditions and Electrical Characteristics table provide conditions for actual device operation. Note 2: V SS = 0V unless otherwise specified. 3V to 15V DC 0V to V DD V DC 40 C to +85 C DC Electrical Characteristics (Note 3) Symbol Parameter Conditions 40 C +25 C +85 C Min Max Min Typ Max Min Max Units I DD Quiescent Device Current V DD = 5V, µa V IN = V DD or V SS V DD = 10V, µa V IN = V DD or V SS V DD = 15V, µa V IN = V DD or V SS V OL LOW Level Output Voltage I O < 1 µa V DD = 5V V V DD = 10V V V DD = 15V V V OH HIGH Level Output Voltage I O < 1 µa V DD = 5V V V DD = 10V V V DD = 15V V V IL LOW Level Input Voltage I O < 1 µa V DD = 5V, V O = 4.5V V V DD = 10V, V O = 9V V V DD = 15V, V O = 13.5V V V IH HIGH Level Input Voltage I O < 1 µa V DD = 5V, V O = 0.5V V V DD = 10V, V O = 1V V V DD = 15V, V O = 1.5V V I OL LOW Level Output Current V DD = 5V, V O = 0.4V ma (Note 4) V DD = 10V, V O = 0.5V ma V DD = 15V, V O = 1.5V ma I OH HIGH Level Output Current V DD = 5V, V O = 4.6V ma (Note 4) V DD = 10V, V O = 9.5V ma V DD = 15V, V O = 13.5V ma I IN Input Current V DD = 15V, V IN = 0V µa V DD = 15V, V IN = 15V µa Note 3: V SS = 0V unless otherwise specified. Note 4: I OH and I OL are tested one output at a time. 2
3 AC Electrical Characteristics (Note 5) T A = 25 C, C L = 50 pf, R L = 200 kω, t r and t f 20 ns, unless otherwise specified Symbol Parameter Conditions Min Typ Max Units t PHL or t PLH Propagation Delay Time from V DD = 5V ns Input to Output V DD = 10V ns V DD = 15V ns t THL or t TLH Transition Time V DD = 5V ns V DD = 10V ns V DD = 15V ns C IN Average Input Capacitance Any Gate 6 15 pf C PD Power Dissipation Capacitance Any Gate (Note 6) 12 pf Note 5: AC Parameters are guaranteed by DC correlated testing. Note 6: C PD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics application note AN-90. CD4069UBC AC Test Circuits and Switching Time Waveforms 3
4 CD4069UBC Typical Performance Characteristics Gate Transfer Characteristics Ambient Temperature Power Dissipation vs Frequency Propagation Delay vs Ambient Temperature Propagation Delay vs Propagation Delay Time vs Load Capacitance 4
5 Physical Dimensions inches (millimeters) unless otherwise noted CD4069UBC 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, Narrow Body Package Number M14A 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm wide Package Number M14D 5
6 CD4069UBC Inverter Circuits Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, Wide Package Number N14A LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. 74LCX125 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs General
74LS221 Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs
74LS221 Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs General Description The DM74LS221 is a dual monostable multivibrator with Schmitt-trigger input. Each device has three inputs
MM74HC08 Quad 2-Input AND Gate
MM74HC08 Quad 2-Input AND Gate Features Typical propagation delay: 7ns (t PHL ), 12ns (t PLH ) Fanout of 10 LS-TTL loads Quiescent power consumption: 2µA maximum at room temperature Low input current: