IH = 1I27tR~igCin. Computer Simulation Problems. Section 9.1: Low-Frequency Response of the CS and CE Amplifiers

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1 9.10 Multistage Amplifier Examples unity. Fr the MOSFET, IT gml2 Cgs + Cgd ), and fr the BJT,fT gml2 7t( C:r + C.I1). The internal capacitances f the MOSFET and the BJT cause the amplifier gain t fall ff at high frequencies. An estimate f the amplifier bandwidth is prvided by the frequency IH at which the gain drps 3 db belw its value at midband, AM. A figure-f-merit fr the ampli fier is the gain-bandwidth prduct G B AM fh. Usual ly, it is pssible t trade ff gain fr increased bandwidth, with GB remaining nearly cnstant. Fr amplifiers with a dminant ple with frequency IH' the gain falls ff at a unifrm 6-dB/ctave (20-dB/decade) rate, reaching 0 db at t; GB. The high-frequency respnse f the CS and CE ampli fiers is severely limited by the Miller effect: The small capacitance Cgd (C.I1) is multiplied by a factr apprx imately equal t the gain frm gate t drain (base t cllectr) gmr and thus gives rise t a large capaci tance at the amplifier input. The increased C in interacts with the effective signal-surce resistance Rig and causes the amplifier gain t have a 3-dB frequency IH 1I27tRigCin. The methd f pen-circuit time cnstants prvides a simple and pwerful way t btain a reasnably gd estimate f the upper 3-dB frequency IH. The capaci trs that limit the high-frequency respnse are cnsid ered ne at time with Vsig 0 and all the ther capacitances set t zer (pen circuited). The resistance seen by each capacitance is determined, and the verall time cnstant r H is btained by summing the individual time cnstants. Then/H is fund as 112 JrrH. 785 The CG and CB amplifiers d nt suffer frm the Miller effect. Thus the cascde amplifier, which cnsists f a cascade f a CS and CG stages (CE and CB stages), can be designed t btain wider bandwidth than that achieved in the CS (CE) amplifier alne. The key, hwever, is t design the cascde s that the gain btained in the CS (CE) stage is minimized. The surce and emitter fllwers d nt suffer frm the Miller effect and thus feature wide bandwidths. The high-frequency respnse f the differential amplifier can be btained by cnsidering the differential and cmmn-mde half-circuits. The CMRR falls ff at a rel atively lw frequency determined by the utput imped ance f the bias current surce. The high-frequency respnse fthe current-mirrr-laded differential amplifier is cmplicated by the fact that there are tw signal paths between input and utput: a direct path and ne thrugh the current mirrr. Cmbining tw transistrs in a way that eliminates r minimizes the Miller effect can result in a much wider bandwidth. Sme such cnfiguratins are presented in Sectin 9.9. The key t the analysis f the high-frequency respnse f a multistage amplifier is t use simple macr mdels t estimate the frequencies f the ples frmed at the inter face between each tw stages, in additin t the input and utput ples. The ple with the lwest frequency dmi nates and determines IH. II l "' , Cmputer Simulatin Prblems IImI Prblems identified by this icn are intended t demnstrate the value f using SPICE simulatin t verify hand analysis and design, and t investigate im prtant issues such as gain- bandwidth tradeff. In structins t assist in setting up PSpice and Multisim simulatins fr all the indicated prblems can be fund in the crrespnding files n the disc. Nte that if a par ticular parameter value is nt specified in the prblem statement, yu are t make a reasnable assumptin. *difficult prblem; ** mre difficult; *** very chal lenging and/r time-cnsuming; D: design prblem. Sectin 9.1: Lw-Frequency Respnse f the CS and CE Amplifiers 9.1 The amplifier in Fig. P9.1 is biased t perate at gm 1 man. Neglecting r ' find the midband gain. Find the value f Cs that places h at 20 Hz. 9.2 Cnsider the amplifier f Fig. 9.2(a). Let RD 10 ill, r 100 ill, and RL 10 ill. Find the value f CC2' specified t ne significant digit, t ensure that the assciated break fre quency is at, r belw, 10 Hz. Ifa higher-pwer design results in dubling 1D, with bth RD and r reduced by a factr f 2, what des the cmer frequency (due t CC2) becme? Fr

2 786 Chapter 9 V\ Frequency Respnse culate the ratis fthe first t secnd, and secnd t third. The final design requires that the first ple dminate at 10Hz with the secnd a factr f 4 lwer, and the third anther a factr f 4 lwer. Find the values f all the capacitances and the ttal capacitance needed. If the separatin factr were 10, what capacitr values and ttal capacitance wuld be needed? (Nte: Yu can see that the ttal capacitance need nt be much larger t spread the ples, as is desired in certain applicatins.) W..J m R 10 kil a: A. G\ III: w t ea. C :z: V'T u Cs RS 9.6 Repeat Example 9.1 t find C s, CC!, and CC2 that prvide IL 20 Hz and the ther ple frequencies at 4 Hz and 1 Hz. Design t keep the ttal capacitance t a minimum. 6 kil -Vss Figure P9.1 increasingly higher-pwer designs, what is the highest crner frequency that can be assciated with C? 9.3 The NMOS transistr in the discrete CS amplifier circuit f Fig. P9.3 is biased t have gm 5 man. FindAM>hIJP2JPJ' andk VDD 47 Mil 100kil 4.7kil :F It-' O.Ip,F VO lokil I Vsig Figure P Cnsider the lw-frequency respnse f the CS amplifier f Fig. 9.2(a). Let R sig 0.5 MO, Ra 2 MO, gm 3 man, RD 20 ill, and RL 10 ill. Find AM" Als, design the cupling and bypass capacitrs t lcate the three lw frequency ples at 50 Hz, 10 Hz, and 3 Hz. Use a minimum ttal capacitance, with capacitrs specified nly t a single sig nificant digit. What value f h results? 9.5 A particular versin f the CS amplifier in Fig. 9.2 uses a transistr biased t perate with gm 5 man. Resistances R sig 200kQ, RG 10MQ, RD 3 kq, and RL 5 kq. As an initial design, the circuit designer selects CCI CC2 C s IIJ.F. Find the frequencieslpl' IP2, and Ip3 and rank them in rder f frequency, highest first. Cal 9.7 Recnsider Exercise 9.1 with the aim ffmding a bet ter-perfrming design using the same ttal capacitance, that is, 3 IlF. Prepare a design in which the break frequencies are sepa rated by a factr f 5 (i.e.,/, Jl5, andjl25). What are the three capacitr values, the three break frequencies, and IL that yu achieve? 9.8 Repeat Exercise 9.2 fr the situatin in which CE 50 IlF and CCI CC2 2 IlF. Find the three break frequencies and estimate IL. 9.9 Repeat Example 9.2 fr a related CE amplifier whse supply vltages and bias current are each reduced t half their riginal value butr B, Rc,R sig, andrl are left unchanged. FindCC!,CE, and CC2 fr IL 100 Hz. Minimize the ttal capacitance used, under the fllwing cnditins. Arrange that the cntributins f C E, C CI, and C C2 are 80%, 10%, and 10%, respectively. SpecifY capacitrs t tw significant digits, chsing the next highest value, in general, fr a cnservative design, but realizing that fr C E, this may represent a larger capacitance increment. Check the value f IL that results. [Nte: An attractive apprach can be t select C E n the small side, allwing it t cntribute mre than 80% t IL, while making CCI and CC21arger, since they must cntribute less t IL.) 9.10 A particular current-biased CE amplifier perating at 100llA frm ±3 -V pwer supplies emplys Rc 20 ko, RB 200 kq ; it perates between a 20-kQ surce and a 10 k Q lad. The transistr fj 100. Select C E first fr a minimum value specified t ne significant digit and prviding up t 90% f IL. Then chse C CI and C C2, each specified t ne significant digit, with the gal f minimizing the ttal capacitance used. What IL results? What ttal capacitance is needed? 9.11 Cnsider the cmmn-emitter amplifier f Fig. P9.11 under the fllwing cnditins: R sig 5 ill, RI 33 ill, R2 22 ill, R 3.9 ill, Re 4.7 ill, RL 5.6 ill, Vee 5 V. The dc emitter current can be shwn t be rna, at which fj 120. Find the input resistance Rin and the midband gain AM" If CC! C 1 IlF and CE 20!1F, find the three break fre quencieshijp2' andfpj and an estimate frk Nte that RE has t be taken int accunt in evaluatingh2.

3 Prblems Sectin 9.3: High-Frequency Respnse f the CS and CE Amplifiers 9.29 In a particular cmmn-surce amplifier fr which the midband vltage gain between gate and drain (i.e., -gmr ) is -29 VN, the NMOS transistr has Cgs 0.5 pf and Cgd 0.1 pf. What input capacitance wuld yu expect? Fr what range f signal-surce resistances can yu expect the 3-dB frequency t exceed 10 MHz? Neglect the effect f RG A design is required fr a CS amplifier fr which the MOSFET is perated at gm 5 man and hascgs 5 pf and Cgd 1 pf. The amplifier is fed with a signal surce hav ing R sig I kq, andrg is very large. What is the largest value f R fr which the upper 3-dB frequency is at least 10 MHz? What is the crrespnding value f midband gain and gain-bandwidth prduct? Ifthe specificatin n the upper 3-dB frequency can be relaxed by a factr f 3, that is, t (10/3) MHz, what can AM and GB becme? 9.31 Recnsider Example 9.3 fr the situatin in which the transistr is replaced by ne whse width W is half that f the riginal transistr while the bias current remains unchanged. Find mdified values fr all the device parame ters alng witha M, fh' and the gain-bandwidth prduct, GB. Cntrast this with the riginal design by calculating the ratis f new value t ld fr W, v, gm' Cgs, Cgd, C in, AM,[H' and GB In a CS amplifier, such as that in Fig. 9.2(a), the resis tance f the surce R,;g 100 ill, anlplifier input resistance (which is due t the biasing netwrk) R;n 100 ill, Cg, 1 pf, Cgd 0.2 pf, gm 3 man, r 50 ill, RD 8 ill, and RL 10 ill. Determine the expected 3-dB cutff frequency fh and the midband gain. In evaluating ways t dublefh' a designer cnsiders the alternatives f changing either RL r Rm. T raise IH as described, what separate change in each wuld be required? What midband vltage gain results in each case? 9.33 A discrete MOSFET cmmn-surce amplifier has RG I Mn, gm 5 man, r 100 ill, RD 10 ill, Cg, 2 pf, and 789 surce v';g having R,;g O. Nte that CL dentes the ttal capac itance at the utput nde. By writing a nde equatin at the ut put, shw that the transfer functin V/v';g is given by,1-s(cg/gm) -g R L --...,.-"""""-"-::-'-"'-:--:VSlg m l+s(cl+cgd)r - At frequencies OJ (gmicgd), the s term in the numeratr can be neglected. In such case, what is the upper 3-dB frequency resulting? Cmpute the values f AM and IH fr the case: Cgd 0.4 pf, CL 2 pf,gm 5 man, andr{ 5 ill. t:a r m s: 11\ R Figure P The NMOS transistr in the discrete CS amplifier circuit f Fig. P9.3 is biased t have gm I man and r 100 ill. Find AM' IfCg, I pf and Cgd 0.2 pf, find/h 9.36 A designer wishes t investigate the effect f changing the bias current I n the midband gain and high-frequency respnse f the CE amplifier cnsidered in Example 9.4. Let I be dubled t 2 rna, and assume that P and IT remain unchanged at 100 and 800 MHz, respectively. T keep the nde vltages nearly unchanged, the designer reduces R8 and Re by a factr f2, t 50 ill and 4 ill, respectively. Assume rx 50 Q, and recall that VA 100 V and that C/1 remains cnstant at 1 pf. As befre, the amplifier is fed with a surce having R,jg 5 ill and feeds a lad RL 5 ill. Find the new values f AwIH' and the gain-bandwidth prduct, IA M/ fh. Cmment n the results. Nte that the price paid fr whatever imprvement in perfr mance is achieved is an increase in pwer. By what factr des the pwer dissipatin increase? (a) the verall midband gain AM (b) the upper 3-dB frequency IH *9.37 The purpse fthis prblem is t investigate the high frequency respnse f the CE amplifier when it is fed with a relatively large surce resistance Rg. Refer t the amplifier in Fig. 9.4 (a) and t its high-frequency, equivalent-circuit mdel and the analysis shwn in Fig Let R8:P R sig, rx R sig, R sig :P r ", gmrl :P 1, and gmrlcp :P C" The analysis fthe high-frequency respnse fthe cm Under these cnditins, shw that: mn-surce amplifier, presented in the text, is based n the assumptin that the resistance fthe signal surce, Rg' is large and, thus, that its interactin with the input capacitance C;n pr duces the "dminant ple" that determines the upper 3-dB fre quency IH" In sme situatins, hwever, the CS amplifier is fed with a very lw R,;g. T investigate the high-frequency respnse f the amplifier in such a case, Fig. P9.34 shws the equivalent circuit when the CS amplifier is fed with an ideal vltage (a) the midband gain AM -/3 RZI R sjg (b) the upper 3-dB frequency fh 112rcCp/3RL (c) the gain-bandwidth prduct AM.fH 112 rccprsig Cgd 0.4 pf. The amplifier is fed frm a vltage surce with an internal resistance f 500 ill and is cnnected t a 10-ill lad. Find: "V ::a Evaluate this apprximate value fthe gain-bandwidth prduct fr the case R,jg 25 ill and C/1 I pf. Nw, ifthe transistr is biased at Ie 1 rna and has /3 100, fmd the midband gain and IH fr the tw cases R{ 25 kq and R 2.5 kq. On

4 ', l's 194 Chapter 9 Frequency Respnse V\ G D :E w...i en a:: Q. eft S l1li: III (a) t A Use the methd fpen-circuit time cnstants t find IH ::c u amplifier fr which gm 1.5 rnnv, pf, r 20 kq, RL 12 kq, and R sig 100 kq fr the fllwing cases: (a) CL 0, (b) CL 10 pf, and (c) CL 50 pf. Cmpare with the value f ih btained using the Miller apprximatin. ca: fr a CS Cgs Cgd,. 0 --t Vi (b) Figure P9.70 (c) Fr L 0.5 /-lm, W2 25 /-lm,fr 12 GHz, and flcx 200 /-lan2, design the circuit t btain a gain f 3 VN per stage. Bias the MOSFETs at v 0.3 V. Specify the required values f WI and 1. What is the 3-dB frequency achieved? 9.71 Cnsider an active-laded cmmn-emitter amplifier. Let the amplifier be fed with an ideal vltage surce v" and neglect the effect f r x ' Assume that the bias current surce has a very high resistance and that there is a capacitance CL present between the utput nde and grund. This capacitance repre sents the sum f the input capacitance f the subsequent stage and the inevitable parasitic capacitance between cllectr and grund. Shw that the vltage gain is given by V, 0.2 Sectin 9.6: High-Frequency Respnse f the Cmmn-Gate and Cascde Amplifiers + 1 -s(cplg m) - gmr l +s(cl + C1Jr If the transistr is biased at Ie 200 /-la and VA 100 V, CIl 0.2 pf, and CL 1 pf, find the dc gain, the 3-dB frequency, the frequency f the zer, and the frequency at which the gain reduces t unity. Sketch a Bde plt fr the gain magnitude A cmmn-surce amplifier fed with a lw-resistance signal surce and perating with g m 2 man has a unity gain frequency f 2 GHz. What additinal capacitance must be cnnected t the drain nde t reduce J; t 1 GHz? Cnsider a CS amplifier laded in a current surce with an utput resistance equal t rf the amplifying transistr. The amplifier is fed frm a signal surce with R sig rl2. The transistr is biased t perate at gm 2 man and r 20 kq; Cgs Cgd 0.1 pf. Use the Miller apprximatin t determine an estimate f ih. Repeat fr the fllwing tw cases: (i) the bias current I in the entire system is reduced by a factr f 4, and (ii) the bias current I in the entire system is increased by a factr f4. Remember that bth R sig and R L will change as r 0 changes A CG amplifier is specified t have Cgs 2 pf, Cgd 0.1 pf, CL 2pF, gm 4rnAN, Rsig 1 kq, and R 20 kq. Neglecting the effects f r, find the lw-frequency gain V/Vsig, the frequencies f the ples};,1 andfn, and hence an estimate fthe 3-dB frequency fh' *9.76 Sketch the high-frequency equivalent circuit f a CB amplifier fed frm a signal generatr characterized by Vsig and Rsig and feeding a lad resistance RL in parallel with a capaci tance CL' (a) Shw that fr r 00 the circuit can be separated int tw parts: an input part that prduces a ple at 1 ipi 27rCjR sig II re) and an utput part that frms a ple at IP2 2n(CIl + CL)R L Nte that these are the biplar cunterparts f the MOS expressins in Eqs. (9.109) and (9.11 0). (b) Evaluate ipi and IP2 and hence btain an estimate fr fh fr the case C" 14 pf, CIl 2 pf, C L 1 pf, Ie 1 rna, R sig 1 kn, and RL 10 kn. Als, findfr f the transistr. *9.77 Cnsider a CG amplifier laded in a resistance R L r 0 and fed with a signal surce having a resistance R sig r/2. Als let CL Cgs. Use the methd f pen circuit time cnstants t shw that fr gm r 0 I, the upper 3 db frequency is related t the MOSFET expressin it by the apprximate

5 Prblems Fr the CG amplifier in Example 9.12, hw much additinal capacitance shuld be cnnected between the utput nde and grund t reduce III t 300 MHz? 9.79 Find the dc gain and the 3-dB frequency f amos cascde amplifier perated at gm 1 maiv and r 50 kn. The MOSFETs have Cgs 30 tf, Cgd 10 tf, and C db 10 tf. The amplifier is fed frm a signal surce with R sig 100 kn and is cnnected t a lad resistance f 2 MQ. There is als a lad capacitance C L f 40 tf. *9.80 (a) Cnsider a CS amplifier having C gd 0.2 pf, R sig RL 20 kq, gm 4 man, Cgs 2 pf, C L (inclucling C dh ) I pf, C db 0.2 pf, and r 20 kn. Find the lw-frequency gain A,11' and estimate fh using pen-circuit time cnstants. Hence determine the gain-bandwidth prduct. (b) Ifa CG stage is cascaded with the CS transistrin (a) t create a cascde amplifier, determine the new values f AM'flf' and gain-bandwidth prduct. Assume RL remains unchanged It is required t design a cascde amplifier t prvide a dc gain f74 db when driven with a lw-resistance generatr and utilizing NMOS transistrs fr which fa 10 V, Jinex 200 JlAN, 2 WIL 50, Cgd 0.1 pf, and CL 1 pf. Assuming that RL R, determine the verdrive vltage and the drain current at which the MOSFETs shuld be perated. Find the unity-gain frequency and the 3-dB frequency. Ifthe cascde transistr is remved and RL remains unchanged, what will the dc gain becme? 9.82 Cnsider a biplar cascde amplifier biased at a current f 1 rna. The transistrs used have j3 100, r 100 kn, Cl! 14 pf, Cf.i 2 pf, Ccs 0, and rx 50 n. The amplifier is fed with a signal surce having R sig 4 kq. The lad resistance RL 2.4 kn. Find the lw-frequency gain AM' and estimate the value fthe 3-dB frequency'. *9.83 In this prblem we cnsider the frequency respnse f the biplar cascde amplifier in the case that r can be neglected. (a) Refer t the circuit in Fig. 9.31, and nte that the ttal resistance between the cllectr f QI and grund will be equal t r,2' which is usually very small. It fllws that the ple intrduced at this nde will typically be at a very high frequency and thus will have negligible effect nfn" It als fllws that at the frequencies finterest the gain frm the base t the cllectr f QI will be -gmlre2 -I. Use this t find the capacitance at the input f QI and hence shw that the ple intrduced at the input nde will have a frequency Then shw that the ple intrduced at the utput nde will have a frequency I f1' :--- 2JrRL(CL + Ccs2 + Cf.i2) (b) Evaluatefpl andfn, and use the sum-f-the-squares frmula t estimate fh fr the amplifier with I 1 ma, C,, 5 pf, Cf.i 5 pf, Ccs CL 0, j3 100, and rx 0 in the fllwing tw cases: (i) R sig 1 kq (ii) R sig 10 kn 9.84 A BIT cascde amplifier uses transistrs fr which p 100, VA 100 V,fT 1 GHz,and C,u 0.1 pf.it perates at a bias current f 0.1 ma between a surce with R sig rjr and a lad RL pr' Let C L Ccs 0 and find the verall vltage gain at dc, Ill, and It. Sectin 9.7: High-Frequency Respnse f the Surce and Emitter Fllwers 9.85 A surce fllwer has gm 5 maiv, r 20 kn, R sig 20 kn, RL 2 kn, Cgs 2 pf, Cgd 0.1 pf, and CL 1 pf. Find AM' R'/z' andfh' Als, find the percentage cntributin f each f the three capacitances t the time-cnstant TN" 9.86 Using the expressin fr the surce fllwer III in Eq. (9.129) shw that fr situatins in which R sig is large and RL is small, III : JrRSig[Cgd + C gs, ] 1 + gmrl Find III fr the case Rsig 100 kn, RL 1 kn, r 20 kn, gm 5 majv, Cgd 10 if, and Cgs 30 if Refer t Fig. 9.32(b). In situatins in which R sig is large, the high-frequency respnse f the surce fllwer is determined by the lw-pass circuit fnned by R sig and the input capacitance. An estimate f Cin can be btained by using the Miller apprximatin t replace Cgs with an input capacitance Ceq Cgs(1- K) where K is the gain frm gate t surce. Using the lw-frequency value f K gm R /(1 + gmr) find Ceq and hence Cin and an estimate f Ill' Is this estimate higher r lwer than that btained by the methd f pen-circuit time cnstants? 9.88 Fr an emitter fllwer biased at Ie 1rnA and having R sig RL 1 kn, and using a transistr specified t have IT 2 GHz, Cf.i 0.1 pf, rx 100 n, j3 100, and 20 V, evaluate the lw-frequency gain AM and the 3-dB frequency fh'