AD8601/AD8602/AD8604. Precision CMOS, Single-Supply, Rail-to-Rail, Input/Output Wideband Operational Amplifiers FEATURES PIN CONFIGURATIONS

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1 Precision CMOS, Single-Supply, Rail-to-Rail, Input/Output Wideband Operational Amplifiers FEATURES Low offset voltage: 5 μv maximum Single-supply operation: 2.7 V to 5.5 V Low supply current: 75 μa/amplifier Wide bandwidth: 8 MHz Slew rate: 5 V/μs Low distortion No phase reversal Low input currents Unity-gain stable APPLICATIONS Current sensing Barcode scanners PA controls Battery-powered instrumentation Multipole filters Sensors ASIC input or output amplifiers Audio GENERAL DESCRIPTION The AD86, AD862, and AD864 are single, dual, and quad rail-to-rail, input and output, single-supply amplifiers featuring very low offset voltage and wide signal bandwidth. These amplifiers use a new, patented trimming technique that achieves superior performance without laser trimming. All are fully specified to operate on a 3 V to 5 V single supply. The combination of low offsets, very low input bias currents, and high speed make these amplifiers useful in a wide variety of applications. Filters, integrators, diode amplifiers, shunt current sensors, and high impedance sensors all benefit from the combination of performance features. Audio and other ac applications benefit from the wide bandwidth and low distortion. For the most cost-sensitive applications, the D grades offer this ac performance with lower dc precision at a lower price point. Applications for these amplifiers include audio amplification for portable devices, portable phone headsets, bar code scanners, portable instruments, cellular PA controls, and multipole filters. The ability to swing rail-to-rail at both the input and output enables designers to buffer CMOS ADCs, DACs, ASICs, and other wide output swing devices in single-supply systems. PIN CONFIGURATIONS OUT A 5 V+ AD86 V 2 TOP VIEW (Not to Scale) +IN 3 4 IN Figure. 5-Lead SOT-23 (RJ Suffix) OUT A IN A 2 +IN A 3 V 4 AD862 TOP VIEW (Not to Scale) V+ 7 OUT B 6 IN B 5 +IN B Figure 2. 8-Lead MSOP (RM Suffix) and 8-Lead SOIC (R-Suffix) OUT A 4 OUT D IN A +IN A V+ +IN B IN B OUT B AD864 TOP VIEW (Not to Scale) IN D +IN D V +IN C IN C OUT C Figure 3. 4-Lead TSSOP (RU Suffix) and 4-Lead SOIC (R Suffix) OUT A IN A 2 +IN A 3 V+ 4 +IN B 5 IN B 6 OUT B 7 NC 8 AD864 TOP VIEW (Not to Scale) NC = NO CONNECT OUT D 5 IN D 4 +IN D 3 V 2 +IN C IN C OUT C 9 NC Figure 4. 6-Lead Shrink Small Outline QSOP (RQ Suffix) The AD86, AD862, and AD864 are specified over the extended industrial ( C to +25 C) temperature range. The AD86, single, is available in a tiny, 5-lead SOT-23 package. The AD862, dual, is available in 8-lead MSOP and 8-lead, narrow SOIC surface-mount packages. The AD864, quad, is available in 4-lead TSSOP, 4-lead SOIC, and 6-lead QSOP packages Rev. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 96, Norwood, MA 62-96, U.S.A. Tel: Fax: Analog Devices, Inc. All rights reserved.

2 TABLE OF CONTENTS Features... Applications... General Description... Pin Configurations... Revision History... 2 Specifications... 3 Electrical Characteristics... 3 Absolute Maximum Ratings... 5 Thermal Resistance... 5 ESD Caution... 5 Typical Performance Characteristics... 6 Theory of Operation... 5 Rail-to-Rail Input Stage... 5 Input Overvoltage Protection... 6 Overdrive Recovery... 6 Power-On Time... 6 Using the AD862 in High Source Impedance Applications 6 High Side and Low Side, Precision Current Monitoring... 6 Using the AD86 in Single-Supply, Mixed Signal Applications... 7 PC Compliance for Computer Audio Applications... 7 SPICE Model... 8 Outline Dimensions... 9 Ordering Guide REVISION HISTORY 2/ Rev. D to Rev. E Add 6-Lead QSOP... Universal Changes to Table 3 and Table Updated Outline Dimensions... 9 Changes to Ordering Guide /3 Rev. C to Rev. D Changes to Features... Changes to Ordering Guide /3 Rev. B to Rev. C Changes to Features... 3/3 Rev. A to Rev. B Change to Features... Change to Functional Block Diagrams... Change to TPC Changes to Figures 4 and Changes to Equations 2 and , 5 Updated Outline Dimensions... 6 Rev. E Page 2 of 24

3 SPECIFICATIONS ELECTRICAL CHARACTERISTICS VS = 3 V, VCM = VS/2, TA = 25 C, unless otherwise noted. Table. A Grade D Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage (AD86/AD862) VOS V VCM.3 V μv C TA +85 C 7 7 μv C TA +25 C 7 μv V VCM 3 V μv C TA +85 C 8 7 μv C TA +25 C 7 μv Offset Voltage (AD864) VOS VCM = V to.3 V μv C TA +85 C 8 7 μv C TA +25 C 6 7 μv VCM = V to 3. V μv C TA +85 C 2 7 μv C TA +25 C 7 μv Input Bias Current IB pa C TA +85 C pa C TA +25 C 5 5 pa Input Offset Current IOS. 3. pa C TA +85 C 5 pa C TA +25 C 5 5 pa Input Voltage Range 3 3 V Common-Mode Rejection Ratio CMRR VCM = V to 3 V db Large Signal Voltage Gain AVO VO =.5 V to 2.5 V, 3 6 V/mV RL = 2 kω, VCM = V Offset Voltage Drift ΔVOS/ΔT 2 2 μv/ C OUTPUT CHARACTERISTICS Output Voltage High VOH IL =. ma V C TA +25 C V Output Voltage Low VOL IL =. ma mv C TA +25 C 5 5 mv Output Current IOUT ±3 ±3 ma Closed-Loop Output Impedance ZOUT f = MHz, AV = 2 2 Ω POWER SUPPLY Power Supply Rejection Ratio PSRR VS = 2.7 V to 5.5 V db Supply Current/Amplifier ISY VO = V μa C TA +25 C 3 3 μa DYNAMIC PERFORMANCE Slew Rate SR RL = 2 kω V/μs Settling Time ts To.% <.5 <.5 μs Gain Bandwidth Product GBP MHz Phase Margin Φo 5 5 Degrees NOISE PERFORMANCE Voltage Noise Density en f = khz nv/ Hz f = khz 8 8 nv/ Hz Current Noise Density in.5.5 pa/ Hz For VCM between.3 V and.8 V, VOS may exceed specified value. Rev. E Page 3 of 24

4 VS = 5. V, VCM = VS/2, TA = 25 C, unless otherwise noted. Table 2. A Grade D Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage (AD86/AD862) VOS V VCM 5 V μv C TA +25 C 3 7 μv Offset Voltage (AD864) VOS VCM = V to 5 V μv C TA +25 C 7 7 μv Input Bias Current IB pa C TA +85 C pa C TA +25 C pa Input Offset Current IOS. 3. pa C TA +85 C pa C TA +25 C pa Input Voltage Range 5 5 V Common-Mode Rejection Ratio CMRR VCM = V to 5 V db Large Signal Voltage Gain AVO VO =.5 V to 4.5 V, V/mV RL = 2 kω, VCM = V Offset Voltage Drift ΔVOS/ΔT 2 2 μv/ C OUTPUT CHARACTERISTICS Output Voltage High VOH IL =. ma V IL = ma V C TA +25 C V Output Voltage Low VOL IL =. ma mv IL = ma mv C TA +25 C mv Output Current IOUT ±5 ±5 ma Closed-Loop Output Impedance ZOUT f = MHz, AV = Ω POWER SUPPLY Power Supply Rejection Ratio PSRR VS = 2.7 V to 5.5 V db Supply Current/Amplifier ISY VO = V μa C TA +25 C 5 5 μa DYNAMIC PERFORMANCE Slew Rate SR RL = 2 kω 6 6 V/μs Settling Time ts To.% <. <. μs Full Power Bandwidth BWp <% distortion khz Gain Bandwidth Product GBP MHz Phase Margin Φo Degrees NOISE PERFORMANCE Voltage Noise Density en f = khz nv/ Hz f = khz 8 8 nv/ Hz Current Noise Density in f = khz.5.5 pa/ Hz Rev. E Page 4 of 24

5 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage 6 V Input Voltage GND to VS Differential Input Voltage ±6 V Storage Temperature Range 65 C to +5 C Operating Temperature Range C to +25 C Junction Temperature Range 65 C to +5 C Lead Temperature Range (Soldering, 6 sec) 3 C ESD 2 kv HBM Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θja is specified for worst-case conditions, that is, a device soldered onto a circuit board for surface-mount packages using a standard 4-layer board. Table 4. Thermal Resistance Package Type θja θjc Unit 5-Lead SOT-23 (RJ) 9 92 C/W 8-Lead SOIC (R) 45 C/W 8-Lead MSOP (RM) C/W 4-Lead SOIC (R) 5 36 C/W 4-Lead TSSOP (RU) 2 35 C/W 6-Lead QSOP (RQ) 5 36 C/W ESD CAUTION Rev. E Page 5 of 24

6 TYPICAL PERFORMANCE CHARACTERISTICS 3, 2,5 V S = 3V V CM = V TO 3V 6 5 TO 85 C QUANTITY (Amplifiers) 2,,5, QUANTITY (Amplifiers) INPUT OFFSET VOLTAGE (mv) Figure 5. Input Offset Voltage Distribution TCVOS (µv/ C) Figure 8. Input Offset Voltage Drift Distribution QUANTITY (Amplifiers) 3, 2,5 2,,5, 5 V CM = V TO 5V INPUT OFFSET VOLTAGE (mv) V S = 3V INPUT OFFSET VOLTAGE (mv) Figure 6. Input Offset Voltage Distribution COMMON-MODE VOLTAGE (V) Figure 9. Input Offset Voltage vs. Common-Mode Voltage QUANTITY (Amplifiers) V S = 3V TO 85 C INPUT OFFSET VOLTAGE (mv) TCVOS (µv/ C) Figure 7. Input Offset Voltage Drift Distribution COMMON-MODE VOLTAGE (V) Figure. Input Offset Voltage vs. Common-Mode Voltage Rev. E Page 6 of 24

7 3 3 V S = 3V V S = 3V INPUT BIAS CURRENT (pa) INPUT OFFSET CURRENT (pa) TEMPERATURE ( C) Figure. Input Bias Current vs. Temperature TEMPERATURE ( C) Figure 4. Input Offset Current vs. Temperature INPUT BIAS CURRENT (pa) INPUT OFFSET CURRENT (pa) TEMPERATURE ( C) Figure 2. Input Bias Current vs. Temperature TEMPERATURE ( C) Figure 5. Input Offset Current vs. Temperature k V S = 2.7V 4 k INPUT BIAS CURRENT (pa) 3 2 OUTPUT VOLTAGE (mv) SOURCE SINK COMMON-MODE VOLTAGE (V) Figure 3. Input Bias Current vs. Common-Mode Voltage LOAD CURRENT (ma) Figure 6. Output Voltage to Supply Rail vs. Load Current Rev. E Page 7 of 24

8 k k 35 3 V S = 2.7V OUTPUT VOLTAGE (mv) SOURCE SINK OUTPUT VOLTAGE (mv) 25 5 V ma LOAD LOAD CURRENT (ma) Figure 7. Output Voltage to Supply Rail vs. Load Current TEMPERATURE ( C) Figure. Output Voltage Swing vs. Temperature V S = 2.7V OUTPUT VOLTAGE (V) V ma LOAD V ma LOAD OUTPUT VOLTAGE (V) V ma LOAD TEMPERATURE ( C) Figure 8. Output Voltage Swing vs. Temperature TEMPERATURE ( C) Figure 2. Output Voltage Swing vs. Temperature V S = 3V R L = NO LOAD 9 45 OUTPUT VOLTAGE (mv) 5 V ma LOAD GAIN (db) 6 PHASE GAIN PHASE SHIFT (Degrees) 5 27 V ma LOAD TEMPERATURE ( C) Figure 9. Output Voltage Swing vs. Temperature k k k M M M FREQUENCY (Hz) Figure 22. Open-Loop Gain and Phase vs. Frequency Rev. E Page 8 of 24

9 GAIN (db) 8 6 GAIN R L = NO LOAD PHASE PHASE SHIFT (Degrees) OUTPUT SWING (V p-p) V S = 2.7V V IN = 2.6V p-p R L = 2kΩ A V = k k k M M M FREQUENCY (Hz) Figure 23. Open-Loop Gain and Phase vs. Frequency k k k M M FREQUENCY (Hz) Figure 26. Closed-Loop Output Voltage Swing vs. Frequency CLOSD-LOOP GAIN (db) A V = A V = A V = V S = 3V OUTPUT SWING (V p-p) V IN = 4.9V p-p R L = 2kΩ A V = k k k M M M FREQUENCY (Hz) Figure 24. Closed-Loop Gain vs. Frequency k k k M M FREQUENCY (Hz) Figure 27. Closed-Loop Output Voltage Swing vs. Frequency A V = 8 6 V S = 3V CLOSD-LOOP GAIN (db) A V = A V = OUTPUT IMPEDANCE (Ω) 8 6 A V = A V = A V = k k k M M M FREQUENCY (Hz) Figure 25. Closed-Loop Gain vs. Frequency k k k M M M FREQUENCY (Hz) Figure 28. Output Impedance vs. Frequency Rev. E Page 9 of 24

10 8 6 OUTPUT IMPEDANCE (Ω) A V = A V = A V = POWER SUPPLY REJECTION (db) 8 6 k k k M M FREQUENCY (Hz) Figure 29. Output Impedance vs. Frequency k k k M M FREQUENCY (Hz) Figure 32. Power Supply Rejection Ratio vs. Frequency COMMON-MODE REJECTION (db) V S = 3V SMALL SIGNAL OVERSHOOT (%) V S = 2.7V R L = A V = OS +OS k k k M M M FREQUENCY (Hz) Figure 3. Common-Mode Rejection Ratio vs. Frequency k CAPACITANCE (pf) Figure 33. Small Signal Overshoot vs. Load Capacitance COMMON-MODE REJECTION (db) SMALL SIGNAL OVERSHOOT (%) R L = A V = OS +OS k k k M M M FREQUENCY (Hz) Figure 3. Common-Mode Rejection Ratio vs. Frequency k CAPACITANCE (pf) Figure 34. Small Signal Overshoot vs. Load Capacitance Rev. E Page of 24

11 SUPPLY CURRENT PER AMPLIFIER (ma) THD + N (%)... G = G = R L = 6Ω R L = 2kΩ R L = kω R L = 6Ω R L = 2kΩ R L = kω TEMPERATURE ( C) Figure 35. Supply Current per Amplifier vs. Temperature k k k FREQUENCY (Hz) Figure 38. Total Harmonic Distortion + Noise vs. Frequency SUPPLY CURRENT PER AMPLIFIER (ma) V S = 3V VOLTAGE NOISE DENSITY (nv/ Hz) V S = 2.7V TEMPERATURE ( C) Figure 36. Supply Current per Amplifier vs. Temperature FREQUENCY (khz) Figure 39. Voltage Noise Density vs. Frequency SUPPLY CURRENT PER AMPLIFIER (ma) VOLTAGE NOISE DENSITY (nv/ Hz) V S = 2.7V SUPPLY VOLTAGE (V) Figure 37. Supply Current per Amplifier vs. Supply Voltage FREQUENCY (khz) Figure. Voltage Noise Density vs. Frequency 525- Rev. E Page of 24

12 8 82 VOLTAGE NOISE DENSITY (nv/ Hz) VOLTAGE (2.5µV/DIV) FREQUENCY (khz) TIME (s/div) Figure 4. Voltage Noise Density vs. Frequency Figure 44.. Hz to Hz Input Voltage Noise VOLTAGE NOISE DENSITY (nv/ Hz) FREQUENCY (khz) R L = kω C L = pf 5mV/DIV ns/div Figure 42. Voltage Noise Density vs. Frequency Figure 45. Small Signal Transient Response V S = 2.7V V S = 2.7V R L = kω C L = pf VOLTAGE (2.5µV/DIV) TIME (s/div) mV/DIV ns/div Figure 43.. Hz to Hz Input Voltage Noise Figure 46. Small Signal Transient Response Rev. E Page 2 of 24

13 R L = kω C L = pf A V = V IN R L = kω A V = VOLTAGE (V/DIV) VOLTAGE (V/DIV) V OUT TIME (ns/div) TIME (2µs/DIV) Figure 47. Large Signal Transient Response Figure 5. No Phase Reversal V S = 2.7V R L = kω C L = pf A V = R L = kω V O = 2V p-p VOLTAGE (5mV/DIV) VOLTAGE (V) +.% ERROR.% ERROR V IN V OUT V IN TRACE.5V/DIV V OUT TRACE mv/div TIME (ns/div) TIME (ns/div) Figure 48. Large Signal Transient Response Figure 5. Settling Time V IN V S = 2.7V R L = kω A V = 2..5 V S = 2.7V VOLTAGE (V/DIV) V OUT OUTPUT SWING (V) %.%.%.%.5 TIME (2µs/DIV) Figure 49. No Phase Reversal SETTLING TIME (ns) Figure 52. Output Swing vs. Settling Time Rev. E Page 3 of 24

14 5 4 3 OUTPUT SWING (V) 2 2.%.%.%.% , SETTLING TIME (ns) Figure 53. Output Swing vs. Settling Time Rev. E Page 4 of 24

15 THEORY OF OPERATION The family of amplifiers are rail-to-rail input and output, precision CMOS amplifiers that operate from 2.7 V to 5. V of the power supply voltage. These amplifiers use Analog Devices, Inc., DigiTrim technology to achieve a higher degree of precision than available from most CMOS amplifiers. DigiTrim technology is a method of trimming the offset voltage of the amplifier after it has been assembled. The advantage in postpackage trimming lies in the fact that it corrects any offset voltages due to the mechanical stresses of assembly. This technology is scalable and used with every package option, including the 5-lead SOT-23, providing lower offset voltages than previously achieved in these small packages. The DigiTrim process is completed at the factory and does not add additional pins to the amplifier. All AD86x amplifiers are available in standard op amp pinouts, making DigiTrim completely transparent to the user. The AD86x can be used in any precision op amp application. The input stage of the amplifier is a true rail-to-rail architecture, allowing the input common-mode voltage range of the op amp to extend to both positive and negative supply rails. The voltage swing of the output stage is also rail-to-rail and is achieved by using an NMOS and PMOS transistor pair connected in a common-source configuration. The maximum output voltage swing is proportional to the output current, and larger currents limit how close the output voltage can get to the supply rail, which is a characteristic of all rail-to-rail output amplifiers. With ma of output current, the output voltage can reach within mv of the positive rail and within 5 mv of the negative rail. At light loads of > kω, the output swings within ~ mv of the supplies. The open-loop gain of the AD86x is 8 db, typical, with a load of 2 kω. Because of the rail-to-rail output configuration, the gain of the output stage and the open-loop gain of the amplifier are dependent on the load resistance. Open-loop gain decreases with smaller load resistances. Again, this is a characteristic inherent to all rail-to-rail output amplifiers. RAIL-TO-RAIL INPUT STAGE The input common-mode voltage range of the AD86x extends to both the positive and negative supply voltages. This maximizes the usable voltage range of the amplifier, an important feature for single-supply and low voltage applications. This rail-to-rail input range is achieved by using two input differential pairs, one NMOS and one PMOS, placed in parallel. The NMOS pair is active at the upper end of the common-mode voltage range, and the PMOS pair is active at the lower end. The NMOS and PMOS input stages are separately trimmed using DigiTrim to minimize the offset voltage in both differential pairs. Both NMOS and PMOS input differential pairs are active in a 5 mv transition region, when the input common-mode voltage is between approximately.5 V and V below the positive supply voltage. The input offset voltage shifts slightly in this transition region, as shown in Figure 9 and Figure.The common-mode rejection ratio is also slightly lower when the input commonmode voltage is within this transition band. Compared to the Burr-Brown OPA23UR rail-to-rail input amplifier, shown in Figure 54, the AD86x, shown in Figure 55, exhibits lower offset voltage shift across the entire input common-mode range, including the transition region. V OS (mv) V OS (mv) V CM (V) Figure 54. Burr-Brown OPA23UR Input Offset Voltage vs. Common-Mode Voltage, 24 SOIC 25 C V CM (V) Figure 55. AD862AR Input Offset Voltage vs. Common-Mode Voltage, 3 SOIC 25 C Rev. E Page 5 of 24

16 INPUT OVERVOLTAGE PROTECTION As with any semiconductor device, if a condition could exist that could cause the input voltage to exceed the power supply, the device s input overvoltage characteristic must be considered. Excess input voltage energizes the internal PN junctions in the AD86x, allowing current to flow from the input to the supplies. This input current does not damage the amplifier, provided it is limited to 5 ma or less. This can be ensured by placing a resistor in series with the input. For example, if the input voltage could exceed the supply by 5 V, the series resistor should be at least (5 V/5 ma) = kω. With the input voltage within the supply rails, a minimal amount of current is drawn into the inputs, which, in turn, causes a negligible voltage drop across the series resistor. Therefore, adding the series resistor does not adversely affect circuit performance. OVERDRIVE RECOVERY Overdrive recovery is defined as the time it takes the output of an amplifier to come off the supply rail when recovering from an overload signal. This is tested by placing the amplifier in a closed-loop gain of with an input square wave of 2 V p-p while the amplifier is powered from either 5 V or 3 V. The AD86x has excellent recovery time from overload conditions. The output recovers from the positive supply rail within ns at all supply voltages. Recovery from the negative rail is within 5 ns at a 5 V supply, decreasing to within 35 ns when the device is powered from 2.7 V. POWER-ON TIME The power-on time is important in portable applications where the supply voltage to the amplifier may be toggled to shut down the device to improve battery life. Fast power-up behavior ensures that the output of the amplifier quickly settles to its final voltage, improving the power-up speed of the entire system. When the supply voltage reaches a minimum of 2.5 V, the AD86x settles to a valid output within μs. This turn-on response time is faster than many other precision amplifiers, which can take tens or hundreds of microseconds for their outputs to settle. USING THE AD862 IN HIGH SOURCE IMPEDANCE APPLICATIONS The CMOS rail-to-rail input structure of the AD86x allows these amplifiers to have very low input bias currents, typically.2 pa. This allows the AD86x to be used in any application that has a high source impedance or must use large value resistances around the amplifier. For example, the photodiode amplifier circuit shown in Figure 56 requires a low input bias current op amp to reduce output voltage error. The AD86 minimizes offset errors due to its low input bias current and low offset voltage. The current through the photodiode is proportional to the incident light power on its surface. The 4.7 MΩ resistor converts this current into a voltage, with the output of the AD86 increasing at 4.7 V/μA. The feedback capacitor reduces excess noise at higher frequencies by limiting the bandwidth of the circuit to BW = () 2π ( 4.7 MΩ) CF Using a pf feedback capacitor limits the bandwidth to approximately 3.3 khz. D pf (OPTIONAL) 4.7MΩ AD86 V OUT 4.7V/µA Figure 56. Amplifier Photodiode Circuit HIGH SIDE AND LOW SIDE, PRECISION CURRENT MONITORING Because of its low input bias current and low offset voltage, the AD86x can be used for precision current monitoring. The true rail-to-rail input feature of the AD86x allows the amplifier to monitor current on either the high side or the low side. Using both amplifiers in an AD862 provides a simple method for monitoring both current supply and return paths for load or fault detection. Figure 57 and Figure 58 demonstrate both circuits. MONITOR OUTPUT Q 2N394 R Ω 3V 3V R2 249kΩ R SENSE.Ω 3V /2 AD862 Figure 57. Low-Side Current Monitor R Ω Q 2N395 MONITOR OUTPUT R SENSE.Ω R2 2.49kΩ 3V RETURN TO GROUND I L V+ /2 AD862 Figure 58. High-Side Current Monitor Rev. E Page 6 of 24

17 Voltage drop is created across the. Ω resistor that is proportional to the load current. This voltage appears at the inverting input of the amplifier due to the feedback correction around the op amp. This creates a current through R, which in turn, pulls current through R2. For the low side monitor, the monitor output voltage is given by RSENSE Monitor Output = 3 V R2 I L (2) R For the high side monitor, the monitor output voltage is R = I L (3) R SENSE Monitor Output R2 Using the components shown, the monitor output transfer function is 2.5 V/A. USING THE AD86 IN SINGLE-SUPPLY, MIXED SIGNAL APPLICATIONS Single-supply, mixed signal applications requiring or more bits of resolution demand both a minimum of distortion and a maximum range of voltage swing to optimize performance. To ensure that the ADCs or DACs achieve their best performance, an amplifier often must be used for buffering or signal conditioning. The 75 μv maximum offset voltage of the AD86 allows the amplifier to be used in 2-bit applications powered from a 3 V single supply, and its rail-to-rail input and output ensure no signal clipping. Figure 59 shows the AD86 used as an input buffer amplifier to the AD7476, a 2-bit, MSPS ADC. As with most ADCs, total harmonic distortion (THD) increases with higher source impedances. By using the AD86 in a buffer configuration, the low output impedance of the amplifier minimizes THD while the high input impedance and low bias current of the op amp minimizes errors due to source impedance. The 8 MHz gain bandwidth product of the AD86 ensures no signal attenuation up to 5 khz, which is the maximum Nyquist frequency for the AD7476. R S AD86 68nF µf TANT REF93.µF µf.µf V DD SCLK V IN SDATA GND CS AD7476/AD7477 SERIAL INTERFACE 5V SUPPLY µc/µp Figure 59. A Complete 3 V 2-Bit MHz Analog-to-Digital Conversion System Figure 6 demonstrates how the AD86 can be used as an output buffer for the DAC for driving heavy resistive loads. The AD53 is a 2-bit DAC that can be used with clock frequencies up to 3 MHz and signal frequencies up to 93 khz. The railto-rail output of the AD86 allows it to swing within mv of the positive supply rail while sourcing ma of current. The total current drawn from the circuit is less than ma, or 3 mw from a 3 V single supply. 3-WIRE SERIAL INTERFACE µf V AD AD86 V OUT V TO 3V Figure 6. Using the AD86 as a DAC Output Buffer to Drive Heavy Loads The AD86, AD7476, and AD53 are all available in spacesaving SOT-23 packages. PC COMPLIANCE FOR COMPUTER AUDIO APPLICATIONS Because of its low distortion and rail-to-rail input and output, the AD86x is an excellent choice for low cost, single-supply audio applications, ranging from microphone amplification to line output buffering. Figure 38 shows the total harmonic distortion plus noise (THD + N) figures for the AD86x. In unity gain, the amplifier has a typical THD + N of.4%, or 86 db, even with a load resistance of 6 Ω. This is compliant with the PC specification requirements for audio in both portable and desktop computers. Figure 6 shows how an AD862 can be interfaced with an AC 97 codec to drive the line output. Here, the AD862 is used as a unity-gain buffer from the left and right outputs of the AC 97 codec. The μf output coupling capacitors block dc current and the Ω series resistors protect the amplifier from short circuits at the jack. V DD 25 V DD 29 LEFT OUT 35 AD88 (AC 97) 5V 5V 2 8 A 3 4 AD862 C µf + R2 2kΩ R4 Ω C2 5 R5 RIGHT OUT 36 µf 7 Ω B 6 V SS 26 R3 2kΩ AD862 NOTES. ADDITIONAL PINS OMITTED FOR CLARITY. Figure 6. A PC-Compliant Line Output Amplifier + R L Rev. E Page 7 of 24

18 SPICE MODEL The SPICE macro-model for the AD86x amplifier can be downloaded at The model accurately simulates a number of both dc and ac parameters, including open-loop gain, bandwidth, phase margin, input voltage range, output voltage swing vs. output current, slew rate, input voltage noise, CMRR, PSRR, and supply current vs. supply voltage. The model is optimized for performance at 27 C. Although it functions at different temperatures, it may lose accuracy with respect to the actual behavior of the AD86x. Rev. E Page 8 of 24

19 OUTLINE DIMENSIONS BSC.95 BSC MAX.5 MIN.5 MAX.35 MIN.45 MAX.95 MIN SEATING PLANE. MAX.8 MIN 5. BSC COMPLIANT TO JEDEC STANDARDS MO-78-AA Figure Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters 268-A PIN IDENTIFIER.65 BSC COPLANARITY MAX 6 5 MAX.23.9 COMPLIANT TO JEDEC STANDARDS MO-87-AA Figure Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters B Rev. E Page 9 of 24

20 5. (.968) 4.8 (.89) 4. (.574) 3.8 (.497) (.244) 5.8 (.2284).25 (.98). (.) COPLANARITY. SEATING PLANE.27 (.5) BSC.75 (.688).35 (.532).5 (.).3 (.22) 8.25 (.98).7 (.67).5 (.96).25 (.99).27 (.5). (.57) 45 COMPLIANT TO JEDEC STANDARDS MS-2-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure Lead Standard Small Outline Package [SOIC_N] (R-8) Dimensions shown in millimeters and (inches) 27-A 8.75 (.3445) 8.55 (.3366) 4. (.575) 3.8 (.496) (.244) 5.8 (.2283).25 (.98). (.39) COPLANARITY..27 (.5) BSC.5 (.).3 (.22).75 (.689).35 (.53) SEATING PLANE 8.25 (.98).7 (.67).5 (.97).25 (.98).27 (.5). (.57) 45 COMPLIANT TO JEDEC STANDARDS MS-2-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure Lead Standard Small Outline Package [SOIC_N] (R-4) Dimensions shown in millimeters and (inches) 666-A Rev. E Page of 24

21 BSC 7 PIN BSC COPLANARITY.9.. MAX SEATING PLANE..9 COMPLIANT TO JEDEC STANDARDS MO-53-AB- Figure Lead Thin Shrink Small Outline Package [TSSOP] (RU-4) Dimensions shown in millimeters A.97 (5.).93 (4.9).89 (4.8) (4.).54 (3.9).5 (3.8).244 (6.).236 (5.99).228 (5.79).65 (.65).49 (.25).69 (.75).53 (.35). (.25).6 (.5). (.5). (.25). (.25).4 (.) COPLANARITY.4 (.).25 (.64) BSC.2 (.3).8 (.) SEATING PLANE 8.5 (.27).6 (.4).4 (.4) REF COMPLIANT TO JEDEC STANDARDS MO-37-AB CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure Lead Shrink Small Outline Package [QSOP] (RQ-6) Dimensions shown in inches and (millimeters) 288-A Rev. E Page 2 of 24

22 ORDERING GUIDE Model Temperature Range Package Description Package Option Branding AD86ARTZ-R2 C to +25 C 5-Lead SOT-23 RJ-5 AAA AD86ARTZ-REEL C to +25 C 5-Lead SOT-23 RJ-5 AAA AD86ARTZ-REEL7 C to +25 C 5-Lead SOT-23 RJ-5 AAA AD86WARTZ-RL C to +25 C 5-Lead SOT-23 RJ-5 AAA AD86WARTZ-R7 C to +25 C 5-Lead SOT-23 RJ-5 AAA AD86WDRTZ-REEL C to +25 C 5-Lead SOT-23 RJ-5 AD86WDRTZ-REEL7 C to +25 C 5-Lead SOT-23 RJ-5 AD862AR C to +25 C 8-Lead SOIC_N R-8 AD862AR-REEL C to +25 C 8-Lead SOIC_N R-8 AD862AR-REEL7 C to +25 C 8-Lead SOIC_N R-8 AD862ARZ C to +25 C 8-Lead SOIC_N R-8 AD862ARZ-REEL C to +25 C 8-Lead SOIC_N R-8 AD862ARZ-REEL7 C to +25 C 8-Lead SOIC_N R-8 AD862ARM-REEL C to +25 C 8-Lead MSOP RM-8 ABA AD862ARMZ C to +25 C 8-Lead MSOP RM-8 ABA AD862ARMZ-REEL C to +25 C 8-Lead MSOP RM-8 ABA AD862DR C to +25 C 8-Lead SOIC_N R-8 AD862DR-REEL C to +25 C 8-Lead SOIC_N R-8 AD862DR-REEL7 C to +25 C 8-Lead SOIC_N R-8 AD862DRZ C to +25 C 8-Lead SOIC_N R-8 AD862DRZ-REEL C to +25 C 8-Lead SOIC_N R-8 AD862DRZ-REEL7 C to +25 C 8-Lead SOIC_N R-8 AD862DRM-REEL C to +25 C 8-Lead MSOP RM-8 ABD AD862DRMZ-REEL C to +25 C 8-Lead MSOP RM-8 ABD AD864AR C to +25 C 4-Lead SOIC_N R-4 AD864AR-REEL C to +25 C 4-Lead SOIC_N R-4 AD864AR-REEL7 C to +25 C 4-Lead SOIC_N R-4 AD864ARZ C to +25 C 4-Lead SOIC_N R-4 AD864ARZ-REEL C to +25 C 4-Lead SOIC_N R-4 AD864ARZ-REEL7 C to +25 C 4-Lead SOIC_N R-4 AD864DRZ C to +25 C 4-Lead SOIC_N R-4 AD864DRZ-REEL C to +25 C 4-Lead SOIC_N R-4 AD864ARUZ C to +25 C 4-Lead TSSOP RU-4 AD864ARUZ-REEL C to +25 C 4-Lead TSSOP RU-4 AD864DRU C to +25 C 4-Lead TSSOP RU-4 AD864DRU -REEL C to +25 C 4-Lead TSSOP RU-4 AD864DRUZ C to +25 C 4-Lead TSSOP RU-4 AD864DRUZ-REEL C to +25 C 4-Lead TSSOP RU-4 AD864ARQZ C to +25 C 6-Lead QSOP RQ-6 AD864ARQZ-RL C to +25 C 6-Lead QSOP RQ-6 AD864ARQZ-R7 C to +25 C 6-Lead QSOP RQ-6 Z = RoHS Compliant Part. Rev. E Page 22 of 24

23 NOTES Rev. E Page 23 of 24

24 NOTES Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D525--2/(E) Rev. E Page 24 of 24