Department of Electrical and Electronics Engineering Logic Circuits Laboratory EXPERIMENT-5 COMBINATIONAL LOGIC CIRCUITS

Size: px

Start display at page:

Download "Department of Electrical and Electronics Engineering Logic Circuits Laboratory EXPERIMENT-5 COMBINATIONAL LOGIC CIRCUITS"

Edith Harper
5 years ago
Views:

1 5.1 Preliminary Study Simulate experiment using an available tool and prepare the preliminary report. 5.2 Aim of the Experiment Implementation and examination of MULTIPLEXER and DEMULTIPLEXER circuits and their basic operations by using MSI logic elements. 5.3 Basic Theory In this experiment, multiplexer and demultiplexer logic circuits will be examinate according to the fourth experiment Multiplexers The process of Multiplexing means transmitting more than one knowledge by using less channel or line. A digital multiplexer is a combinational circuits which select only one of the input data and than give it to the output line. Selecting any of the in the selection process at the input line is controlled by select lines. In Fig. 5.1, a multiplexer has 2 N input, N select input and 1 output. This multiplexer circuit with 2 N inputs and 1 output multiplexer is called Nx1. In general, 2x1, 4x1, 8x1, 16x1 multiplexer circuits can ben created. Figure 5.1 The general apprence of Multiplexer Circuit In Fig. 5.2 and Table 5.1 shows the 4x1 multiplexer circuit and its truth table. As shown in Fig. 5.2, 4 binary inputs and 2 select line required to select one of these binary inputs are available. According to the select data which is applied to the select line be selected and output data is transfered to the output line. For a further information a selective multiplexer circuits is alsa referred as data selector. If the multiplexed data more than 1 bit, similary, requried multiplexer circuits can be generated. For example, when we would likte to multiplex the data block as A4 A3 A2 A1 and B4 B3 B2 B1, in Fig. 5.3, we can see the multiplexer circuits which makes this process. As in Fig. 5.3, block A is S=0, S=1 the B block of information transferred to the selected output. 1

2 Table 5.1 Truth table of 4x1 Multiplexer S 1 S 0 Y 0 0 I0 0 1 I1 1 0 I2 1 1 I3 Figure 5.2 4x1 Multiplexer circuit Figure 5.3 Quad 2x1 multiplexer 2

3 5.3.2 Demultiplexers Demultiplexer circuit is one of the combinational circuits which operates opposite to multiplexer circuits. A demultiplexer circuit with N select lines is transmit the input data by using one input line to the 2 N output lines according to the select data. In Fig. 5.4, a demultiplexer has 1 input, 2 N output and N select lines. Figure 5.4 The general apprence of Demultiplexer Circuit In general, 1x2, 1x4, 1x8, 1x16 demultiplexer circuits can ben created. In Fig. 5.5 and Table 5.2 shows the 1x4 demultiplexer circuit and its truth table. This circuit is also 2x4 decoder circuit. The diffrence between 2x4 decoder and 1x4 demultiplexer circuits are the input lines which are used in decoder circuit are select lines for the demultiplexer circuits. Enable line in decoder circuit is input line for demultiplexer circuit. Figure 5.5 1x4 Demultiplexer circuit Table 5.2 Truth table of 1x4 Demultiplexer INPUTS OUTPUTS E A B D 0 D 1 D 2 D 3 1 X X

5.4 Components Used In This Experiment Cadet Masterlab experiment set 74LS151 (1 quantity) 74LS153 (1 quantity) 74LS155 (1 quantity) 74LS157 (1 quantity) 74LS04 (1 quantity) LED (10 quantity) 270 ohm

Set up and examine 1x4 demultiplexer circuits by using 74155 IC chip. A two bits comparator will be implemented. The numbers A and B consist of 2 bits. If A B the output of the circuit is equal to 1.

4 5.4 Components Used In This Experiment Cadet Masterlab experiment set 74LS151 (1 quantity) 74LS153 (1 quantity) 74LS155 (1 quantity) 74LS157 (1 quantity) 74LS04 (1 quantity) LED (10 quantity) 270 ohm (1 quantity) Connection Cables 5.5 Experiment Study Set up and examine 8x1 multiplexer circuits by using 74LS153 and 74LS157 IC chip. Set up and examine 1x4 demultiplexer circuits by using IC chip. A two bits comparator will be implemented. The numbers A and B consist of 2 bits. If A B the output of the circuit is equal to 1. Otherwise the output is 0. Design the circuit with one 4x1 MUX and minimum number of external gates. A two bits comparator will be implemented. The numbers A and B consist of 2 bits. If A B the output of the circuit is equal to 0. Otherwise the output is 1. Design the circuit with one 8x1 MUX and minimum number of external gates. 5.6 Experiment Problems 1. Set up and examine 16x1 MUX using 2x1 MUX. 2. Set up and examine 16x1 MUX using 4x1 MUX. 3. Set up and examine DEMUX circuit by using 4x1 DEMUX which can select four bits data groups. 5.7 Catalog Information 1. 74LS151 Catalog Information 2. 74LS153 Catalog Information 4

5 3. 74LS155 Catalog Information 4. 74LS157 Catalog Information 5

Chapter 3 Combinational Logic Design

Logic and Computer Design Fundamentals Chapter 3 Combinational Logic Design Part 2 Combinational Logic Overview Part -Implementation Technology and Logic Design Design Concepts Fundamental concepts of