2 Building Blocks. There is often the need to compare two binary values.

Size: px
Start display at page:

Download "2 Building Blocks. There is often the need to compare two binary values."

Transcription

1 2 Building Blocks 2.1 Comparators There is often the need to compare two binary values. This is done using a comparator. A comparator determines whether binary values A and B are: 1. A = B 2. A < B 3. A > B Equality The XOR can be used to compare equality. It will give a 0 when the two bits are equal and a 1 when they are unequal. To get a HIGH for equality and a LOW for inequality an XNOR can be used. X Y XOR XNOR Comment Equal Not Equal Not Equal Equal One XNOR compares one bit. To compare multiple bits, we need a XNOR for each bit. The circuit to compare two nibbles (4 bits) is shown below: A0 B0 A1 B1 A2 B2 A3 B3 = MEE1004 Digital Networks and Systems 26

2 2.1.2 Integrated Circuit Comparators Many integrated circuit comparators contain outputs for: A = B A < B A > B They are designed for cascading together and contain inputs for A = B from the preceding stage A < B from the preceding stage A > B from the preceding stage The 74LS85 is a TTL 4 bit magnitude comparator. Q. How can we compare an 8 bit number? A. By cascading two 7485 comparators. One to compare the Least Significant Nibble. One to compare the Most Significant Nibble. A0 A1 A2 A3 B0 B1 B2 B3 A0 A1 A2 A3 B0 B1 B2 B3 A<Bi A=Bi A>Bi A<Bo A=Bo A>Bo A4 A5 A6 A7 B4 B5 B6 B7 A0 A1 A2 A3 B0 B1 B2 B3 A<Bi A=Bi A>Bi A<Bo A=Bo A>Bo A < B = A > B LSN MSN Stage 1 Stage 2 MEE1004 Digital Networks and Systems 27

3 2.2 Decoders Decoding is taking a code (binary, BCD, hex etc) and activating a single output representing its numeric value Method to create a decoder 1. Generate a truth table 2. Find an expression for each output. (Karnaugh) to 4 decoder A 2 bit value can activate 1 of 4 possible output lines. 0 1 LSB MSB DECODER Boolean Expressions Z0 = /A. /B Z1 = /A. B Z2 = A. /B Z3 = A. B A B Z3 Z2 Z1 Z0 Expression Z0 = /A./B Z1 = /A. B Z2 = A./B Z3 = A. B MEE1004 Digital Networks and Systems 28

4 We can then construct the circuit for each output. A B Z0 Z1 Z2 Z3 MEE1004 Digital Networks and Systems 29

5 2.3 Encoders Encoding is taking a single input representing a numeric value and converting it to its equivalent code (binary, BCD, hex etc). This is the reverse of decoding Method to create a encoder 1. Generate a truth table 2. Find an expression for each output. (Karnaugh) to 2 line binary encoder One of 4 lines is encoded into binary. 0 1 D C Encoder DECODER 2 B MSB 1 3 A LSB 0 A B C D Z1 Z Boolean Expressions Z1 = A + B Z0 = A + C Note: D is not used. MEE1004 Digital Networks and Systems 30

6 We can then construct the circuit for each output. A B Z1 C Z0 D N / C MEE1004 Digital Networks and Systems 31

7 2.4 Code Convertors Gray Code Gray code is a very useful code in electronics and is used for indicating the angular position of the shaft on a motor. Gray code allows only one bit to change when moving from one code to the next. You are familiar with this concept when writing the inputs for a Karnaugh Map. eg A B, AB, AB, AB eg 2 bit Gray code ( 00, 01, 11, 10 ) 2 bit Gray code Decimal Binary Gray Note: The Gray code can easily roll back to itself 00, 01, 11, 10 00, 01 etc. Sensors The angular position of a motor s shaft can be determined by connecting a wheel to the motor s shaft. The wheel has a code stored at different positions around it. The more codes stored on the wheel, the greater the accuracy. Each code is stored on a separate segment of the wheel. Each segment is divided into rings which allows each sector to represent a binary digit. When the motor turns, the wheel connected to the shaft also turns. Sensors in a fixed position above the wheel pick up the codes and use them to state the position of the wheel and hence the shaft. If a binary code is used then as the wheel changes from position 3 to position 0, the binary read goes from 11 to 00. If the sensors are not perfectly in line and were read on the transition from position 3 to 0, then values of 01 or 10 could occur depending upon the misalignment. Therefore there is a potential for a large error using a binary scheme. MEE1004 Digital Networks and Systems 32

8 If a gray code was used then as the wheel changes from position 3 to position 0, the binary read goes from 10 to 00. If the sensors were misaligned and read on a transition from position 3 to position 0 then it could only read 10 or 00. This eliminates the problem. Converting Binary to Gray Code. 1. The Most Significant Bit (MSB) in the Gray code is the same as the binary number. 2. Going from the MSB to LSB (left to right), add the current bit to the next bit (right) ignoring the carry. The result of the addition is the gray code bit. For example to find the gray code for Binary Action Gray Bit MSB Therefore the Gray code for is B0 G0 B1 G1 B2 G2 B3 G3 (MSB) MEE1004 Digital Networks and Systems 33

9 Converting Gray Code to Binary. 1. The Most Significant Bit (MSB) in the Gray code is the same as the binary number. 2. Going from the MSB to LSB (left to right), add the current gray code bit to the last binary bit found ignoring the carry. The result of the addition is the binary code bit. For example to convert a gray code of to binary Gray Code Previous Action Binary Binary N/A MSB Therefore the Binary for a Gray code of is G0 B0 G1 B1 G2 G3 B2 B3 (MSB) MEE1004 Digital Networks and Systems 34

10 2.4.2 BCD to Binary BCD is a binary code that is used to represent each decimal digit. Therefore each decimal digit is represented with 0000 (0) to 1001 (9). Eg Weight: Decimal: 2 9 BCD: Binary: Therefore we must assign a weight to each bit. Wherever there is a 1 in the BCD digit we add the weight. BCD Bit Weight Binary BCD 29 is Weight Binary = Integrated Circuit Converter The is a 6 bit BCD to binary converter. MEE1004 Digital Networks and Systems 35

11 2.4.3 Binary to BCD BCD is a binary code that is used to represent each decimal digit. Therefore each decimal digit is represented with 0000 (0) to 1001 (9) A 4 bit binary code has 16 values 0000 (0) to 1111 (15). The binary numbers from 0000 (0) to 1001 (9) can represent their values. The binary numbers from 1010 (10) to 1111 (15) can be converted to BCD by adding 6. Note that this will generate a carry. Example 10: = (1) 0000 BCD: 1_0 15: = (1) 0101 BCD: 1_5 The circuit to perform the binary to BCD conversion is given below. It consists of a magnitude comparator and an adder. A B C D LO LO A1 A2 A3 A4 B1 B2 B3 B4 S1 S2 S3 S4 7483A LSB MSB LO C0 C4 9 HI LO LO HI LO HI LO A0 A1 A2 A3 B0 B1 B2 B3 A<Bi A=Bi A>Bi 7485 A<Bo A=Bo A>Bo Integrated Circuit Converter The is a 6 bit binary to BCD converter. MEE1004 Digital Networks and Systems 36

12 2.4.4 BCD to 7 segment The 7 segment display is widely used as a numeric display in many everyday devices All the digits can be constructed out of 7 lines arranged in an 8 pattern: In a 7 segment display each line is made up out of a LED or LCD bar. The bar is switched on according to pattern required by the BCD digit. A code converter is used to convert from BCD to the 7 segments. Integrated Circuit Converter The 7447 is the BCD to 7 segment converter. Exercise Draw the circuits to the BCD to 7 segment converter. There should be 7 equations. Hint: Create the truth table for each segment, minimise using Karnuagh maps, and draw the resulting circuit. MEE1004 Digital Networks and Systems 37

13 2.5 Multiplexers A multiplexer is a circuit that allows digital information from several sources to be routed onto a single line. This is the equivalent of a digital switch. Data is input into the lines D0 D1. Data select inputs determine which input is connected to the output. A multiplexor is also known as Data Selector. A 4 to 1 line multiplexor is shown below. D0 D1 D2 Z D3 S1 S0 The control lines S0 & S1 can have 4 binary settings. Therefore the output (Z) can be connected to any one of the inputs (D0 to D3). Truth Table for 4 to 1 line multiplexor S1 S0 Z 0 0 D0 0 1 D1 1 0 D2 1 1 D3 MEE1004 Digital Networks and Systems 38

14 2.5.1 Design of Multiplexors Using the property that X. 1 = X Selectors ANDed together to give Decide upon the number of input Data lines required 2 n = Number of data lines required 2. The number of selector lines required will be n from the above equation. 3. Generate a truth table including selector states and output. 4. For each input data line, AND it with its equivalent selector state. 5. OR the result of all the ANDs. D0 S1 S0 D1 D2 Z D3 MEE1004 Digital Networks and Systems 39

15 2.5.2 Using A Multiplexer for Combinational Logic A multiplexer can be used to replace combinational logic If the expression is complex, it may require many ICs. If the logic is replaced with a single multiplexer then only one IC is required. The concept is that the inputs from the truth table form the selector for the multiplexer. Each Data line is set to the appropriate output value from the truth table. When the selector value is set, the output is connected to the associated Data Line. Hence the output line of the multiplexer passes the output value from the truth table that is associated with the input values from the truth table. Method 1. Generate a truth table. 2. The inputs in the truth table are the selectors of the Multiplexer. 3. Each output term in the truth table corresponds to one Data Input line of the Multiplexer. 4. Tie each Data Input Line to the corresponding output value from the truth table. Example Refer to the Judges scoring system example used in module 1. Green = BC + AC + AB Truth Table A B C Green MUX D D D D D D D D7 HI A B C LO D0 D1 D2 D3 D4 D5 D6 D7 A B C Y Green The original solution requires 2 x 14 pin ICs. ( 1 x 7432, 1 x 7408 ) The multiplexer solution requires 1 x 16 pin IC. MEE1004 Digital Networks and Systems 40

16 2.6 Demultiplexers A demultiplexer is a circuit that takes a single input and routes it to only one of the possible output lines. This is the equivalent of a digital switch. This acts in reverse to a multiplexer. Data is output from lines D0 D1. Data select inputs determine which output is connected to the input. A demultiplexor is also known as Data Spreader. A 1 to 4 line demultiplexor is shown below. D0 Z D1 D2 D3 S1 S0 The control lines S0 & S1 can have 4 binary settings. Therefore the input (Z) can be connected to any one of the outputs (D0 to D3). Truth Table for 1 to 4 line demultiplexor Where Z is the input data. S1 S0 D0 D1 D2 D3 0 0 Z Z Z Z MEE1004 Digital Networks and Systems 41

17 2.6.1 Design of Demultiplexers Using the property that X. 1 = X Selectors ANDed together to give Decide upon the number of output Data lines required 2 n = Number of data lines required 2. The number of selector lines required will be n from the above equation. 3. Generate a truth table including selector states and data lines. 4. Each output data line will be the input data (Z) ANDed with its equivalent selector state. Z S1 S0 D0 D1 D2 D3 MEE1004 Digital Networks and Systems 42

18 2.7 Parity Errors can occur in the transmission of data from one computer to another. We need a method to determine if an error has occurred. Parity allows us to detect a single bit error in the data bits sent. Usually these are grouped in bytes. To use parity to detect errors we must append a parity bit to the data bits transmitted. Any group of bits may contain an even or odd number of 1 s. The parity bit is used to set the total number of 1 s to an even number or an odd number. Even parity uses the parity bit to make the total number of 1 s an even number. Odd parity uses the parity bit to make the total number of 1 s an odd number. Example Q What is value of the parity bit required to make 1011 (a) even parity (b) odd parity A 1011 contains three 1 s. This is an odd number of 1 s. (a) parity bit = 1 to make 4 x 1 s, an even number. (b) parity bit = 0 to make 3 x 1 s, an odd number. Error Detection We must know the type of parity used for the received data. The received data will have a parity bit. This can be checked by summing together all the bits in the data received. For even parity, the sum of all the bits including the parity bit will be 0. For odd parity the sum of all the bits including the parity bit will be 1. MEE1004 Digital Networks and Systems 43

19 The bits can be summed using XOR circuits in the following manner: A0 A1 Sum Summing 2 bits. A0 A1 A2 A3 Sum Summing 4 bits (nibble). A0 A1 A2 A3 Sum A4 A5 A6 A7 Summing 8 bits (byte). MEE1004 Digital Networks and Systems 44

Digital Electronics. Functions of Combinational Logic

Digital Electronics. Functions of Combinational Logic Digital Electronics Functions of Combinational Logic Half-dder Basic rules of binary addition are performed by a half adder, which has two binary inputs ( and B) and two binary outputs (Carry out and Sum).

More information

Digital Electronics 8. Multiplexer & Demultiplexer

Digital Electronics 8. Multiplexer & Demultiplexer 1 Module -8 Multiplexers and Demultiplexers 1 Introduction 2 Principles of Multiplexing and Demultiplexing 3 Multiplexer 3.1 Types of multiplexer 3.2 A 2 to 1 multiplexer 3.3 A 4 to 1 multiplexer 3.4 Multiplex

More information

Combinational Logic Circuits. Combinational Logic

Combinational Logic Circuits. Combinational Logic Combinational Logic Circuits The outputs of Combinational Logic Circuits are only determined by the logical function of their current input state, logic 0 or logic 1, at any given instant in time. The

More information

CHW 261: Logic Design

CHW 261: Logic Design CHW 6: Logic Design Instructors: Prof. Hala Zayed Dr. Ahmed Shalaby http://www.bu.edu.eg/staff/halazayed4 http://bu.edu.eg/staff/ahmedshalaby4# Slide Copyright 6 by Pearson Education, Inc. Upper Saddle

More information

EXPERIMENT NO 1 TRUTH TABLE (1)

EXPERIMENT NO 1 TRUTH TABLE (1) EPERIMENT NO AIM: To verify the Demorgan s theorems. APPARATUS REQUIRED: THEORY: Digital logic trainer and Patch cords. The digital signals are discrete in nature and can only assume one of the two values

More information

Function Table of an Odd-Parity Generator Circuit

Function Table of an Odd-Parity Generator Circuit Implementation of an Odd-Parity Generator Circuit The first step in implementing any circuit is to represent its operation in terms of a Truth or Function table. The function table for an 8-bit data as

More information

Module 4: Design and Analysis of Combinational Circuits 1. Module-4. Design and Analysis of Combinational Circuits

Module 4: Design and Analysis of Combinational Circuits 1. Module-4. Design and Analysis of Combinational Circuits 1 Module-4 Design and Analysis of Combinational Circuits 4.1 Motivation: This topic develops the fundamental understanding and design of adder, substractor, code converter multiplexer, demultiplexer etc

More information

MAHALAKSHMI ENGINEERING COLLEGE TIRUCHIRAPALLI

MAHALAKSHMI ENGINEERING COLLEGE TIRUCHIRAPALLI MAHALAKSHMI ENGINEERING COLLEGE TIRUCHIRAPALLI 6 DEPARTMENT: ECE QUESTION BANK SUBJECT NAME: DIGITAL SYSTEM DESIGN SEMESTER III SUBJECT CODE: EC UNIT : Design of Combinational Circuits PART -A ( Marks).

More information

CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam

CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam MIDTERM EXAMINATION 2011 (October-November) Q-21 Draw function table of a half adder circuit? (2) Answer: - Page

More information

COMBINATIONAL CIRCUIT

COMBINATIONAL CIRCUIT Combinational circuit is a circuit in which we combine the different gates in the circuit, for example encoder, decoder, multiplexer and demultiplexer. Some of the characteristics of combinational circuits

More information

UNIT-IV Combinational Logic

UNIT-IV Combinational Logic UNIT-IV Combinational Logic Introduction: The signals are usually represented by discrete bands of analog levels in digital electronic circuits or digital electronics instead of continuous ranges represented

More information

LOGIC DIAGRAM: HALF ADDER TRUTH TABLE: A B CARRY SUM. 2012/ODD/III/ECE/DE/LM Page No. 1

LOGIC DIAGRAM: HALF ADDER TRUTH TABLE: A B CARRY SUM. 2012/ODD/III/ECE/DE/LM Page No. 1 LOGIC DIAGRAM: HALF ADDER TRUTH TABLE: A B CARRY SUM K-Map for SUM: K-Map for CARRY: SUM = A B + AB CARRY = AB 22/ODD/III/ECE/DE/LM Page No. EXPT NO: DATE : DESIGN OF ADDER AND SUBTRACTOR AIM: To design

More information

Laboratory Manual CS (P) Digital Systems Lab

Laboratory Manual CS (P) Digital Systems Lab Laboratory Manual CS 09 408 (P) Digital Systems Lab INDEX CYCLE I A. Familiarization of digital ICs and digital IC trainer kit 1 Verification of truth tables B. Study of combinational circuits 2. Verification

More information

Number system: the system used to count discrete units is called number. Decimal system: the number system that contains 10 distinguished

Number system: the system used to count discrete units is called number. Decimal system: the number system that contains 10 distinguished Number system: the system used to count discrete units is called number system Decimal system: the number system that contains 10 distinguished symbols that is 0-9 or digits is called decimal system. As

More information

Digital Applications (CETT 1415) Credit: 4 semester credit hours (3 hours lecture, 4 hours lab) Prerequisite: CETT 1403 & CETT 1405

Digital Applications (CETT 1415) Credit: 4 semester credit hours (3 hours lecture, 4 hours lab) Prerequisite: CETT 1403 & CETT 1405 Digital Applications () Credit: 4 semester credit hours (3 hours lecture, 4 hours lab) Prerequisite: CETT 1403 & CETT 1405 Course Description This course covers digital techniques and numbering systems,

More information

LIST OF EXPERIMENTS. KCTCET/ /Odd/3rd/ETE/CSE/LM

LIST OF EXPERIMENTS. KCTCET/ /Odd/3rd/ETE/CSE/LM LIST OF EXPERIMENTS. Study of logic gates. 2. Design and implementation of adders and subtractors using logic gates. 3. Design and implementation of code converters using logic gates. 4. Design and implementation

More information

SRV ENGINEERING COLLEGE SEMBODAI RUKMANI VARATHARAJAN ENGINEERING COLLEGE SEMBODAI

SRV ENGINEERING COLLEGE SEMBODAI RUKMANI VARATHARAJAN ENGINEERING COLLEGE SEMBODAI SEMBODAI RUKMANI VARATHARAJAN ENGINEERING COLLEGE SEMBODAI 6489 (Approved By AICTE,Newdelhi Affiliated To ANNA UNIVERSITY::Chennai) CS 62 DIGITAL ELECTRONICS LAB (REGULATION-23) LAB MANUAL DEPARTMENT OF

More information

LOGIC GATES AND LOGIC CIRCUITS A logic gate is an elementary building block of a Digital Circuit. Most logic gates have two inputs and one output.

LOGIC GATES AND LOGIC CIRCUITS A logic gate is an elementary building block of a Digital Circuit. Most logic gates have two inputs and one output. LOGIC GATES AND LOGIC CIRCUITS A logic gate is an elementary building block of a Digital Circuit. Most logic gates have two inputs and one output. At any given moment, every terminal is in one of the two

More information

FUNCTION OF COMBINATIONAL LOGIC CIRCUIT

FUNCTION OF COMBINATIONAL LOGIC CIRCUIT HAPTER FUNTION OF OMBINATIONAL LOGI IRUIT OUTLINE HALF-ADDER ANF FULL ADDER IRUIT -BIT PARALLEL BINARY RIPPLE ARRY ADDER -BIT PARALLEL BINARY ARRY LOOK- AHEAD ADDER BD ADDER IRUIT DEODER ENODER MULTIPLEXER

More information

Department of Electronics and Communication Engineering

Department of Electronics and Communication Engineering Department of Electronics and Communication Engineering Sub Code/Name: BEC3L2- DIGITAL ELECTRONICS LAB Name Reg No Branch Year & Semester : : : : LIST OF EXPERIMENTS Sl No Experiments Page No Study of

More information

Combinational Logic. Rab Nawaz Khan Jadoon DCS. Lecturer COMSATS Lahore Pakistan. Department of Computer Science

Combinational Logic. Rab Nawaz Khan Jadoon DCS. Lecturer COMSATS Lahore Pakistan. Department of Computer Science Combinational Logic Rab Nawaz Khan Jadoon DCS COMSATS Institute of Information Technology Lecturer COMSATS Lahore Pakistan Digital Logic and Computer Design 2 Combinational logic A combinational circuit

More information

Digital Fundamentals

Digital Fundamentals Digital Fundamentals Tenth Edition Floyd Chapter 6 组合逻辑电路函数 Floyd, Digital Fundamentals, th ed 29 Pearson Education, Upper 28 Pearson Saddle River, Education NJ 7458. All Rights Reserved Summary Half-Adder

More information

Lab 2: Combinational Circuits Design

Lab 2: Combinational Circuits Design Lab : Combinational Circuits Design PURPOSE: The purpose of this laboratory assignment is to investigate the design of combinational circuits using SSI circuits and basic logic gates such as ANDs, ORs,

More information

MSI Design Examples. Designing a circuit that adds three 4-bit numbers

MSI Design Examples. Designing a circuit that adds three 4-bit numbers MSI Design Examples In this lesson, you will see some design examples using MSI devices. These examples are: Designing a circuit that adds three 4-bit numbers. Design of a 4-to-16 Decoder using five 2-to-4

More information

Electronics. Digital Electronics

Electronics. Digital Electronics Electronics Digital Electronics Introduction Unlike a linear, or analogue circuit which contains signals that are constantly changing from one value to another, such as amplitude or frequency, digital

More information

TABLE 3-2 Truth Table for Code Converter Example

TABLE 3-2 Truth Table for Code Converter Example 997 by Prentice-Hall, Inc. Mano & Kime Upper Saddle River, New Jersey 7458 T-28 TABLE 3-2 Truth Table for Code Converter Example Decimal Digit Input BCD Output Excess-3 A B C D W Y Z 2 3 4 5 6 7 8 9 Truth

More information

Digital Applications (CETT 1415) Credit: 4 semester credit hours (3 hours lecture, 4 hours lab) Prerequisite: CETT 1403 & CETT 1405

Digital Applications (CETT 1415) Credit: 4 semester credit hours (3 hours lecture, 4 hours lab) Prerequisite: CETT 1403 & CETT 1405 Digital Applications (CETT 1415) Credit: 4 semester credit hours (3 hours lecture, 4 hours lab) Prerequisite: CETT 1403 & CETT 1405 Course Description This course covers digital techniques and numbering

More information

Unit 3. Logic Design

Unit 3. Logic Design EE 2: Digital Logic Circuit Design Dr Radwan E Abdel-Aal, COE Logic and Computer Design Fundamentals Unit 3 Chapter Combinational 3 Combinational Logic Logic Design - Introduction to Analysis & Design

More information

Odd-Prime Number Detector The table of minterms is represented. Table 13.1

Odd-Prime Number Detector The table of minterms is represented. Table 13.1 Odd-Prime Number Detector The table of minterms is represented. Table 13.1 Minterm A B C D E 1 0 0 0 0 1 3 0 0 0 1 1 5 0 0 1 0 1 7 0 0 1 1 1 11 0 1 0 1 1 13 0 1 1 0 1 17 1 0 0 0 1 19 1 0 0 1 1 23 1 0 1

More information

COLLEGE OF ENGINEERING, NASIK

COLLEGE OF ENGINEERING, NASIK Pune Vidyarthi Griha s COLLEGE OF ENGINEERING, NASIK LAB MANUAL DIGITAL ELECTRONICS LABORATORY Subject Code: 2246 27-8 PUNE VIDYARTHI GRIHA S COLLEGE OF ENGINEERING,NASHIK. INDEX Batch : - Sr.No Title

More information

University of Technology

University of Technology University of Technology Lecturer: Dr. Sinan Majid Course Title: microprocessors 4 th year Lecture 7 & 8 NAND and XOR Implementations Combinational Design Procedure NAND-NAND & NOR-NOR Networks DeMorgan

More information

Chapter 1: Digital logic

Chapter 1: Digital logic Chapter 1: Digital logic I. Overview In PHYS 252, you learned the essentials of circuit analysis, including the concepts of impedance, amplification, feedback and frequency analysis. Most of the circuits

More information

Digital Logic Design ELCT 201

Digital Logic Design ELCT 201 Faculty of Information Engineering and Technology Dr. Haitham Omran and Dr. Wassim Alexan Digital Logic Design ELCT 201 Winter 2017 Midterm Exam Second Chance Please tick the box of your major: IET MET

More information

Logic Circuit Design

Logic Circuit Design Logic Circuit Design we have studied Truth Tables Logic gates Logic algebra K-maps 1 All these are tools Tools Truth Tables Logic gates Logic algebra K-maps 2 All these are tools Tools Truth Tables Logic

More information

DELD UNIT 3. Question Option A Option B Option C Option D Correct Option A B C

DELD UNIT 3. Question Option A Option B Option C Option D Correct Option A B C Class : S.E.Comp Matoshri College of Engineering and Research Center Nasik Department of Computer Engineering Digital Elecronics and Logic Design (DELD) UNIT - III Subject : DELD Sr. No. Question Option

More information

16 Multiplexers and De-multiplexers using gates and ICs. (74150, 74154)

16 Multiplexers and De-multiplexers using gates and ICs. (74150, 74154) 16 Multiplexers and De-multiplexers using gates and ICs. (74150, 74154) Aim: To design multiplexers and De-multiplexers using gates and ICs. (74150, 74154) Components required: Digital IC Trainer kit,

More information

CS302 - Digital Logic Design Glossary By

CS302 - Digital Logic Design Glossary By CS302 - Digital Logic Design Glossary By ABEL : Advanced Boolean Expression Language; a software compiler language for SPLD programming; a type of hardware description language (HDL) Adder : A digital

More information

Practical Workbook Logic Design & Switching Theory

Practical Workbook Logic Design & Switching Theory Practical Workbook Logic Design & Switching Theory Name : Year : Batch : Roll No : Department: Second Edition Fall 2017-18 Dept. of Computer & Information Systems Engineering NED University of Engineering

More information

UNIT III. Designing Combinatorial Circuits. Adders

UNIT III. Designing Combinatorial Circuits. Adders UNIT III Designing Combinatorial Circuits The design of a combinational circuit starts from the verbal outline of the problem and ends with a logic circuit diagram or a set of Boolean functions from which

More information

Gates and Circuits 1

Gates and Circuits 1 1 Gates and Circuits Chapter Goals Identify the basic gates and describe the behavior of each Describe how gates are implemented using transistors Combine basic gates into circuits Describe the behavior

More information

Subject: Analog and Digital Electronics Code:15CS32

Subject: Analog and Digital Electronics Code:15CS32 Subject: Analog and Digital Electronics Code:15CS32 Syllabus: The Basic Gates : Review of Basic Logic gates, Positive and Negative Logic, Introduction to HDL. Combinational Logic Circuits:Sum-of-Products

More information

UNIT-2: BOOLEAN EXPRESSIONS AND COMBINATIONAL LOGIC CIRCUITS

UNIT-2: BOOLEAN EXPRESSIONS AND COMBINATIONAL LOGIC CIRCUITS UNIT-2: BOOLEAN EXPRESSIONS AND COMBINATIONAL LOGIC CIRCUITS STRUCTURE 2. Objectives 2. Introduction 2.2 Simplification of Boolean Expressions 2.2. Sum of Products 2.2.2 Product of Sums 2.2.3 Canonical

More information

Subtractor Logic Schematic

Subtractor Logic Schematic Function Of Xor Gate In Parallel Adder Subtractor Logic Schematic metic functions, including half adder, half subtractor, full adder, independent logic gates to form desired circuits based on dif- by integrating

More information

Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 1 Logistics

Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 1 Logistics Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 1 Logistics Egemen K. Çetinkaya Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and

More information

Combinational Circuits: Multiplexers, Decoders, Programmable Logic Devices

Combinational Circuits: Multiplexers, Decoders, Programmable Logic Devices Combinational Circuits: Multiplexers, Decoders, Programmable Logic Devices Lecture 5 Doru Todinca Textbook This chapter is based on the book [RothKinney]: Charles H. Roth, Larry L. Kinney, Fundamentals

More information

BCD Adder. Lecture 21 1

BCD Adder. Lecture 21 1 BCD Adder -BCD adder A 4-bit binary adder that is capable of adding two 4-bit words having a BCD (binary-coded decimal) format. The result of the addition is a BCD-format 4-bit output word, representing

More information

Analog to Digital Conversion

Analog to Digital Conversion Analog to Digital Conversion 02534567998 6 4 2 3 4 5 6 ANALOG to DIGITAL CONVERSION Analog variation (Continuous, smooth variation) Digitized Variation (Discrete set of points) N2 N1 Digitization applied

More information

Department of Electrical and Electronics Engineering Logic Circuits Laboratory EXPERIMENT-5 COMBINATIONAL LOGIC CIRCUITS

Department of Electrical and Electronics Engineering Logic Circuits Laboratory EXPERIMENT-5 COMBINATIONAL LOGIC CIRCUITS 5.1 Preliminary Study Simulate experiment using an available tool and prepare the preliminary report. 5.2 Aim of the Experiment Implementation and examination of MULTIPLEXER and DEMULTIPLEXER circuits

More information

Sr. No. Instrument Specifications. TTL (Transistor-Transistor Logic) based on bipolar junction transistors

Sr. No. Instrument Specifications. TTL (Transistor-Transistor Logic) based on bipolar junction transistors MIT College of Engineering, Pune. Department of Electronics & Telecommunication (Electronics Lab) EXPERIMENT NO 01 TITLE OF THE EXPERIMENT: Verify four voltage and current parameters for TTL and CMOS (IC

More information

Combinational Circuits DC-IV (Part I) Notes

Combinational Circuits DC-IV (Part I) Notes Combinational Circuits DC-IV (Part I) Notes Digital Circuits have been classified as: (a) Combinational Circuits: In these circuits output at any instant of time depends on inputs present at that instant

More information

Fan in: The number of inputs of a logic gate can handle.

Fan in: The number of inputs of a logic gate can handle. Subject Code: 17333 Model Answer Page 1/ 29 Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model

More information

Gates and and Circuits

Gates and and Circuits Chapter 4 Gates and Circuits Chapter Goals Identify the basic gates and describe the behavior of each Describe how gates are implemented using transistors Combine basic gates into circuits Describe the

More information

CHAPTER 3 BASIC & COMBINATIONAL LOGIC CIRCUIT

CHAPTER 3 BASIC & COMBINATIONAL LOGIC CIRCUIT CHAPTER 3 BASIC & COMBINATIONAL LOGIC CIRCUIT CHAPTER CONTENTS 3.1 Introduction to Basic Gates 3.2 Analysing A Combinational Logic Circuit 3.3 Design A Combinational Logic Circuit From Boolean Expression

More information

Lecture 3: Logic circuit. Combinational circuit and sequential circuit

Lecture 3: Logic circuit. Combinational circuit and sequential circuit Lecture 3: Logic circuit Combinational circuit and sequential circuit TRAN THI HONG HONG@IS.NAIST.JP Content Lecture : Computer organization and performance evaluation metrics Lecture 2: Processor architecture

More information

IES Digital Mock Test

IES Digital Mock Test . The circuit given below work as IES Digital Mock Test - 4 Logic A B C x y z (a) Binary to Gray code converter (c) Binary to ECESS- converter (b) Gray code to Binary converter (d) ECESS- To Gray code

More information

Combinational Logic. Combinational Logic Design Process, Three State Buffers, Decoders, Multiplexers, Encoders, Demultiplexers, Other Considerations

Combinational Logic. Combinational Logic Design Process, Three State Buffers, Decoders, Multiplexers, Encoders, Demultiplexers, Other Considerations Combinational Logic Combinational Logic Design Process, Three State Buffers, Decoders, Multiplexers, Encoders, Demultiplexers, Other Considerations Copyright (c) 2012 Sean Key Combinational Logic Design

More information

UNIT 2. Digital Signals: The basics of digital encoding and the use of binary systems.

UNIT 2. Digital Signals: The basics of digital encoding and the use of binary systems. UNIT 2 Digital Signals: The basics of digital encoding and the use of binary systems. Your Name Date of Submission CHEMISTRY 6158C Department of Chemistry University of Florida Gainesville, FL 32611 (Note:

More information

Asst. Prof. Thavatchai Tayjasanant, PhD. Power System Research Lab 12 th Floor, Building 4 Tel: (02)

Asst. Prof. Thavatchai Tayjasanant, PhD. Power System Research Lab 12 th Floor, Building 4 Tel: (02) 2145230 Aircraft Electricity and Electronics Asst. Prof. Thavatchai Tayjasanant, PhD Email: taytaycu@gmail.com aycu@g a co Power System Research Lab 12 th Floor, Building 4 Tel: (02) 218-6527 1 Chapter

More information

Unit level 4 Credit value 15. Introduction. Learning Outcomes

Unit level 4 Credit value 15. Introduction. Learning Outcomes Unit 20: Unit code Digital Principles T/615/1494 Unit level 4 Credit value 15 Introduction While the broad field of electronics covers many aspects, it is digital electronics which now has the greatest

More information

Digital Logic and Design (Course Code: EE222) Lecture 14: Combinational Contd.. Decoders/Encoders

Digital Logic and Design (Course Code: EE222) Lecture 14: Combinational Contd.. Decoders/Encoders Indian Institute of Technology Jodhpur, Year 28 29 Digital Logic and Design (Course Code: EE222) Lecture 4: Combinational Contd.. Decoders/Encoders Course Instructor: Shree Prakash Tiwari Email: sptiwari@iitj.ac.in

More information

Combinational logic. ! Regular logic: multiplexers, decoders, LUTs and FPGAs. ! Switches, basic logic and truth tables, logic functions

Combinational logic. ! Regular logic: multiplexers, decoders, LUTs and FPGAs. ! Switches, basic logic and truth tables, logic functions Combinational logic! Switches, basic logic and truth tables, logic functions! Algebraic expressions to gates! Mapping to different gates! Discrete logic gate components (used in labs and 2)! Canonical

More information

Winter 14 EXAMINATION Subject Code: Model Answer P a g e 1/28

Winter 14 EXAMINATION Subject Code: Model Answer P a g e 1/28 Subject Code: 17333 Model Answer P a g e 1/28 Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model

More information

DEPARTMENT OF ELECTRICAL & ELECTRONICS ENGINEERING

DEPARTMENT OF ELECTRICAL & ELECTRONICS ENGINEERING DEPARTMENT OF ELECTRICAL & ELECTRONICS ENGINEERING (Regulation 2013) EE 6311 LINEAR AND DIGITAL INTEGRATED CIRCUITS LAB MANUAL 1 SYLLABUS OBJECTIVES: Working Practice in simulators / CAD Tools / Experiment

More information

Dr. Nicola Nicolici COE/EE2DI4 Midterm Test #1 Oct 18, 2006

Dr. Nicola Nicolici COE/EE2DI4 Midterm Test #1 Oct 18, 2006 COE/EE2DI4 Midterm Test #1 Fall 2006 Page 1 Dr. Nicola Nicolici COE/EE2DI4 Midterm Test #1 Oct 18, 2006 Instructions: This examination paper includes 10 pages and 20 multiple-choice questions starting

More information

COMBINATIONAL LOGIC CIRCUIT First Class. Dr. AMMAR ABDUL-HAMED KHADER

COMBINATIONAL LOGIC CIRCUIT First Class. Dr. AMMAR ABDUL-HAMED KHADER COMBINATIONAL LOGIC CIRCUIT First Class 1 BASIC ADDER Adders are important in computers and also in other types of digital system in which numerical data are processed. An understanding of the basic operation

More information

Experiment # 3 Combinational Circuits (I) Binary Addition and Subtraction

Experiment # 3 Combinational Circuits (I) Binary Addition and Subtraction Experiment # 3 Combinational Circuits (I) Binary Addition and Subtraction Objectives: 1. To study adder and subtractor circuits using logic gates. 2. To construct and test various adders and subtractor

More information

Lecture 15 Analysis of Combinational Circuits

Lecture 15 Analysis of Combinational Circuits Lecture 15 Analysis of Combinational Circuits Designing Combinational Logic Circuits A logic circuit having 3 inputs, A, B, C will have its output HIGH only when a majority of the inputs are HIGH. Step

More information

CONTENTS Sl. No. Experiment Page No

CONTENTS Sl. No. Experiment Page No CONTENTS Sl. No. Experiment Page No 1a Given a 4-variable logic expression, simplify it using Entered Variable Map and realize the simplified logic expression using 8:1 multiplexer IC. 2a 3a 4a 5a 6a 1b

More information

4:Combinational logic circuits. 3 July

4:Combinational logic circuits. 3 July 4:Combinational logic circuits 3 July 2014 1 overview What is combinational logic circuit? Examples of combinational logic circuits Binary-adder Binary-subtractor Binary-multiplier Decoders Multiplexers

More information

DIGITAL ELECTRONICS QUESTION BANK

DIGITAL ELECTRONICS QUESTION BANK DIGITAL ELECTRONICS QUESTION BANK Section A: 1. Which of the following are analog quantities, and which are digital? (a) Number of atoms in a simple of material (b) Altitude of an aircraft (c) Pressure

More information

Class Subject Code Subject Prepared By Lesson Plan for Time: Lesson. No 1.CONTENT LIST: Introduction to UnitII 2. SKILLS ADDRESSED: Learning I year, 02 sem CS6201 Digital Principles & System Design S.Seedhanadevi

More information

Veer Narmad South Gujarat University, Surat

Veer Narmad South Gujarat University, Surat Unit I: Passive circuit elements (With effect from June 2017) Syllabus for: F Y B Sc (Electronics) Semester- 1 PAPER I: Basic Electrical Circuits Resistors, resistor types, power ratings, resistor colour

More information

Chapter 3 Digital Logic Structures

Chapter 3 Digital Logic Structures Chapter 3 Digital Logic Structures Transistor: Building Block of Computers Microprocessors contain millions of transistors Intel Pentium 4 (2): 48 million IBM PowerPC 75FX (22): 38 million IBM/Apple PowerPC

More information

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) SUMMER-16 EXAMINATION Model Answer

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) SUMMER-16 EXAMINATION Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate

More information

Experiment # 4. Binary Addition & Subtraction. Eng. Waleed Y. Mousa

Experiment # 4. Binary Addition & Subtraction. Eng. Waleed Y. Mousa Experiment # 4 Binary Addition & Subtraction Eng. Waleed Y. Mousa 1. Objectives: 1. To study adder and subtractor circuits using logic gates. 2. To construct and test various adders and subtractor circuits.

More information

Chapter 3 Combinational Logic Design

Chapter 3 Combinational Logic Design Logic and Computer Design Fundamentals Chapter 3 Combinational Logic Design Part 2 Combinational Logic Overview Part -Implementation Technology and Logic Design Design Concepts Fundamental concepts of

More information

Binary Addition. Boolean Algebra & Logic Gates. Recap from Monday. CSC 103 September 12, Binary numbers ( 1.1.1) How Computers Work

Binary Addition. Boolean Algebra & Logic Gates. Recap from Monday. CSC 103 September 12, Binary numbers ( 1.1.1) How Computers Work Binary Addition How Computers Work High level conceptual questions Boolean Algebra & Logic Gates CSC 103 September 12, 2007 What Are Computers? What do computers do? How do they do it? How do they affect

More information

Overview. This lab exercise requires. A windows computer running Xilinx WebPack A Digilent board. Contains material Digilent, Inc.

Overview. This lab exercise requires. A windows computer running Xilinx WebPack A Digilent board. Contains material Digilent, Inc. Module 6: Combinational Circuit Blocks Revision: August 30, 2007 Overview This lab introduces several combinational circuits that are frequently used by digital designers, including a data selector (also

More information

Encoders. Lecture 23 5

Encoders. Lecture 23 5 -A decoder with enable input can function as a demultiplexer a circuit that receives information from a single line and directs it to one of 2 n possible output lines. The selection of a specific output

More information

(CSC-3501) Lecture 6 (31 Jan 2008) Seung-Jong Park (Jay) CSC S.J. Park. Announcement

(CSC-3501) Lecture 6 (31 Jan 2008) Seung-Jong Park (Jay)   CSC S.J. Park. Announcement Seung-Jong Park (Jay) http://www.csc.lsu.edu/~sjpark Computer Architecture (CSC-3501) Lecture 6 (31 Jan 2008) 1 Announcement 2 1 Reminder A logic circuit is composed of: Inputs Outputs Functional specification

More information

Digital Electronic Concepts

Digital Electronic Concepts Western Technical College 10662137 Digital Electronic Concepts Course Outcome Summary Course Information Description Career Cluster Instructional Level Total Credits 4.00 Total Hours 108.00 This course

More information

Project Part 1 A. The task was to design a 4 to 1 multiplexer that uses 8 bit buses on the inputs with an output of a single 8 bit bus.

Project Part 1 A. The task was to design a 4 to 1 multiplexer that uses 8 bit buses on the inputs with an output of a single 8 bit bus. Project Part 1 A Circuit Description and Diagrams: The task was to design a 4 to 1 multiplexer that uses 8 bit buses on the inputs with an output of a single 8 bit bus. Shown below is a jpeg screenshot

More information

Data output signals May or may not be same a input signals

Data output signals May or may not be same a input signals Combinational Logic Part 2 We ve been looking at simple combinational logic elements Gates, buffers, and drivers Now ready to go on to larger blocks MSI - Medium Scale Integration or Integrate Circuits

More information

Exercise 1: EXCLUSIVE OR/NOR Gate Functions

Exercise 1: EXCLUSIVE OR/NOR Gate Functions EXCLUSIVE-OR/NOR Gates Digital Logic Fundamentals Exercise 1: EXCLUSIVE OR/NOR Gate Functions EXERCISE OBJECTIVE When you have completed this exercise, you will be able to demonstrate the operation of

More information

Chapter 5: Signal conversion

Chapter 5: Signal conversion Chapter 5: Signal conversion Learning Objectives: At the end of this topic you will be able to: explain the need for signal conversion between analogue and digital form in communications and microprocessors

More information

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) MODEL ANSWER

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) MODEL ANSWER Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate

More information

GATE Online Free Material

GATE Online Free Material Subject : Digital ircuits GATE Online Free Material 1. The output, Y, of the circuit shown below is (a) AB (b) AB (c) AB (d) AB 2. The output, Y, of the circuit shown below is (a) 0 (b) 1 (c) B (d) A 3.

More information

Digital. Design. R. Ananda Natarajan B C D

Digital. Design. R. Ananda Natarajan B C D Digital E A B C D 0 1 2 3 4 5 6 Design 7 8 9 10 11 12 13 14 15 Y R. Ananda Natarajan Digital Design Digital Design R. ANANDA NATARAJAN Professor Department of Electronics and Instrumentation Engineering

More information

JEFFERSON COLLEGE COURSE SYLLABUS ETC255 INTRODUCTION TO DIGITAL CIRCUITS. 6 Credit Hours. Prepared by: Dennis Eimer

JEFFERSON COLLEGE COURSE SYLLABUS ETC255 INTRODUCTION TO DIGITAL CIRCUITS. 6 Credit Hours. Prepared by: Dennis Eimer JEFFERSON COLLEGE COURSE SYLLABUS ETC255 INTRODUCTION TO DIGITAL CIRCUITS 6 Credit Hours Prepared by: Dennis Eimer Revised Date: August, 2007 By Dennis Eimer Division of Technology Dr. John Keck, Dean

More information

1.) If a 3 input NOR gate has eight input possibilities, how many of those possibilities result in a HIGH output? (a.) 1 (b.) 2 (c.) 3 (d.) 7 (e.

1.) If a 3 input NOR gate has eight input possibilities, how many of those possibilities result in a HIGH output? (a.) 1 (b.) 2 (c.) 3 (d.) 7 (e. Name: Multiple Choice 1.) If a 3 input NOR gate has eight input possibilities, how many of those possibilities result in a HIGH output? (a.) 1 (b.) 2 (c.) 3 (d.) 7 (e.) 8 2.) The output of an OR gate with

More information

Syllabus for: Electronics for F Y B Sc (Electronics) Semester- 1 (With effect from June 2014) PAPER I: Basic Electrical Circuits

Syllabus for: Electronics for F Y B Sc (Electronics) Semester- 1 (With effect from June 2014) PAPER I: Basic Electrical Circuits Unit I: Passive Devices Syllabus for: Electronics for F Y B Sc (Electronics) Semester- 1 (With effect from June 2014) PAPER I: Basic Electrical Circuits Resistors, Fixed resistors & variable resistors,

More information

R & D Electronics DIGITAL IC TRAINER. Model : DE-150. Feature: Object: Specification:

R & D Electronics DIGITAL IC TRAINER. Model : DE-150. Feature: Object: Specification: DIGITAL IC TRAINER Model : DE-150 Object: To Study the Operation of Digital Logic ICs TTL and CMOS. To Study the All Gates, Flip-Flops, Counters etc. To Study the both the basic and advance digital electronics

More information

2 Logic Gates THE INVERTER. A logic gate is an electronic circuit which makes logic decisions. It has one output and one or more inputs.

2 Logic Gates THE INVERTER. A logic gate is an electronic circuit which makes logic decisions. It has one output and one or more inputs. 2 Logic Gates A logic gate is an electronic circuit which makes logic decisions. It has one output and one or more inputs. THE INVERTER The inverter (NOT circuit) performs the operation called inversion

More information

DIGITAL ELECTRONICS. Methods & diagrams : 1 Graph plotting : - Tables & analysis : - Questions & discussion : 6 Performance : 3

DIGITAL ELECTRONICS. Methods & diagrams : 1 Graph plotting : - Tables & analysis : - Questions & discussion : 6 Performance : 3 DIGITAL ELECTRONICS Marking scheme : Methods & diagrams : 1 Graph plotting : - Tables & analysis : - Questions & discussion : 6 Performance : 3 Aim: This experiment will investigate the function of the

More information

Exercise 2: OR/NOR Logic Functions

Exercise 2: OR/NOR Logic Functions Exercise 2: OR/NOR Logic Functions EXERCISE OBJECTIVE When you have completed this exercise, you will be able to determine the operation of an OR and a NOR logic gate. You will verify your results by generating

More information

ICS 151 Final. (Last Name) (First Name)

ICS 151 Final. (Last Name) (First Name) ICS 151 Final Name Student ID Signature :, (Last Name) (First Name) : : Instructions: 1. Please verify that your paper contains 19 pages including this cover and 3 blank pages. 2. Write down your Student-Id

More information

LOW POWER DATA BUS ENCODING & DECODING SCHEMES

LOW POWER DATA BUS ENCODING & DECODING SCHEMES LOW POWER DATA BUS ENCODING & DECODING SCHEMES BY Candy Goyal Isha sood engg_candy@yahoo.co.in ishasood123@gmail.com LOW POWER DATA BUS ENCODING & DECODING SCHEMES Candy Goyal engg_candy@yahoo.co.in, Isha

More information

Solutions. ICS 151 Final. Q1 Q2 Q3 Q4 Total Credit Score. Instructions: Student ID. (Last Name) (First Name) Signature

Solutions. ICS 151 Final. Q1 Q2 Q3 Q4 Total Credit Score. Instructions: Student ID. (Last Name) (First Name) Signature ICS 151 Final Name Student ID Signature :, (Last Name) (First Name) : : Instructions: 1. Please verify that your paper contains 19 pages including this cover and 3 blank pages. 2. Write down your Student-Id

More information

F3 08AD 1 8-Channel Analog Input

F3 08AD 1 8-Channel Analog Input F38AD 8-Channel Analog Input 42 F38AD Module Specifications The following table provides the specifications for the F38AD Analog Input Module from FACTS Engineering. Review these specifications to make

More information

B.C.A 2017 DIGITAL ELECTRONICS BCA104T MODULE SPECIFICATION SHEET. Course Outline

B.C.A 2017 DIGITAL ELECTRONICS BCA104T MODULE SPECIFICATION SHEET. Course Outline Course Outline B.C.A 2017 DIGITAL ELECTRONICS BCA104T MODULE SPECIFICATION SHEET The purpose of the course is to teach principles of digital electronics. This course covers varieties of topics including

More information