CHW 261: Logic Design

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1 CHW 6: Logic Design Instructors: Prof. Hala Zayed Dr. Ahmed Shalaby Slide Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

2 Digital Fundamentals CHAPTER 6 Functions of Combinational Logic Slide Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

3 Combinational Logic - Basic Adders Half-Adder + = + = + = + = Simple Binary Addition Zero plus zero equals zero Zero plus one equals one One plus zero equals one Inputs Outputs A B C out One plus one equals zero with a carry of one S Slide 3 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

4 Half-Adder Combinational Logic - Basic Adders Basic rules of binary addition are performed by a half adder, which has two binary inputs (A and B) and two binary outputs (Carry out and Sum). Slide 4 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

5 Full-Adder Combinational Logic - Basic Adders By contrast, a full adder has three binary inputs (A, B, and Carry in) and two binary outputs (Carry out and Sum). Slide 5 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

6 Full-Adder Combinational Logic - Basic Adders A full-adder can be constructed from two half adders as shown: Slide 6 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

7 Combinational Logic - Basic Adders Full-Adder A S S A S S Sum B C out B C out For the given inputs, determine the intermediate and final outputs of the full adder. C out The first half-adder has inputs of and ; therefore the Sum = and the Carry out =. The second half-adder has inputs of and ; therefore the Sum = and the Carry out =. Slide 7 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

8 Full-Adder Combinational Logic - Basic Adders Notice that the result from the previous example can be read directly on the truth table for a full adder. Inputs Outputs A B C in C out S A B S S C out S A S B C out Sum C out Slide 8 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

9 Combinational Logic - Parallel Binary Adders Parallel Adders Full adders are combined into parallel adders that can add binary numbers with multiple bits. A -bit adder is shown. Slide 9 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

10 Combinational Logic - Parallel Binary Adders Parallel Adders Full adders are combined into parallel adders that can add binary numbers with multiple bits. A 4-bit adder is shown. A 4 B 4 A 3 B 3 A B A B C A B C in A B C in A B C in A B C in C out S C out S C out S C out S C 4 C 3 S 4 C S 3 The output carry (C 4 ) is not ready until it propagates through all of the full adders. This is called ripple carry, delaying the addition process. Slide C S S Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

11 Combinational Logic - Parallel Binary Adders Parallel Adders The logic symbol for a 4-bit parallel adder is shown. This 4-bit adder includes a carry in (labeled (C ) and a Carry out (labeled C 4 ) Binary number A Binary number B Input carry The 74LS83 is an example. It features look-ahead carry, which adds logic to minimize the output carry delay. For the 74LS83, the maximum delay to the output carry is 7 ns. Slide S 3 4 C C 4 4-bit sum Output carry Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

Comparators Combinational Logic - Comparators The function of a comparator is to compare the magnitudes of two binary numbers to determine the relationship between them.

12 Comparators Combinational Logic - Comparators The function of a comparator is to compare the magnitudes of two binary numbers to determine the relationship between them. In the simplest form, a comparator can test for equality using XNOR gates. The output is when the inputs are equal Slide Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

13 Comparators Combinational Logic - Comparators -bit Comparator The output is when A = B AND A = B Slide 3 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

14 Comparators Combinational Logic - Comparators How could you test two 4-bit numbers for equality? AND the outputs of four XNOR gates. A B A B Output A 3 B 3 A 4 B 4 Slide 4 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

15 Comparators Combinational Logic - Comparators IC comparators provide outputs to indicate which of the numbers is larger or if they are equal. The bits are numbered starting at, rather than as in the case of adders. Cascading inputs are provided to expand the comparator to larger numbers. A A A A 3 Cascading inputs B B B B 3 3 A > B A = B A < B A 3 COMP A A > B A = B A < B Outputs The IC shown is the 4-bit 74LS85. Slide 5 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

16 Comparators Combinational Logic - Comparators IC comparators can be expanded using the cascading inputs as shown. The lowest order comparator has a HIGH on the A = B. LSBs MSBs +5. V A A A A 3 B B B B 3 COMP A 3 A > B A > B A = B A = B A < B A < B A 3 A 4 A 5 A 6 A 7 B 4 B 5 B 6 B 7 COMP A 3 A > B A > B A = B A = B A < B A < B A 3 Outputs Slide 6 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

17 Combinational Logic - Decoders Decoders A decoder is a logic circuit that detects the presence of a specific combination of bits at its input. Two simple decoders that detect the presence of the binary code are shown. The first has an active HIGH output; the second has an active LOW output. A A X A A X A A A 3 A 3 Active HIGH decoder for Active LOW decoder for Slide 7 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

18 QUIZ Assume the output of the decoder shown is a logic. What are the inputs to the decoder? A = A = A = A 3 = Slide 8 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

19 Combinational Logic - Decoders Decoders IC decoders have multiple outputs to decode any combination of inputs. For example the binary-to-decimal decoder shown here has 6 outputs one for each combination of binary inputs. For the input shown, what is the output? Bin/Dec 4-bit binary input A A A A Decimal outputs Slide 9 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

20 Decoders Combinational Logic - Decoders Slide Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

21 Combinational Logic - Decoders Decoders X/Y A specific integrated circuit decoder is the 74HC54 (shown as a 4-to-6 decoder). It includes two active LOW chip select lines which must be at the active level to enable the outputs. A A A A CS & 5 CS EN 74HC54 Slide Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

In this Multisim circuit, the word generator (XWG) is set up as an up counter.

22 Decoders Combinational Logic - Decoders The 74LS38 is a 3-to-8 decoder with three chip select inputs (two active LOW, one active HIGH). In this Multisim circuit, the word generator (XWG) is set up as an up counter. The logic analyzer (XLA) compares the input and outputs of the decoder. Inputs are blue, outputs are red. Slide Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

23 Combinational Logic - Decoders Decoders BCD-to-decimal decoders accept a binary coded decimal input and activate one of ten possible decimal digit indications. Slide 3 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

24 Combinational Logic - Decoders Decoders Assume the inputs to the 74HC4 decoder are the sequence,,, and. Describe the output. A A A A 3 (5) (4) (3) () 4 8 BCD/DEC () () (3) (4) (5) (6) (7) (9) () () 74HC4 All lines are HIGH except for one active output, which is LOW. The active outputs are 5, 6, 3, and in that order. Slide 4 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

25 Combinational Logic - Decoders BCD Decoder/Driver Another useful decoder is the 74LS47. This is a BCD-to-seven V segment display with active LOW outputs. CC The a-g outputs are designed for much higher current than most devices (hence the word driver in the name). BCD inputs LT RBI (7) () () (6) (3) (5) 4 8 (6) BCD/7-seg LT RBI BI/RBO a b c d e f g (4) (3) () () () (9) (5) (4) BI/RBO Outputs to seven segment device 74LS47 (8) Slide 5 GND Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

26 Combinational Logic - Decoders BCD Decoder/Driver Here the 7447A is an connected to an LED seven segment display. Notice the current limiting resistors, required to prevent overdriving the LED display. BCD input. kw +5. V 74LS47 6 BCD/7-seg 3 V CC LT 4 BI/RBO RBI GND R's = 33 W a 3 b 3 5 c 6 A d 8 e 9 7 B f 5 C 7 g 4 D 8 a b c d e f g +5. V MAN7 3, 9, 4 Slide 6 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

27 Encoders Combinational Logic - Encoders An encoder accepts an active logic level on one of its inputs and converts it to a coded output, such as BCD or binary. The decimal to BCD is an encoder with an input for each of the ten decimal digits and four outputs that represent the BCD code for the active digit. The basic logic diagram is shown. There is no zero input because the outputs are all LOW when the input is zero. Slide A A A A 3 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

28 Combinational Logic - Encoders Encoders Show how the decimal-to-bcd encoder converts the decimal number 3 into a BCD. The top two OR gates have ones as indicated with the red lines. Thus the output is. 3 A A A Slide 8 A 3 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

29 Combinational Logic - Encoders Encoders The 74HC47 is an example of an IC encoder. It is has ten active- LOW inputs and converts the active input to an active-low V BCD output. CC This device is offers additional flexibility in that it is a priority encoder. This means that if more than one input is active, the one with the highest order decimal digit will be active. Decimal input () () (3) () () (3) (4) (5) () (6) HPRI/BCD HC47 (8) 4 8 (9) (7) (6) (4) BCD output Slide 9 GND Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

Combinational Logic - Encoders Encoders V CC R 7 R 8 R 9 Keyboard encoder 7 4 8 9 R 4 R 5 R 6 5 6 HPRI/BCD 3 4 5 6 7 8 9 4 8 BCD complement of key press R R R 3 74HC47 3 R The

30 Combinational Logic - Encoders Encoders V CC R 7 R 8 R 9 Keyboard encoder R 4 R 5 R HPRI/BCD BCD complement of key press R R R 3 74HC47 3 R The zero line is not needed by the encoder, but may be used by other circuits to detect a key press. Slide 3 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

31 Combinational Logic - Decoder/Encoders Keypad Encoder HIGH Encoder Binary code for 9 used for storage and/or computation 3. +/ Calculator keypad Seven Segment Decoder Decoder Binary input 7-segment display Slide 3 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

32 Combinational Logic Code Converter Code Converters There are various code converters that change one code to another. Two examples are the four bit binary-to-gray converter and the Gray-to-binary converter. Show the conversion of binary to Gray and back. LSB LSB MSB MSB Binary-to-Gray Gray-to-Binary Slide 3 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

33 Combinational Logic Code Converter Code converters Slide 33 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

34 Multiplexers Combinational Logic Multiplexer A multiplexer (MUX) selects one data line from two or more input lines and routes data from the selected line to the output. The particular data line that is selected is determined by the select inputs. Which data line is selected if S S =? D Data select Data inputs S D D D D 3 S 3 MUX Data output Slide 34 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

35 Multiplexers Combinational Logic Multiplexer Slide 35 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

36 Demultiplexers Combinational Logic Multiplexer A demultiplexer (DEMUX) performs the opposite function from a MUX. It switches data from one input line to two or more data lines depending on the select inputs. The 74LS38 was introduced previously as a decoder but can also serve as a DEMUX. When connected as a DEMUX, data is applied to one of the enable inputs, and routed to the selected output line depending on the select variables. Note that the outputs are active-low as illustrated in the following example Data select lines Enable inputs A A A DEMUX G G G A B 74LS38 Y Y Y Y 3 Y 4 Y 5 Y 6 Y 7 Data outputs Slide 36 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

37 Combinational Logic DeMultiplexer Demultiplexers Slide 37 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

38 Combinational Logic DeMultiplexer Demultiplexers Determine the outputs, given the inputs shown. The output logic is opposite to the input because of the active-low convention. (Red shows the selected line). Data select lines Enable inputs A A A DEMUX G G G A B 74LS38 Y Y Y Y 3 Y 4 Y 5 Y 6 Y 7 Data outputs Slide 38 A A A G G A LOW G B LOW Y Y Y Y 3 Y 4 Y 5 Y 6 Y 7 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

39 Combinational Logic Multiplexer/DeMultiplexer A B Multiplexer t Data from A to D Data from B to E Data from C to F Data from A to D t t t 3 t Demultiplexer t D E t t C t 3 t 3 F Switching sequence control input Switching sequence control input Slide 39 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

40 QUIZ. kw Connect a keypad to three seven-segment 8 displays +5. V / Calculator keypad HIGH Slide 4 BCD input BCD input BCD input Encoder +5. V 74LS47 6 R's = BCD/7-seg MAN7 V CC 33 W 3, 9, 4 LT a 3 a BI/RBO b 3 b RBI c c A d 8 d +5. V e 9 7 B e. kw f 5 C f g 4 g +5. V 74LS47 D 6 R's = BCD/7-seg GND MAN7 V CC 8 33 W 3, 9, 4 LT a 3 4 a BI/RBO b 3 b 5 RBI c c 6 A d V d e 9 7 B e. kw f 5 C f 7 g 4 g +5. V 74LS47 D 6 R's = BCD/7-seg GND MAN7 3 V CC 8 33 W 3, 9, 4 LT a 3 4 a BI/RBO b 3 b 5 RBI c c 6 A d 8 d e 9 7 B e f 5 C f 7 g 4 g D GND 8 Binary code for 9 used for storage and/or computation Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

Functions of Combinational Logic Parity Generators/Checkers Parity is an error detection method that uses an extra bit appended to a group of bits to force them to be either odd or even.

41 Functions of Combinational Logic Parity Generators/Checkers Parity is an error detection method that uses an extra bit appended to a group of bits to force them to be either odd or even. In even parity, the total number of ones is even; in odd parity the total number of ones is odd. The ASCII letter S is. Show the parity bit for the letter S with odd and even parity. S with odd parity = S with even parity = Slide 4 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

42 Functions of Combinational Logic Parity Generators/Checkers Slide 4 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

43 Functions of Combinational Logic Parity Generators/Checkers The 74LS8 can be used to generate a parity bit or to check an incoming data stream for even or odd parity. Checker: The 74LS8 can test codes with up to 9 bits. The even output will normally be HIGH if the data lines have even parity; otherwise it will be LOW. Likewise, the odd output will normally be HIGH if the data lines have odd parity; otherwise it will be LOW. Generator: To generate even parity, the parity bit is taken from the odd parity output. To generate odd parity, the output is taken from the even parity output. Data inputs (8) (9) () () () (3) () () (4) A B C D E F G H I 74LS8 (5) (6) S Even S Odd Slide 43 Copyright 6 by Pearson Education, Inc. Upper Saddle River, New Jersey 7458

Digital Electronics. Functions of Combinational Logic

Digital Electronics. Functions of Combinational Logic Digital Electronics Functions of Combinational Logic Half-dder Basic rules of binary addition are performed by a half adder, which has two binary inputs ( and B) and two binary outputs (Carry out and Sum).