Research Article Comparison of Duty Cycle Generator Algorithms for SPICE Simulation of SMPS

Transcription

1 Advances in Power Elecronics Volume 212, Aricle ID , 8 pages doi:1.1155/212/ Research Aricle Comparison of Duy Cycle Generaor Algorihms for SPICE Simulaion of SMPS Alexander Abramoviz Deparmen of Elecrical Engineering and Compuer Science, Universiy of California, Irvine, CA , USA Correspondence should be addressed o Alexander Abramoviz, alabr@homail.com Received 28 February 212; Revised 9 April 212; Acceped 1 April 212 Academic Edior: Henry S. H. Chung Copyrigh 212 Alexander Abramoviz. This is an open access aricle disribued under he Creaive Commons Aribuion icense, which permis unresriced use, disribuion, and reproducion in any medium, provided he original work is properly cied. The paper presens and discusses an algorihm for average modeling of he PWM modulaor in swichmode power sysems by general purpose elecronic circui simulaors such as PSPICE. A comparison wih previous heoreical models is conduced. To es he accuracy of he average PWM models comparison o cyclebycycle simulaion was conduced. The proposed algorihm shows beer accuracy han earlier counerpars. 1. Inroducion Today circui simulaion and compueraided design are universally acceped engineering ools and have become indusry sandard mehod of produc developmen. Two approaches are possible for simulaion of swiched mode sysems: cyclebycycle simulaion and average behavior simulaion. Cyclebycycle simulaion is a quie sraighforward approach. Cyclebycycle simulaion can be performed programming he complee power elecronic circui o he simulaor. Cyclebycycle simulaion allows sudding he power sage a he swiching frequency scale and observing he insananeous volages and currens a any poin in he circui. Firs disadvanage of cyclebycycle simulaion is ha simulaing he deailed swiching process is ime consuming. This is paricularly rue for nonrivial pracical cases. The second and by far more imporan limiaion is ha he cyclebycycle model of a swiching circui does no lend iself o frequency response analysis. This is because he swiching sage has no sable operaing poin and, hence, does no allow he PSPICE simulaor o perform linearizaion and calculae he small signal gains required for frequency response analysis. Therefore, a differen approach is needed o aain frequency domain simulaion of he conrol loop. Sae Space Averaging is a classical heoreical analysis mehod of swichmode power elecronics sysems [1 5]. Average modeling of he power sage can also be helpful in simulaion as hey can be readily implemened using PSPICE behavioral sources [6 8]. Average models are coninuous and, hence, can be auomaically linearized by he PSPICE simulaor and prepared for he frequency domain analysis. The abiliy o obain he frequency response of he feedback loop allows he pracicing engineer o evaluae he sysem s sabiliy and o design he compensaor nework o mee he design objecives. The disinc characerisic of SMPS is ha a swichedmode sage is employed as power processor, whereas he conrol circuis are mosly analog where Pulse Widh Modulaor (PWM) is used as an inerface. A ypical srucure of a PWM swichmode power sysem (SMPS) is illusraed in Figure 1 [8]. Here, as an example, an average curren mode (ACM) sysem is shown. There are wo major challenges in simulaion of a swichmode sysem. The firs is modeling he swicher, whereas he second is modeling he PWM modulaor. To model he average behavior of swich mode power sages Swiched Inducor Model (SIM) was proposed [6 8], whereas he PWM duy cycle generaion process can be modeled by sofware Duy Cycle Generaor (DCG) approach [8]. The PWM modeling problem is ha in pracice he swiching ripple propagaes ino he conrol loop and affecshe swich on and off imes. However, he average SIM model has no ripple componens; herefore, in order o obain accurae

2 2 Advances in Power Elecronics I b b I c c D on D off V ab I a V ac a i Power sage (SIM) R s C o V ou oad A ca (if) db A db a db db f s f Q R PMW (DCG) D on S clk PMW M P V cp Z 4 CA Conroller V ve Z 3 Z 2 VA Figure 1: A ypical ACM SMPS. Modeling he SMPS requires he SIM o model he power sage and he DCG o model he PWM [8]. simulaion resuls, sofware DCG should be programmed o predic he swiching ripple effecs using only he average signals of he SIM model. Anoher ask of he DCG is o anicipae he mode changes of he power sage and calculae he correcoff duy cycle in case of CCMDCM ransiion. This paper proposes a more precise, PSPICE compaible, average DCG algorihm for modeling he PWM comparaor. The operaion of he proposed average PWM model is demonsraed by ime domain and frequency domain simulaions. The paper also conducs a comparison wih previously repored resuls. To validae he model s accuracy, he proposed average algorihm and is earlier counerpars are compared o cyclebycycle simulaion. Paricularly, in he disconinuous curren mode he proposed algorihm shows beer accuracy han earlier counerpars. 2. Sofware Duy Cycle Generaors 2.1. PWM Relaionships. In recen years ACM conrol has become he mehod of choice for many advanced SMPS. The principle of ACM is o implemen a muliloop conrol sysem in which he inner loop (see Figure 1), conrols he average curren and makes i ighly follow he ouer loop command. The inner/curren loop amplifier, CA, provides higher gain in he lowfrequency region and exends he inner loop bandwidh. These feaures are very desirable and provide good racking performance. Usually, he average curren loop amplifier (CA) is designed o have a high/lowfrequency gain and a fla response in he viciniy of he swiching frequency as shown in Figure 2 [9]. Consequenly, he curren programming signal a he oupu of CA, v cp, has an average componen, v cp, wih a superimposed aenuaed inducor curren ripple, as shown in Figure 3. The ripple is scaled by he gain of he Z 1 V ref Figure 2: The inner loop amplifier, CA, frequency response. curren sensing nework, R s, and he CA amplifier gain a he swiching frequency, a = A ca ( f s ). Referring o Figures 1 and 3, he swich on ime is iniiaed by a clock pulse and erminaed by he PWM comparaor a he momen he curren programming signal, v cp, inersecs he exernal ramp. The comparaor is usually followed by a lach, which remains rese ill he end of he swiching cycle and prevens oupu chaer. A real world comparaor uses insananeous ramp and CA oupu volages, whereas in he average sysem represened by SIM hese variables do no exis. The essence of he modeling problem is o accuraely deermine he on duy cycle, D on, relaying on he knowledge of he average CA oupu volage, v cp, he ramp ampliude, V p, and oher average sysem parameers. e he exernal, charging, and discharging slopes of PWM comparaor inpu signals (see Figure 3), be defined following he noaion of [8]: S e = V p, S on = ar s V ab, S off = ar s V ac, where (see Figure 1) V ab and V ac are he SIM erminal volages; is he SIM inducor value; is he swiching cycle; V p is he exernal ramp peak volage; a, R s areasdefinedabove. The inersecion insance of curren error amplifier and he ramp volages (see Figure 3) uniquely deermines he on duy cycle, D on,aswellasallheaveragequaniies for he given swiching cycle. Invesigaing he modulaor waveforms of Figure 3, and applying basic geomerical consideraions o calculae he area under he v cp curve, as suggesed in [1], reveals ha he average curren programming signal, v cp, D on and D off duy cycles and oher circui parameers are relaed as follows: [ vcp = S e D on S ondon 2 S offdoff S off D off (1 D on D off ). (1) (2)

3 Advances in Power Elecronics 3 V p V p v cp V cp V cp v cp S on S o S o S on S e S e D o D on (1 D on D o ) D on D o Figure 3: PWM comparaor inpu waveforms in DCM and CCM modes. The required on duy cycle, D on, is he soluion of he quadraic equaion (2), which akes ino consideraion he CA average curren programming signal v cp as well as oher operaing condiions. The swicher erminal volages are imbedded in he slopes S on and S off,asdefinedin(1), whereas D off in DCM depends on D on as well as on he average curren and sysem s parameers Comparison wih Oher Theoreical Resuls. The proposed sofware DCG algorihm (2) can generae he required average duy cycle, D on, in he seady sae, in ransien condiions, CCM or DCM modes. Inspecion of (2) reveals ha under CCM condiions, he erm (1 D on D off ) vanishes and (2) is reduced o he expression, previously repored in [1]: [ vcp = S e D on S ondon 2 S offd 2 ] off. (3) 2 2 DCG based on (3) can be used in CCM under ransien condiions for which S on and S off may assume an arbirary value. Obviously, wih he erm (1 D on D off ) missing, (3) is less accurae han (2)inDCM. Considering ha he power sage is operaing wih slow varying signals in he viciniy of he CCM seadysae equilibrium so ha S e D on S off D off,(2) akes he following form: vcp = [ S e D on 1 2 S ond off ], (4) which is idenical o ha suggesed in [11]. For a CA amplifier wih a significan aenuaion of he swiching ripple, S e S on, S off,(2) is furher simplified yielding vcp = S e D on, (5) which is idenical o he classical Volage Mode PWM funcion [12] On Duy Cycle Programming. Algorihms (2) (5) are arranged in a descending order of accuracy and programming complexiy. Explici soluion for D on duy cycle could be obained from (4) and(5).thecaseof(5) couldbe implemened in PSPICE by a simple E source yielding D on duy cycle, coded in volage a he oupu. The E source should have a gain consan (1/V P ) and conrolled by a single inpu variable, ha is, by he average curren programming signal v cp : ( ) 1 vcp D on =. (6) V p The modulaor model (6) oally disregards he ripple componen. As i is clearly shown a Figure 3, (6) aimsa he inersecion of he ramp and he average CA volage, v cp, somewha o he righ of he correc value of D on,hus, providing only an approximae resuls for boh he CCM and he DCM modes. Therefore, (6) is generally recognized as a simplisic model ha can be used under low curren ripple condiions arising in Volage Mode converers, whose loop gain provides heavy aenuaion of he swiching ripple. Implemenaion of (4)requiresEvalue source performing a division: vcp D on =. (7) V p kv ab Here, he consan k = ar s /2f s, V p, and he swiching frequency, f s = 1/,shouldbedefinedasparameersin PSPICE program. This resul is analogous o ha suggesed by [11]. DCG programmed according o (7) is relaively simple; however, i accouns for he curren ripple. Implemenaion of (7)requiresanEvalue source governed by wo

4 4 Advances in Power Elecronics conrol variables v cp and V ab. Noe ha applicaion of (7) requires a preliminary calculaion or simulaion o correcly esablish he sysem consan k [7, 8]. Adifferen programming approach is required in order o apply he nonlinear DCG algorihms (2). Using (1) and rearranging erms, he proposed DCG algorihm (2) could be realized as follows: vcp kv ac D off (2 2D on D off ) D on =. (8) V p kv ab D on Due o is relaive complexiy, he proposed DCG implemenaion (8) is hardly useful as an analyical ool; however, PSPICE can obain a numerical soluion of recursive equaions of he D on = f (D on,...)ype.equaion(8) holds several advanages for simulaion purposes. Firs is ha accurae D on duy cycle could be generaed of he given average curren programming signal, v cp, and he average SIM erminal volages V ab and V ac. As suggesed by [6], in order o ake accoun of he DCM CCM mode ransiions frequenly encounered in swichmode sysems, he Don generaor should also be accompanied by he Doff sofware generaor. A quick reference o Doff generaor programming is given in he Appendix. 3. Simulaion Resuls 3.1. Comparison of he DCG Algorihm s Performance hrough Simulaion. In order o compare he performance of he previously described sofware duy cycle generaor algorihms, a PSPICE simulaion program was creaed. The program simulaed he ime domain response of an ACM dcdc boos converer in DCM and CCM regimes. Simulaion diagram of he circui is shown in Figure 4. The circui parameers were inpu dc volage 12 Vdc, oupu dc volage 48 Vdc, boos inducor 2 uhy, swiching frequency 1 khz, peak ramp volage 5 Vpk. Oher circui parameers are given in he diagram. The circui was commanded o operae in he DCM and in CCM modes by appropriaely sepped curren reference signal. The simulaion was run cyclebycycle o obain he exac ime domain behavior of a real circui. The obained resuls were used as a reference for comparison. The average values of he curren amplifier oupu signal and he inducor curren were obained by heavily filering. The filering was done using ORCAD lowpass filer ABM blocks wih passband aenuaion of 1 db up o 75 khz, whereas aenuaion of 5 db was aained a 1 khz which effecively removed he swiching ripple componens. The soobained averaged variables were used o command he average models of he DCG generaors according o (6), (7) and(8). Doff duy cycle was obained using (A.5) as described in he Appendix. The simulaed waveforms of he key variables in boh he DCM and he CCM modes are shown in Figures 4 4(e). The normalizaion of he sawooh ramp and he curren programming signals was done relaively o he peak ramp volage, V p. The average duy cycles, generaed from he averaged variables, were compared o he waveforms of he cyclebycyclesimulaed PWM comparaor. The closer he average D on signal is o he inersecion poin of he ramp and CA volage, he accurae he D on algorihm is. As expeced, for boh CCM and DCM modes DCG generaor (8) proved o be he mos accurae, (7) had good accuracy and (6) was only fairly accurae. Paricularly, in DCM, see Figure 4(c), he accuracy of he proposed algorihm (8) is noiceably beer han ha of (7), and much beer han ha of (6). In CCM (see Figure 4(e)) algorihm (6)achieves only fair accuracy, whereas boh algorihms (7) and(8) are of comparable performance providing excellen resuls where only a negligible advanage in favor of (8) can be seen Demonsraion of Auonomous Operaion of he Proposed DCG. Nex, a complee model of he inner loop of an ACM Boos PFC converer based on benchmark design [9] was derived using he mehodology described in he previous secions. The SIM equivalen circui was used o model he boos power sage and DCG duy cycle generaors o model he PWM. The DCGs (7) and (8) were compared. The simulaion diagram of he circui is shown in Figure 5. The simulaion program operaes only wih he average variablesandallowsperformingtransienaswellasac sudy of he curren loop. The circui should be prepared for he frequency response analysis by properly placing an AC es source, V es, wihin he curren loop as shown and inroducing offse value o he Vline source o preserve he operaing poin. Inroducing iniial condiions helps guiding he simulaor o sele on a correc operaing poin. Comparisons of he simulaed frequency response plos due o he DCG (7) and DCG (8) of he inner loop are shown in Figure 5 and are hardly disinguishable from each oher. The seadysae ime domain waveforms of he average APFC model wih DCG (8) are shown in Figure 5(c). 4. Conclusion The paper presened a PSPICE sofware algorihm for modeling he average behavior of PWM modulaor in swichmode sysems. The proposed duy cycle algorihm describes he PWM funcion in boh CCM and DCM operaing modes and correcly predics he duy cycle under any operaing condiions. Comparison wih previously published resuls suppors he heoreical validiy of he proposed approach. The proposed average PWM model (8) was implemened in PSPICE sofware and compared wih cyclebycycle simulaion yielding excellen resuls. The proposed algorihm (8) was also compared o he earlier counerpars and was indeed found o be more accurae. Paricularly, in DCM, he accuracy of he proposed algorihm (8) is noiceably beer han ha of (7), whereas in CCM (7) and(8) areof comparable performance wih only a negligible advanage in favor of (8). In he frequency domain, which uses log scale for he ampliude, he responses were comparable. However, he higher accuracy of he proposed algorihm (8) comes a he price of added programming complexiy, which is is main disadvanage. The proposed algorihm (8) can be

5 Advances in Power Elecronics 5 rec V1 12 Vdc sns Rm 4 k C1 Rs.25 1 {} Vrs Vdc sw S1 Sbreak Rci 4 k 1 p E V2 err TD = 1 m E2 TF = 1 u V1 = TR = 4 u V2 = {VP } PW = 5 m TD = Ramp PER = 1 m TR = 9.9 u V4 V2 = 1 m TF =.5 u V1 = 2 m PW =.5 u PER = 1 u D1 pwm Rcz Dbreak C3 2 p Ccp Ou 2 k 62 p E3 48 Vdc Vou cp IC =.1 pwm imi (1 k V (%IN, %IN ),, 1) E8 V(CPav)/{Vp} E6 Parameers: =.2m fs = 1k Vp = 5 k = 34 m imi((v(cpav) k V( ou, rec) V(Doff) (2 2 V(Don) V(Doff)))/({Vp} k V(rec) V(Don)),, 1) E7 DonM V (CPav)/({Vp} k V(rec)) DonR E9 imi (min((1 V(D on)), (( 2 {} {f s} V(I av) 1 m)/ (V(rec) V(D on) 1 m) V(D on))),, 1) Doff Don E4 V (pwm)/1 1 khz 75 khz 1 db 5 db Dav cp 1 khz 75 khz 1 db 5 db CPav E5 1 khz 75 khz 1 db 5 db Iav 1 I(Vrs) V rampn V cpn V rampn.5 V cpn I D onm D onr D on D Time (µs) I(1) V (D on M) V (ramp)/s V (D on R) V (cp)/s V (D on ) 1.5 V cpn V rampn D onm D onr D on D (m) 5 45 D onm D onr D on D (m) 9 8 I(1) V (ramp)/s V (cp)/s Time (µs) (c) V cpn V (D on M) V (D on R) V (D on ) V rampn D onm Time (ms) I(1) V (ramp)/s V (cp)/s I (d) V (D on M) V (D on R) V (D on ) 7 D onr D on Time (ms) I(1) V (ramp)/s V (cp)/s V (D on M) V (D on R) V (D on ) Figure 4: Simulaion diagram of he ACM Boos converer : simulaed waveforms of he insananeous inducor curren I, insananeous normalized ramp volage VrampN, insananeous normalized curren programming volage VcpN, cyclebycycle duy cycle D, average duy cycle DonM according o (6), average duy cycle DonR according o (7), average duy cycle Don according o (8). The DCM mode waveforms ; exploded view of he DCM mode waveforms (c); he CCM mode waveforms (d); exploded view of he CCM mode waveforms (e). (e) D

6 6 Advances in Power Elecronics Vline Voff = 22 Vampl = 3 Freq = 5 ine Ga Grec Erec I(V) a Ou In Ou In Ou In Ou In I(V) sgn(v (line)).25 Gb Gcref Rm Rci Ccp 62 p 4 k 4 k Rsw n V IC = 2 Rcz Ccz 1 m V3 b 2 k 1 Vac 62 p CA Vdc V(Don) I(V)/(V(Don) V(Doff)) E m cp Parameers: Eca = 1m (V(cp) k V(a, c) V(Doff) (2 2 V(Don) V(Doff)))/(Vp k V(a, b) V(Don)) Doff fs = 1k Don1 Don In Ou Vp = 5 k = 6 m Edoff Edon1 Edon abs (V (line)) s Rs V(cp)/({Vp} k V(a, b)) V E V(Don) V(a,b) V(Doff) V(a,c) 4 E R 1m Vdc 1 {} Gc V(Doff) I(V)/(V(Don) V(Doff)) min(1 V(Don),2 {} {fs} I(V)/(V(a,b) V(Don) 1 m) V(Don)) V line /1 I line c Vou 38 Vdc (G) db K 1K 1K 1M 1M Frequency (Hz) 4 V(line)/1 I(Vline) 1 D on D off.5 D on D off Time (ms) (c) Figure 5: PSPICE simulaion diagram of he Average Curren mode APFC curren loop ; Simulaion of he curren loop frequency responses ; ime domain waveforms of he scaled line volage Vline/1 and line curren I(Vline) (op), and he duy cycles Don, Doff; noe ha he sum D off D off < 1 as DCM commences (boom) (c). successfully applied in simulaion; however, i is inconvenien o be used as a heoreical ool. Also, he recursive naure of (8) aggravaes convergence problems. While having somewha lesser accuracy in DCM, he sofware duy cycle generaion algorihm (7) has he advanage of simpliciy and lesser convergence problems. Moreover, he expression (7) is idenical o he PWM modulaor funcion proposed by [11], which is currenly considered as a widely acceped mehod for heoreical analysis of curren mode converers. Therefore, he resuls of his sudy provide an addiional verificaion and suppor he validiy and soundness of [11]. Appendix A. A Quick Reference o SIM and D off DCG Energy ransfer in hard swiched power converers is accomplished by periodic charging and discharging of an inducor. The opology of he swiched inducor is shown in Figure 6. The swiched inducor model (SIM) is an average behavioral model of he swiched inducor block. SIM was developed by [6] and is shown in Figure 6. SIM derives he average inducor curren applying an average volage, E, across he power sage inducor, [6]. The average volage, E, is a funcion of he erminal volages, V ab and V ac, and he duy cycles D on and D off : E = V ab D on V ac D off. (A.1) The physical feaure of curren seering beween he erminals b and c is modeled by he dependen curren sources of he SIM model [8](Figure 6) which are defined as follows: G a = I, G b = I D on, D on D off (A.2) G c = I D off. D on D off

7 Advances in Power Elecronics 7 c a I a V ac V ab D o D on I c I b b a I a G a I I b E Gb G c I c b c Figure 6: The opology of he swiched inducor in PWM converers ; and he Swiched Inducor Model (SIM) equivalen circui [6]. i () i () I T on V ab V ac T o I Vab V ac T on T o Figure 7: Definiion of he inducor discharge duy cycle Doff: CCM mode and he DCM. To implemen (A.2) he simulaion program is also required o produce he D off duy cycle. In case he power sage operaes in CCM (see Figure 7) he Off Duy Cycle depends solely on D off : D off = 1 D on. (A.3) In he case of DCM, however (see Figure 7), D off depends also on oher sysem parameers and operaing condiions: D off = 2f si V ab D on D on < 1 D on. (A.4) The DCM D off by (A.4) is always smaller han CCM D off by (A.3). Hence, he sofware OffDuy Cycle Generaor is programmed o calculae boh expressions (A.3) and(a.4) and decide on he proper, D off, using he PSPICE minimum funcion [7]: D off = min { (1 D on ), ( )} 2fs I D on. (A.5) V ab D on As a resul, PSPICE is able o idenify CCMDCM mode changes and calculae he correc D off under any operaing condiions. References [1] R. D. Middlebrook and S. Cuk, A general unified approach o modeling swichedconverer power sages, in Proceedings of he Annual IEEE Power Elecronics Specialiss Conference (PESC 76), pp , [2] R. Holloway and G. Eirea, Model currenmode conrol wih ease and accuracy, Power Elecronics Technology, vol. 34, no. 11, pp , 28. [3] R. E. Griffin, Unified power converer models for coninuous and disconinuous conducion mode, in Proceedings of he 2h Annual IEEE Power Elecronics Specialiss Conference (PESC 89), pp , June [4] G. C. Verghese, C. A. Bruzos, and K. N. Mahabir, Averaged and sampleddaa models for curren mode conrol: a reexaminaion, in Proceedings of he 2h Annual IEEE Power Elecronics Specialiss Conference (PESC 89), pp , June [5] F. D. Tan and R. D. Middlebrook, Unified model for currenprogrammed converers, IEEE Transacions on Power Elecronics, vol. 1, no. 4, pp , [6] S. BenYaakov, Spice simulaion of PWM DCDC converor sysems: volage feedback, coninuous inducor conducion mode, Elecronics eers, vol. 25, no. 16, pp , [7] Y. Amran, F. Huliehel, and S. BenYaakov, A unified SPICE compaible average model of PWM converers, IEEE Transacions on Power Elecronics, vol. 6, no. 4, pp , [8] S. BenYaakov, D. Vardy, and Z. Gaaon, A unified model of curren feedback in swich mode converers, in Proceedings of he Inernaional Conference on Circuis and Sysems, pp , 1992.

8 8 Advances in Power Elecronics [9] P. C. Todd, UC3854 conrolled power facor correcion circui design, in Produc and Applicaion Handbook, U134 Applicaion noe, Unirode Inegraed Circuis, [1] S. BenYaakov and Z. Gaaon, Generic SPICE compaible model of curren feedback in swich mode converors, IEEE Elecronic eers, vol. 28, no. 14, pp , [11] R. B. Ridley, A new coninuousime model for currenmode conrol, in Proceedings of he Power Conversion and Inelligen Moion (PCIM 89), pp , [12] R. D. Middlebrook, Predicing modulaor phase lag in PWM converer feedback loops, in Proceedings of he Advances in Swichedmode Power Conversion, paper H4, pp , 1981.

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