Jitter Analysis of Current-Mode Logic Frequency Dividers

Transcription

1 Universiy of California a Davis, Deparmen of Elecrical and Compuer Engineering Marko Aleksic Jier Analysis of Curren-Mode Logic Frequency Dividers Ph.D. Research Proposal

2 able of Conens Secion : Inroducion 3 Secion : Jier definiions 5.. Absolue jier 6.. Cycle jier 8.3. Cycle-o-cycle jier 8.4. Jier specificaions and peak-o-peak jier 9.5. Phase noise 9.6. Relaionship beween jier and phase noise Secion 3: Effecs of frequency divider noise on PLL oupu jier 3.. PLL basics 3.. Propagaion of FD jier hrough PLL Example 9 Secion 4: General properies of FD jier 4.. Jier of asynchronous muli-sage FD 4.. Cycle and absolue FD jier Effecs of FD srucure on jier Impac of jier on maximum inpu frequency of a FD FD jier as a funcion of oupu capaciance 33 Secion 5: he proposed analyical model for CML FD jier FD jier analysis: sae-of-he-ar CML FD implemenaion Linear ime-varian naure of jier generaion he proposed CML FD jier model Assumpions and approximaions Maser-slave lach jier generaion Level-shifer jier generaion Finding noise power specral densiy Comparison of he proposed model wih HSPICE simulaions Jier generaion as a funcion of FD load capaciance Simulaion of zero-crossing ime variaion Novel approaches in he proposed model 57 Secion 6: Proposed fuure research and conribuions Proposed fuure research Conribuions 6 Lis of references 6

3 Secion : Inroducion As he signaling raes in oday s communicaion sysems grow and are now measured by ens of Gbps, iming uncerainy of signals i.e. iming jier is becoming a bigger issue. Unforunaely, jier does no scale down wih he signal period and i can cause serious problems during daa recovery a recepion. In wireless sysems, imperfec iming of he carrier signal causes inerference beween channels. As a resul, jier specificaions for high-speed communicaion sysems over copper, opical fiber or air, have o be very sringen. A lo of research is being done in he area of phase noise and jier analysis of highperformance clock and carrier signal generaors, which are mos commonly implemened using phase-locked loops PLL. Mos of he work is focusing on he analysis of volageconrolled oscillaors VCO, which are pars of every PLL. VCO is definiely he mos significan conribuor o he PLL oupu jier, since is oupu is a he same ime he oupu of he PLL. However, i is no he only jier source. As will be shown in his work, frequency divider FD, anoher ineviable componen of a GHz-range PLL, can also conribue significanly o he PLL oupu jier. Ye, FD jier and phase noise analysis has no received much aenion, and no much work has been done in ha area. In his proposal, an analyical model which allows esimaion of jier generaed by he frequency divider is presened. Having an analyical model for jier is imporan for several reasons: amoun of jier generaed by he circui can be known before fabricaion 3

4 and i allows deermining wheher he design mees he specificaions in he early sages of he design process. Also, he model gives insigh in dependence of jier on circui parameers, which allows minimizing jier by appropriae design. Since design echnique of choice in RF inegraed circuis is he low-swing differenial curren-mode logic CML, which allows high speed a low cos, his work focuses on jier analysis of CML frequency dividers. he proposal is organized as follows: Secion gives definiions of jier used hroughou he proposal. Secion 3 invesigaes effecs of FD noise on PLL oupu jier and illusraes imporance of sudying and minimizing jier generaed by FD. Secion 4 sudies general characerisics of FD jier, wihou analyzing mechanisms of jier generaion by he FD circuis. he mos imporan par of he proposal is Secion 5, which proposes an analyical model for ransformaion of FD device noise ino jier. Secion 6 presens plans for he fuure work and emphasizes he conribuions of his research. 4

5 Secion : Jier definiions Jier is a variaion of signal period from is nominal value. I can also be defined as a variaion of zero-crossing imes of he signal. he laer definiion is usually used in conex of differenial signals: zero-crossing imes refer o ime insances when differenial signal crosses he zero value. Jier is a ime-domain uncerainy of a periodic signal ha is caused by device noise or inerferences power supply ripple, cross-alk, radiaion ec. Due o hese facors, duraion of each cycle of a periodic signal is differen. his variaion of signal period from is nominal value,, ofen is modeled o have a Gaussian disribuion, wih a mean value of zero on average, period of he signal is equal o he nominal, specified period, as shown in Fig... Since jier has a probabilisic naure, i is characerized by is roo-mean-square RMS value, raher han is ampliude or peak-o-peak value. Jier RMS value is also he sandard deviaion of jier disribuion, σ. Square of he RMS value, σ is referred o as jier power. p σ σ Fig... Disribuion of period variaions of a realisic, periodic signal 5

6 Depending on he ime inerval over which jier is measured, several definiions of jier can be esablished: we can disinguish absolue, cycle, and cycle-o-cycle jier. In he lieraure, differen auhors offer differen definiions, bu in his work, definiions from [Herz99] will be adoped, and in some cases somewha modified... Absolue jier Absolue jier is measured over a long period of ime, i.e. a large number of signal cycles. herefore, absolue jier is also referred o as long-erm jier. Jier can be measured using an insrumen such as ekronix Communicaion Signal Analyzer CSA [McNe97], which is shown in Fig... CSA operaes as follows: afer he arrival of he rigger signal, he device records he disribuion mean value and sandard deviaion of he signal under es period, over he ime inerval specified by he value. For absolue jier measuremens, has o be equal o N, where N is an ineger, and is he nominal period of he signal under es. As shown in [McNe97], in case of free-running oscillaors, jier measured his way depends on he measuremen inerval,, i.e. absolue jier increases wih measuremen ime. he reason for his is ha uncerainy of he signal in he curren cycle affecs all he following ransiions and is effecs accumulae [Haji99, McNe97]. rigger signal signal under es rig in CSA σ Fig... Jier measuremen using communicaion signal analyzer 6

7 he following definiion for absolue RMS jier, σ [Herz99]: m abs, is a modified definiion from M abs abs σ σ N lim Nm N. M M Absolue RMS jier depends on he measuremen inerval, i.e. number of cycles observed, N, and i is obained from a large number of measuremens, M ideally M. In., N m signifies he end of he N h cycle of he signal under es, in he m h measuremen Fig..3. N is he end ime of he N h cycle of he nominal signal i.e. N nominal signal periods. Absolue RMS jier can be found using.. m N 3... N- m N ideal signal signal under es Fig..3. Jier measuremens ime diagrams in he m h measuremen In [Herz99], definiion of he absolue jier is he following: abs N N n n In he equaion above, n signifies he signal period in he n h cycle and is he nominal period. his definiion gives a value for jier from only one measuremen. As menioned above, jier is a random process, and herefore, we are more ineresed in is mean value and sandard deviaion, han is insananeous value. For his reason, in his work, we will use definiion. for absolue jier. 7

8 .. Cycle jier Cycle jier definiion is aken from [Herz99]. Cycle RMS jier, σ following expression: M m M m cyc, can be found by he M cyc σ lim. In he equaion above, m is he period of he signal under es, in he m h measuremen, and is he nominal signal period Fig..3.. can be obained from., by subsiuing N. Cycle RMS jier shows sandard deviaion of one signal period from is nominal value. In he lieraure, when a RMS jier value is repored, i usually refers o he cycle jier unless specified oherwise..3. Cycle-o-cycle jier Cycle-o-cycle jier definiion is aken from [Herz99]. Cycle-o-cycle jier shows a variaion of signal period beween wo consecuive signal cycles: N σ lim.3 cc N n+ n N n In he equaion above, n signifies he measured signal period, n cycles from he sar of he measuremen. Cycle-o-cycle jier will no be used in his work, bu definiion.3 is given for compleeness. I is imporan o undersand he difference beween cycle and cycle-o-cycle jier: cycle jier is he difference beween signal period and he nominal period, while cycle-o-cycle jier shows variaion of he signal period in wo consecuive signal cycles. I should be noed ha some auhors refer o. as cycle-o-cycle jier [Haji99, Demi], and.3 as iner-cycle jier. In his work erminology from [Herz99] was 8

9 adoped. herefore, cycle and cycle-o-cycle jier are defined as in. and.3, respecively..4. Jier specificaions and peak-o-peak jier Jier specificaions for digial sysems are usually expressed using he RMS value of jier, σ. Knowing σ, we know ha abou 67% of he ime, jier ampliude falls wihin he range of [, σ ]. Peak-o-peak jier is he maximum jier ampliude ha can occur in a sysem. Since jier has a probabilisic naure, i is hard o deermine he real value of peak-o-peak jier. However, knowing ha more han 99% of he jier ampliude falls wihin [, 3σ ], a number α usually greaer han 3 can be found depending on he applicaion, and peak-o-peak jier can be defined as ασ [MaxiAN]. I should also be noed ha boh RMS jier and peak-o-peak jier are usually expressed relaive o he nominal signal period uni inerval, UI, e.g..ui..5. Phase noise As menioned before, jier represens a variaion of signal period from is nominal value; herefore, i is a ime-domain figure of meri. he signal uncerainy can also be expressed in he frequency domain and hen, i is referred o as phase noise. Phase noise is usually expressed as relaive power of a specral componen a he offse frequency f m from he carrier nominal frequency, wih respec o he carrier signal power. Power of he specral componen a he offse frequency f m is measured in he bandwidh of Hz. Definiion of phase noise is: 9

10 P f L f m m log P.4 Phase noise is expressed in dbc decibels below carrier: as an example, a GHz oscillaor can have phase noise of -9dBc a he offse frequency of khz Fig..4. Ideally, specrum of a periodic signal consiss of componens a ineger muliples of he fundamenal nominal frequency Fourier series of a periodic signal. In his case, Lf m. However, due o noise, specral conen of he signal around carrier a nominal frequency will look as in Fig..4 aken from [Poor]: Lf m [db] f m [Hz] Fig..4. ypical oscillaor phase noise plo Phase noise characerisic can be approximaed wih a Lorenzian specrum [Demi, Poor]: P f P m π πf πf c + f c m 3. In he equaion above, f is he nominal frequency of oscillaion, f m is he offse frequency and c is a consan which represens a characerisic of he oscillaor.

11 I should be emphasized ha phase noise can be described by 3. and a plo as he one in Fig..4, only when colored noise sources e.g. /f or burs noise are no presen in he circui, i.e. when noise sources are uncorrelaed..6. Relaionship beween jier and phase noise When only whie noise is presen in he oscillaor circui, phase noise characerisic can be approximaed by 3.. his equaion conains he coefficien c which is a figure of meri of he oscillaor and depends on circui opology, as well as noise parameers of he circui. As shown in [Demi], when only whie noise is presen in he circui, absolue jier power of he oscillaor is proporional o he produc of c and measuremen ime: σ c, abs 3.3 herefore, a relaionship beween phase noise and cycle jier can be esablished using 3. and subsiuing /f in 3.3: σ, cyc f L f m 3 f I is very imporan o emphasize ha, his relaionship beween jier and phase noise holds only when all he noise sources in he circui are whie. When colored noise sources are presen, here is no unique relaionship beween phase noise and jier. he reason for his is he difficuly of approximaing oscillaor specrum by a closed-form expression [Haji97, Poor97].

12 Secion 3: Effecs of frequency divider noise on PLL oupu jier As menioned in he inroducory secion, here is a lo of research going on in he area of jier and phase noise analysis of RF circuis. However, mos of ha work focuses on he VCO noise. We will now show ha he FD noise can also conribue o he jier a he PLL oupu, illusraing he imporance of FD jier analysis. 3.. PLL basics Block-diagram of a PLL wih a charge pump, which is commonly used for clock signal generaion in Gbps ransceivers, is shown in Fig. 3. [Bes3]. Frequency divider FD oupus a signal v FD whose frequency is N imes lower han frequency of he PLL oupu signal v ou. Phase-frequency deecor PFD compares phases and frequencies of v FD and v ref. v ref is a reference signal wih a high specral puriy, usually obained from a crysal oscillaor. Charge pump generaes an oupu curren I CP whose average value is proporional o he phase difference, wih a proporionaliy coefficien K P. Highfrequency componens of I CP are eliminaed by he loop filer LP wih a low-pass ransfer funcion Fs. Oupu of he filer is a low-frequency volage V C which conrols he frequency of he VCO oupu signal, v ou. Frequency of v ou is proporional o V C wih a proporionaliy coefficien K O.

13 FD by N v FD K P K O V PFD & Charge C VCO v v ref Pump ou I CP LP Fs Fig. 3.. Block-diagram of a PLL wih a charge pump Negaive feedback in he PLL from Fig. 3. will aemp o neuralize any phase and frequency difference beween signals v FD and v ref and adjus he VCO conrol volage V C so ha, when PLL is locked, frequency of v ou will be exacly N imes higher han frequency of he reference v ref. When locked, PLL from Fig. 3. can be represened by a linear model shown in Fig. 3.. Inpu and oupu signals in his PLL diagram are phase offses, e.g. Φ FD is he Laplace ransform of φ FD, where φ FD is he ime-domain phase offse of he FD oupu signal: v FD W FD πf in + φ FD. In his equaion, f in is he nominal frequency of he FD oupu signal and W FD x is a π-periodic funcion represening he FD oupu. his model gives insigh in dynamic behavior of he PLL around he locked sae i.e. response of he PLL on small variaions in phase and frequency of v ref. /N Φ ref Φ FD + - Φ I + e K CP P Fs V C K O s Φ ou Fig. 3.. Linear model of a PLL 3

14 ransfer funcion of he PLL from Fig. 3., Hs, is given as Φ H s Φ ou ref NK P Ns + K K P O K F s O F s or, for naural frequencies, f by subsiuing sjπf in he above equaion: NK PKOF jf H jf. 3. jnf + K K F jf P O Hjf is a low-pass ransfer funcion wih a DC value Hj N. Exac shape of he magniude characerisic of he PLL ransfer funcion depends on he loop filer ransfer funcion Fs, bu a ypical plo of Hjf is skeched in Fig Frequency a which magniude Hjf reaches of is DC value is called PLL loop bandwidh, B PLL. Now, we can menion ha he linearized model in Fig. 3., more closely represens he PLL from Fig. 3. when B FD <<f in i.e. when dynamics of he loop is slower han dynamics of he signals Hjf N B PLL f Fig Magniude of PLL ransfer funcion As menioned above, PLL ransfer funcion describes he frequency-domain response of a PLL on small variaions in phase and frequency of he reference signal v ref. Knowing he PLL frequency response is also imporan for jier and phase noise analysis, since phase noise is nohing else bu unwaned variaions of signal phase or frequency. 4

15 3.. Propagaion of FD jier hrough PLL o sudy effecs of he frequency divider jier phase noise on PLL oupu jier, we need o assume ha all oher componens of he PLL are ideal i.e. noiseless and ha frequency of he reference signal v ref is consan i.e. phase noise of v ref is zero. Wihou loss of generaliy, we can assume ha Φ ref in Fig. 3. is Φ ref. he only noisy elemen is he FD, so all he jier ha occurs a he PLL oupu comes from he frequency divider. Our goal is o find he porion of he FD-generaed jier ha is passed hrough from FD oupu o he PLL oupu. Ideally, when here are no noise sources presen in he PLL, signal v FD will have a consan frequency f in, and he zero-crossing of v FD will always occur a ime insans n in, where in is he nominal period of v FD and v ref, and n is an ineger. Le us assume ha he FD conains only whie, uncorrelaed noise sources e.g. only hermal noise of he resisors used in he circui and ha he equivalen noise bandwidh of he FD circui is B FD in Hz. hese noise sources cause zero-crossing imes of v FD o vary from n in by a value. represens jier and is a random variable, whose disribuion we will assume o be Gaussian, wih a mean of zero and a sandard deviaion RMS value of σ, as was shown in Fig... RMS value of FD jier, σ, can be obained hrough measuremens, when FD is ou of he PLL. Using resuls of [McNe97] which indicae ha he power specral densiy PSD of jier is proporional o he PSD of device noise, and approximaing he FD wih an ideal low-pass ransfer characerisic wih bandwidh B FD, we assume ha he single-sided PSD of, S f, looks as depiced in Fig

16 S f S B FD f Fig Jier power specral densiy According o Parseval s heorem, power of jier has o be he same in he ime- and frequency-domain; herefore, from Fig. 3.4: S. 3. B FD σ Le us now ry o relae jier and phase noise so ha we can use he linearized PLL model from Fig. 3. and he ransfer funcion 3. o find PLL oupu jier. Variaions of zerocrossing ime i.e. variaions of in cause variaions of signal phase. herefore, jier can also be represened as phase noise, using he relaionship: in in φ π φ π in in. 3.3 Using 3.3, PSD of phase noise S φ f can be obained as: π Sφ f S f 3.4 in and i has he same profile as jier PSD in Fig. 3.4 wih he DC value a f: S π π σ S in. 3.5 in BFD φ 6

17 Noisy frequency divider from he linearized PLL model in Fig. 3. can be modeled as an ideal FD, wih an addiive phase noise source a is oupu, as shown in Fig. 3.5a. PSD of ha phase noise source is S φ f, given in 3.4, and is power is σ π φ φ B FD σ in S 3.6 where σ φ is he RMS value of he phase noise source. In Fig. 3.5a, σ φou is he PLL oupu RMS phase noise, caused by σ φ. PSD of he PLL oupu phase noise S φou can be found as S φou H a jf S φ 3.7 where H a jf is he ransfer funcion from σ φ o σ φou of he sysem in Fig. 3.5a, for naural frequencies, sjπf. σ φ noisy FD /N + - I + K CP P Fs V C K O s σ φou a /N σ φ + - I + K CP P Fs V C K O s σ φou b Fig Linear PLL wih a noisy FD Noe ha H a jf Hjf, where Hjf is he ransfer funcion of he linearized PLL model from Fig. 3., defined in 3.. herefore, H a jf Hjf and expression for he PLL 7

18 oupu phase noise PSD from 3.7 remains he same if he FD noise source σ φ is moved o he PLL inpu, as shown in Fig. 3.5b. In oher words, FD oupu noise is seen by he PLL as inpu noise. Power of he oupu phase noise can now be found by subsiuing H a jf wih Hjf in 3.7, and inegraing 3.7 over all frequencies: + + BFD Sφou f df H jf Sφ f df φ σ S H jf df. 3.8 φou Oupu phase noise power can be expressed in erms of FD RMS jier using 3.6: B FD π σ σ φou H jf df. 3.9 in BFD Finally, oupu phase noise power can be represened as he oupu jier power, using an expression analogous o 3.6, bu wih ou insead of in : σ π φou σ ou ou. 3. where σ ou is he RMS value of he PLL oupu jier, and ou is he nominal period of he PLL oupu signal v ou from Fig. 3. in N ou. Combining 3.9 and 3., a final expression which shows he relaionship beween PLL oupu jier power and FD jier power is obained: σ ou BFD B H jf df FD ou σ H jf df σ in B 3. FD N B FD or in erms of RMS jier: 8

19 BFD H jf df σ ou σ. 3. N B FD Expression 3. shows ha, in wors case, all he FD jier can be passed hrough o he PLL oupu when B FD <<B PLL, so ha Hjf N for frequencies [, B FD ]. I also indicaes ha oupu jier can be minimized by minimizing Hjf, i.e. PLL loop bandwidh B PLL which in urn impairs dynamic characerisics of he PLL. By dividing boh sides of 3. by he nominal oupu period, ou, an expression which shows relaive RMS jier, wih respec o nominal inpu and oupu periods, can be found: BFD H jf ou σ ou σ ou Nou BFD ou in df σ σ BFD H jf B FD df and finally: BFD H jf σ ou[%] σ [%]. 3.3 B FD df 3.3. Example As an example, consider a digial PLL whose linear model can be represened by he diagram in Fig. 3., wih he following parameers [FLAPLL]: K P A/rad K O.33 Hz/V N6 9

20 p s s z s K s F F + + Parameers of he loop filer are: K F.97 Ω z rad/s p4.6 7 rad/s PLL ransfer funcion is: z s K K K s p s N z s K K NK s F K K Ns s F K NK s H F O P F O P O P O P Wih hese parameers, loop bandwidh of his PLL is abou B PLL 4.7MHz. Nominal frequency of he PLL inpu signal is f in MHz in ns and, since N6, frequency of he PLL oupu signal is f ou.6ghz ou 65ps. Plo of he PLL ransfer funcion magniude for naural frequencies, Hjf Hs sjπf, is shown in Fig Fig Magniude of he PLL ransfer funcion from [FLAPLL]

21 Le us assume ha he frequency divider inside he PLL generaes jier wih a RMS value of σ ps % of he nominal inpu period in, i.e..ui. he goal is o find he oupu RMS jier caused by he FD, by using 3.. If we assume ha he bandwidh of he frequency divider is B FD MHz f in, hen by applying 3., oupu RMS jier is σ ou ps, or 3.% of he nominal oupu signal period i.e..3ui. We can see from his example, ha even hough he absolue amoun of jier a he PLL oupu is smaller han he amoun of jier generaed by he FD, i occupies a larger porion of he oupu signal cycle. herefore, we could say ha here exiss an amplificaion of he FD jier by he PLL. When he FD division raio N is high, which is he case in RF PLLs, his jier amplificaion is even more pronounced. I should also be noed ha he assumpion ha jier and phase noise are uniformly disribued over a wide range of frequencies, [, B FD ], is very opimisic. Noise will acually be concenraed around low frequencies e.g. due o /f flicker noise, resuling in lower B FD, which will, for he same σ, cause increased σ ou, according o 3.. For hese reasons, i is imporan o know he mechanisms by which FD generaes jier, as well as how o predic i and how o minimize i. Analyical model for FD jier will help wih hese asks and ha is he main moivaion for his research.

22 Secion 4: General properies of FD jier Before we sar analyzing how device noise inside he CML frequency dividers ransforms ino jier, le us sudy some general properies of FD jier. hese properies are no characerisic for CML implemenaion of FD only, bu are common for a broad range of differen FD implemenaions. herefore, he analysis presened in his secion is he analysis on he block-level, as opposed o he jier analysis on he circui-level, which will be presened in Secion 5. Assuming ha we know he amoun of jier generaed by one FD sage or one FD sub-block, we wan o see how jier propagaes hrough a muli-sage FD, how each FD sage affecs jier of he adjacen sages, how jier affecs he maximum oggling rae of he FD ec. his analysis will give us an insigh ino mehods for minimizing FD jier on he FD block-level. 4.. Jier of asynchronous muli-sage FD Curren-mode logic CML frequency dividers are asynchronous couners. A block diagram of an asynchronous frequency divider by N is shown in Fig. 4.. he frequency divider consiss of n sages, each sage dividing frequency by wo. herefore, frequency division facor N is N n. in FD FD FD n ou Fig. 4.. Asynchronous frequency divider by N N n

23 Le us firs assume ha all he sages FD hrough FD n are ideal and do no conain any noise sources, bu inpu signal in conains jier wih he RMS value of σ in. Le us also assume ha he FD oupu signal RMS jier is σ ou. FD sages canno cause any jier, herefore, jier ha occurs a he oupu mus originae from he inpu. o find he porion of jier ha is passed hrough from he inpu o he oupu, le us observe one sage of he frequency divider, FD i : Each sage of he frequency divider is implemened as a -flip-flop. Oupu of a -flipflop changes is sae afer an arrival of he acive edge of he inpu signal acive edge can be eiher rising or falling edge. A ransiion of he oupu occurs a propagaion delay ime afer he occurrence of he acive edge of he inpu signal. If here are no noise sources in he flip-flop, he propagaion delay ime is consan. herefore, if here is some jier in he inpu signal, he same amoun of jier will be passed hrough o he oupu of he flip-flop. An equaion which relaes jier powers a inpu and oupu of he i h sage when ha sage does no generae jier can be wrien: σ σ i..n-, wih σ n σ ou and σ σ in. 4. i i In he equaion above, σ is he RMS jier. If we now assume ha each frequency divider sage conains noise sources which generae jier wih a RMS value of σ a is oupu, hen equaion 4. needs o be modified. Now, oupu jier power of he i h sage is a sum of he inpu jier and he jier generaed by he sage iself: σ σ σ. 4. i + i I was assumed in 4. ha inpu jier and jier generaed by he FD sage are no correlaed. herefore, heir variances add raher han heir RMS values. 3

24 Applying 4. on each sage of he frequency divider from Fig. 4., saring from he las, n h sage, an equaion which gives jier power of he FD oupu signal is: σ σ nσ. 4.3 ou in + In his case, i was assumed ha jier generaed by differen FD sages is no correlaed. An analysis similar o his was presened in [Egan9], bu he signal uncerainies were represened as phase noise phase- or frequency-domain uncerainy, raher han jier ime-domain uncerainy. In case when each sage of he frequency divider conribues o he oupu jier wih a differen amoun of jier, equaion 4.3 has o be modified: σ σ + σ 4.4 ou in FD where σ FD is he effecive oupu RMS jier of he enire n-sage frequency divider. Equaion 4.4 is more general han 4.3, and i holds for boh asynchronous and synchronous frequency dividers. From 4.3, i can be seen ha he oupu jier power increases linearly wih he number of frequency divider sages. As an example, in PLLs used in Gbps ransceivers, frequency dividers ypically have n6 sages in order o achieve ~GHz PLL oupu frequency, using a ~5MHz crysal quarz oscillaor as a reference signal division facor is hen N A frequency divider wih such a large number of sages can generae a significan amoun of jier [Haji]. 4.. Cycle and absolue FD jier When deriving 4.4, we did no specify wheher he jier values ha appear in he equaion signify absolue long-erm or cycle jier. he equaion holds for boh ypes of 4

25 jier, bu we will now show ha jier ha originaes from he FD iself has he same value, wheher i is observed as he absolue or cycle jier. In oher words, FD-generaed RMS jier σ FD remains consan wih ime. 3 N FD inpu FD oupu free-running oscillaor cyc σ FD cyc σ FD Fig. 4.. Absolue jier of a FD driven by an ideal inpu signal, and a free-running VCO Le us observe a noisy frequency divider wih an ideal inpu signal. Such inpu signal does no inroduce any jier o he sysem σ in in 4.4, and all he jier ha occurs a he FD oupu comes from he FD iself. Definiions of absolue and cycle jier were given in. and., respecively, bu will be repeaed here for convenience: M σ σ m 4.5 M M abs abs Absolue jier: N lim N N cyc Cycle jier: lim M M m m m M σ 4.6 We will now show ha 4.5 and 4.6 yield he same resuls for jier, in case of a FD driven by an ideal inpu source: he oupu of he FD swiches only afer a posiive ransiion of he inpu signal, as illusraed in Fig. 4.. he ideal inpu is a reference which does no allow he FD oupu o wander and i reses he iming of he oupu signal afer every occurrence of he posiive ransiion of he inpu. herefore, when deermining he absolue jier a ime N in 4.5, we can assume ha he previous N- cycles of he FD oupu were ideal, 5

26 and only he las one is affeced by FD noise. hen, arrival ime of he N h rising edge happens a N + N N m m, 4.7 where m,n is he duraion of he N h cycle of he FD oupu signal, in he m h measuremen. Applying 4.7 in 4.5, 4.5 reduces o 4.6 and herefore, we can abs cyc conclude ha he FD cycle and absolue jier are he same i.e. σ σ σ. As opposed o ha of a frequency divider, absolue jier of a free-running oscillaor increases wih ime, since he sysem is auonomous, and here is no reference signal o adjus he iming. his is illusraed in Fig. 4., which shows jier of a free-running oscillaor, wih he same oupu frequency as he frequency of he FD. Any uncerainy of he signal ransiion in he curren cycle affecs all he following ransiions and is effecs accumulae [Haji99, McNe97]. Absolue jier of he frequency divider oupu signal can also increase wih ime, bu only if ha is caused by he FD inpu signal. FD FD FD 4.3. Effecs of he FD srucure on jier D maser CLK D slave CLK level shifer ou in Fig Frequency divider by wo CML -flip-flop 6

27 Using he CML design echnique, each frequency divider by wo i.e. -flip-flop in Fig. 4. is implemened using a maser-slave lach whose invered oupu is fed back o is inpu, and a level-shifer a he oupu, as shown in Fig. 4.3 CML echnique uses lowswing differenial signaling, bu only single lines are shown in Fig. 4.3 for simpliciy. Also, inverer shown in he feedback pah does no exis in he real implemenaion because signal inversion can be achieved by properly connecing differenial inpu/oupu pors of he laches. In Fig. 4.3, maser lach is ransparen while inpu signal in is in is low phase, and slave lach is ransparen during he high phase of he inpu. he levelshifer is needed o adjus he DC level of he oupu signal so ha i can be used o clock he following sage anoher divider by wo. Oupu of he slave lach changes only afer he rising edge of he inpu i.e. rising edge is he acive edge for his maser-slave lach. herefore, only jier of he rising edge of he inpu signal will be passed hrough o he frequency divider oupu, while jier of he falling edge will be suppressed by he frequency divider, as shown in Fig his fac needs o be accouned for when using 4. hrough 4.4 for muli-sage frequency dividers. in ou Fig Inpu and oupu waveforms of he frequency divider-by-wo inpu In order o confirm hese conclusions, he following experimen was conduced: An acual CML frequency divider sage was simulaed in HSPICE. he arrival imes of boh rising and falling edges of he inpu signal in from Fig. 4.3 were varied from heir nominal values, and offse in he arrival ime of he FD oupu signal ou was measured. Resuls are shown in Fig Solid line shows ha jier of he rising acive edge of he 7

28 inpu causes he same amoun of oupu jier i.e. inpu-oupu jier ransfer funcion is one, while jier of he falling edge of he inpu does no cause any jier a he oupu, as shown by he doed line inpu-oupu jier ransfer funcion is zero. his experimen also confirms relaionship offse of ou edge [ps] rising falling offse of in edge in [ps] Fig Inpu jier propagaion Anoher observaion can be made by sudying he srucure of he FD by wo in Fig Firs, i should be inuiively clear ha device noise of a lach causes jier only during ransiions of he lach oupu signal i.e. around he zero-crossing ime of a differenial signal. his will be sudied in more deails in Secion 5 which proposes he analyical model for FD jier. While oupu of he lach is sable eiher low or high, noise causes small variaions of he signal level, bu hese variaions of he oupu volage canno be ransferred ino jier. Fig. 4.6 shows oupu signals of he maser and slave laches of he FD by wo from Fig Maser lach changes is value afer every falling edge of he inpu signal in, and slave lach changes is sae afer every rising edge of in. I is assumed ha noise sources exis only in he maser lach, causing is oupu signal o be non-ideal. However, when slave lach samples he maser oupu a ime insans k S, 8

29 k,,, maser lach is eiher in he high or low sae, and hese saes will be sampled correcly level variaions will be suppressed by he slave lach. herefore, device noise in he maser lach will no cause any jier a he oupu of he slave lach, and hence, a he oupu of he FD. in maser oupu slave oupu s s 3 s 4 s Fig Signal waveforms of he maser-slave lach from Fig o prove hese observaions, anoher experimen was conduced: One-sage FD wihou level-shifer was simulaed in HSPICE, wih wo curren sources, i nm and i ns, conneced o he oupus of maser and slave laches respecively, as shown in Fig hese curren sources simulae oupu-referred device noise of maser and slave laches, respecively. Fig. 4.8 shows eye-diagrams of he ou signal, when only i ns is acive Fig. 4.8a, and when only i nm is acive Fig. 4.8b. I can be seen from Fig. 4.8 ha only i ns i.e. device noise from he slave lach causes jier a he FD oupu: here is a significan zero-crossing ime variaion in case when only i ns is acive, while zerocrossing ime when only i nm is acive pracically remains consan. I should be menioned ha in hese simulaions, sources i nm and i ns were ses of curren pulses wih variable arrival imes, raher han real noise sources his was he easies way of simulaing noise sources in HSPICE. 9

30 D maser D slave ou CLK CLK in i nm i ns Fig Simulaion seup for he analysis of jier generaion by maser and slave device noise a variaion of zerocrossing ime b Fig Zoomed-in eye-diagram of he oupu of FD from Fig. 4.7: a when only noise in he slave lach is presen i ns from Fig. 4.7 is acive and b when only noise he maser lach is presen i nm from Fig. 4.7 is acive 3

31 Level-shifer was no included in he circui in Fig However, i also conribues o he FD oupu jier. he level-shifer is usually a source-follower. If he RMS jier generaed by he maser-slave lach more precisely slave lach is σ MS and he RMS jier generaed by he level-shifer is σ LS, FD sage oupu jier power is: σ σ + σ 4.8 ou MS LS which can be concluded from Fig I was assumed in 4.8 ha noise sources in he slave lach and level-shifer are no correlaed. A consequence of hese observaions is ha, when designing a FD sage, less aenion can be paid o designing he maser lach. On he oher hand, slave lach and he levelshifer should be designed more carefully. Finally, i should be noed ha, even hough he above analysis deals wih he CML implemenaion of FD, resuls are more general because maser-slave implemenaion of he -flip-flop from Fig. 4.3 bu usually wihou he level-shifer is applied when design echniques oher han CML are used Impac of jier on he maximum inpu frequency of a FD ½ in ½ in ji ji in jm jm maser sum pm sum pm js js slave sus ps sus ps Fig Waveforms for deermining maximum oggle frequency of he firs frequency divider sage 3

32 he maximum frequency of he signal ha can be applied o he inpus of he muli-sage frequency divider in Fig. 4. is limied by he characerisics of he firs divide-by-wo sage, since his sage oggles a he maximum rae. Jier generaed in his FD sage, in addiion o he jier of he inpu signal, will impose he margins o he minimum period of he inpu signal ha can be applied. he firs FD sage will fail when seup ime violaion of he maser-slave lach occurs seup ime of a lach is he minimum ime before he arrival of he acive edge of he clock signal CLK, for which daa inpu D has o be sable, in order for lach o capure he daa inpu correcly [Soj99], see Fig he minimum inpu period can be deermined from he waveforms in Fig Parameers in Fig. 4.9 are he following: in is he period of he inpu signal; ji is he jier of he inpu signal; jm and js are he oal jier values of he maser and slave laches, respecively; pm and ps are he clock-o-oupu propagaion delay imes of he maser and slave laches, respecively; sum and sus are he seup imes for he maser and slave laches, respecively. As shown in Fig. 4.9, i was assumed ha he parameers are idenical for boh rising and falling edges of he signals, bu hey may differ for maser and slave lach. Using he diagrams from Fig. 4.9, equaion for he minimum period of he inpu signal can be se: min in { } max, ji ps js sum ji In equaion 4.9, he firs expression under he max operaor is he condiion which ensures ha here is no seup ime violaion for he maser lach, and he second expression ensures ha here is no seup ime violaion for he slave lach. herefore, when deermining he minimum period of he inpu signal, jier of he inpu signal as well as jier generaed by he maser and slave laches should be known, in order o se ji pm jm sus ji 3

33 he margin for he minimum inpu period. he margins imposed by jier are ji + js or ji + jm, depending on which expression in 4.9 is criical FD jier as a funcion of oupu capaciance When frequency divider in Fig. 4. is implemened using sandard CMOS process which is he case when CML design echnique is used, each sage of he FD sees he following sage as a capaciive load a is oupu. We will now show ha jier performance of he enire FD depends on he relaive sizing of he FD sages, since jier of each sage depends on he capaciive load inroduced by he following sage. In order o sudy dependence of FD oupu jier on is oupu capaciance, we need o know he exac analyical model for he FD jier. herefore, his analysis will be revisied once he analyical model is derived. In his secion, however, we will jus ry o inroduce some general ideas how oupu capaciance affecs jier. As menioned in he previous secion, device noise can affec oupu jier only during he ransiions of he oupu. When he oupu signal level is sable high or low, noise can vary he level of he signal, bu his canno affec he zero-crossing ime and cause jier. Only noise sources which ac around he zero-crossing ime i.e. during oupu signal ransiions are going o generae jier. As he oupu load capaciance of he FD sage increases, if he sage size sizes of he devices in he FD sage remains unchanged, ransiion ime of he oupu signal will increase proporionally wih he oupu capaciance. herefore, ime window in which he circui is sensiive o noise increases, and jier should also increase. 33

34 Resuls of an experimen which invesigaes dependence of he zero-crossing ime variaion on he FD oupu load are presened in Fig. 4.. he es seup for his experimen was he same one from Fig. 4.7, bu in his case, only source i ns was acive since we concluded ha i nm does no conribue o oupu jier. Also, FD sage was loaded wih a variable capaciance C ou. As in he previous experimen, source i ns was a se of curren pulses wih differen arrival imes, and he average variaion of he zerocrossing ime of he oupu signal was measured. Figure 4. shows normalized measuremen resuls. As shown in Fig. 4., average zero-crossing ime variaion increases wih he oupu load. For C ou, parasiic capaciances of he FD sage iself are dominan, and herefore, zero-crossing ime variaion is no zero...5 zero-crossing ime variaion..5. C C 3C C ou Fig. 4.. Dependence of he average zero-crossing ime on FD oupu load Knowing effecs of oupu load on FD jier, a few conclusions can be drawn and some design implicaions can be given. Firs, as menioned in he previous secion, device noise in he maser lach of a FD sage does no affec jier and less aenion can be paid o designing his lach. Moreover, maser lach inroduces a capaciive load o he slave lach oupu. herefore, in order o reduce jier a he FD oupu, a designer should minimize 34

35 he size of he slave lach. Anoher observaion can be made regarding relaive sizing of sages in he muli-sage FD from Fig. 4.. I may be possible o find a mehod for opimal relaive sizing of he FD sages in order o achieve minimum jier of he enire FD. his mehod would be similar o he logical effor mehod used for delay minimizaion in digial logic [Suh9]. In case of jier minimizaion, wo opposing parameers would be he size of a CML FD sage capaciive load which increases jier of he previous sage, and gain of he sage decreasing he sage size decreases is gain. Deriving he opimizaion mehod is beyond he scope of his research, bu i could become a par of fuure research. 35

36 Secion 5: he proposed analyical model for CML FD jier Having an analyical model for CML FD jier is imporan for several reasons. Firs, once he jier model is known, i will be possible o predic jier performance before he circui is fabricaed. herefore, wheher he sysem mees he design specificaions can be deermined in he pre-silicon phase of he design process. Beside ha, he model will esablish relaionships beween circui parameers and jier. Knowing his dependence, i will be possible o find which circui parameers are he mos imporan conribuors o he FD jier, and his will help finding a design sraegy for jier reducion: he ulimae goal is o develop a very-low jier frequency divider. 5.. FD jier analysis: sae-of-he-ar As menioned in he inroducory secion, here is no much work published in he area of FD jier and phase noise analysis. Some effors o characerize FD jier and phase noise are presened in [Egan9, Egan9, Dris9, Dris9, Krou]. [Egan9, Egan9 and Krou] use jier and phase noise measuremens of a series of frequency dividers available a he ime, and aemp o formulize a FD phase noise model by exrapolaing he daa. [Dris9 and Dris9] show only phase noise measuremens of wo ypes of analog frequency dividers. None of hese papers shows a relaionship beween jier or phase noise performance and circui parameers, and hence, canno offer any guidelines on how o design a low-jier FD. 36

37 5.. CML FD implemenaion Since jier generaion is closely relaed o he acual realizaion of he CML FD circui jier is caused by device noise, firs we need o sudy he FD circui implemenaion. Block diagram of a CML frequency divider by wo is shown in Fig. 5.. his block diagram is similar o he one given in Fig. 4.3, bu is more closely relaed o he CML implemenaion. As shown in Fig. 5., maser-slave lach and he level-shifer are biased wih a DC volage V BIAS and inversion in he feedback pah is realized by crossconnecing differenial inpus and oupus of he maser-slave lach. Also, i can be seen ha signals conain boh DC and AC componens e.g. v CLK V CLK +v clk and ha differenial signals have he AC componens in he couner-phase. D D CLK CLK BIAS CML lach D D CLK CLK BIAS CML lach IN OU IN OU BIAS level-shifer v OU V OU +v ou v OU V OU -v ou v CLK V CLK +v clk v CLK V CLK -v clk V BIAS Fig. 5.. Deailed block diagram of a CML frequency divider by wo Each CML lach from Fig. 5. is implemened as a circui shown in Fig. 5.. M generaes a consan curren I BIAS which is spli beween clock ransisors M and M M and M are idenical. Since he curren gain of he M -M pair is high, when signals CLK and CLK are sable, only one of he ransisors in he pair is acive in sauraion. When CLK is high, anoher ransisor pair, M 3 -M 4, will sir he curren I BIAS coming hrough 37

38 M, and se he oupus of he lach depending on he inpu signals D and D. his value will be kep by he cross-coupled ransisors M 5 and M 6, while CLK is low. ransisors M 3, M 4, M 5 and M 6 are all idenical. I should be noed ha resisors R and R are usually implemened using PMOS devices in he linear region, raher han poly or silicide resisors, due o he large olerance of he on-chip resisors up o 3% in some processes. V DD V DD R R D D CLK CLK M 3 M 4 M 5 M 6 M M BIAS M Fig. 5.. Schemaic of he CML lach Schemaic of he level-shifer is given in Fig he funcion of he level-shifer is o adjus he FD oupu level o he FD inpu level i.e. V CLK V OU in Fig. 5., so ha anoher FD sage can be driven. Level-shifer consiss of wo curren sources, M and M, and wo source-followers, M and M 3. Implemenaion of level-shifers may vary from he one in Fig. 5.3: for insance, a differenial amplifier can be placed in fron of he levelshifer, o provide addiional signal gain source-followers have volage gain less han one. 38

39 V DD V DD IN IN M M 3 OU OU M V BIAS M Fig Schemaic of he level-shifer In order o compare analyical resuls wih simulaions, one-sage CML frequency divider was designed using Fujisu.µm process wih V DD.V. Simulaed waveforms of his circui are presened in Fig. 5.4, which shows inpu signals v CLK and v, and oupu CLK signals of he maser-slave lach, v and v, before lowering he DC levels in he level- shifer. v [V].4. v v v CLK v CLK. [ns] Fig Waveforms of he simulaed CML FD wihou level-shifer 39

40 he FD akes he GHz inpu signal and oupus a signal whose frequency is 5MHz. DC level of he inpu signal is V CLK.6V, and maser-slave lach oupu DC level is V V. herefore, level-shifer is needed o lower he FD oupu DC level from V o.6v. Some imporan design parameers of he CML lach, ha are going o be used for comparison of he analyical model wih simulaions, are summarized in able 5.: able 5.. CML lach circui parameers Design parameer Symbol Value DC biasing curren drain curren of M I µa Oupu capaciance C C ff Oupu resisance R R.45kΩ 5.3. Linear ime-varian naure of jier generaion he analyical jier model proposed here is based on he linear ime-varian LV jier and phase noise models for elecric oscillaors, which were firs derived in he 96s [Kuro68]. he main idea behind he LV approach is ha noise-o-jier ransfer funcion is ime-dependen. More precisely, jier generaion is closely relaed o he oscillaor oupu waveform. he approach was revived in he 99s [Okum9, Okum93, Okum97]. In [Okum9], a simple SPICE-based simulaor ha performs a periodic small-signal analysis was implemened: he ool performs frequency AC analysis a each value of he periodically-varying operaing poin. Recenly, he same feaure was embedded in a Cadence simulaor, Specre [SpecRF]. However, LV approach received more aenion only afer publishing of [Haji98]. While previous works focused on mehods for numerical analysis of oscillaor phase noise ha is suiable for compuer-aided design, 4

41 his work aemped o develop a general heory of oscillaor phase noise. Supposedly, his heory should be valid for any kind of elecric oscillaors LC, ring oscillaors, ec, and i should give design guidelines for lowering phase noise. his work also received a lo of criiques because, in some pars, random naure of noise was negleced [Demi]. Anoher imporan propery of he LV phase noise models is he cyclosaionary naure of noise sources: no only he noise-o-jier ransfer funcion is ime-varian, bu also are he noise sources. Since he operaing poin varies periodically, saisical properies of noise also vary periodically. he FD jier model proposed here was inspired by he oscillaor jier and phase noise analyses presened in [McNe97] and [Haji98]. Improvemens of he proposed model over hese analyses will be discussed a he end of his secion, afer he model is presened. 5.4 he proposed CML FD jier model he FD jier model presened here is sill in is developing sage. I is jus a simplified version of he fuure FD jier model Assumpions and approximaions In order o simplify he FD jier model, some assumpions and approximaions need o be esablished. In fuure research, some of hese approximaions can be eliminaed. I. In hese preliminary analyses, we will assume ha only saionary, whie noise is presen in he FD circui. his means ha samples of each noise source, a differen ime insans, are no correlaed. Furhermore, we will assume ha differen noise sources in he circui are no correlaed. In all realisic circuis, especially hose 4

42 implemened in CMOS echnology, flicker /f noise is presen, bu effecs of his ype of noise can be accouned for laer in he research. When flicker noise is presen, assumpion ha samples of a noise source are uncorrelaed does no hold anymore. II. he second assumpion is ha, in a muli-sage frequency divider, each sage conribues o he oal oupu jier wih he same amoun of RMS jier. hen, oal oupu jier power can be found using equaion 4.. Wih his assumpion, jier generaion of only one FD sage needs o be analyzed in he following discussion. III. In order o simplify he analysis even furher, as we saw in Secion 4, we can sudy effecs of he maser-slave lach noise and level-shifer noise separaely. Furhermore, only jier caused by noise sources in he slave lach should be accouned for in he maser-slave lach jier calculaions, as shown in he same secion. oal jier of he FD sage can hen be found using 4.4 from ha secion. IV. I will be assumed ha oupus of he maser-slave lach, and, sar swiching immediaely afer he arrival of he rising CLK edge. Clock signals, CLK and CLK will be approximaed by perfec pulses wih very sharp slopes and a relaive phase shif of 8. Oupus of he maser-slave lach swich wih he maximum slew-rae of he CML lach, which depends on he DC biasing curren and oupu capaciance Maser-slave lach jier generaion o analyze jier generaed by he maser-slave lach, we will sudy effecs of a curren source i n, conneced o he oupu of he slave lach, as shown in Fig. 5.5, on variaions of he crossing ime of he slave lach oupus, v and. Source i n v 4

43 models he equivalen oupu-referred noise from devices in he slave lach, summed a node. As concluded in Secion 4 and according o assumpion III, here is no need o analyze effecs of he maser lach noise. Once we know how noise a node affecs oupu jier, we can use symmery of he lach circui o find effecs of he equivalen noise source acing a node. D D CLK CLK BIAS maser CML lach D D CLK CLK BIAS slave CML lach v v v CLK v CLK i n V BIAS Fig Circui used o sudy effecs of he slave lach noise on oupu jier As menioned earlier, noise-jier ransfer funcion is closely relaed o he oupu waveform. Fig. 5.4 shows waveforms of he simulaed FD sage, wihou a level-shifer a he oupu. o simplify he analysis, we can approximae he FD oupu waveforms using assumpion IV. hen, he idealized waveforms look like in Fig v v v v CLK ½ Fig Simplified waveforms from Fig. 5.5, using approximaion IV 43

44 o see how noise ransforms ino jier, le us observe oupu waveforms from Fig. 5.6, zoomed-in around Fig When noise is no presen, v and v from Fig. 5.7 can be described by he following equaions, for [, d ]: v v V V + I C I + C 5. For <, v V + and V. In 5., V + and V - are he maximum and minimum v maser-slave oupu volage levels, I is he DC biasing curren of he CML lach drain curren of M from Fig. 5., and C and C are he oal oupu capaciances a nodes and due o circui symmery, C C. Using 5., nominal ime when v and v inersec, d, can be found as: CVSW RC d. 5. I In 5., V SW is he maximum volage swing of he differenial oupu V SW V + V and R is he slave lach oupu resisance a node, V SW I R see Fig. 5.. V + V n v V - ' d d + j v d d Fig Zoomed-in FD oupu waveforms 44

45 45 Le us now assume ha noise source i n is a curren impulse, which occurs a ime. his curren impulse causes injecion of charge q n a node, a ime. he injeced charge will cause oupu volage v o abruply increase by a value V n, where V n q n /C Fig Effecs of charge injecion will sar vanishing, following he exponenial funcion, and v for [, d ] can now be wrien as follows: R C n e V C I V v Due o charge injecion, zero-crossing ime of he differenial oupu volage is changed and is now ' d. ' d can be found by equaing v from 5.3 and v from 5.. o simplify he calculaions, we can approximae he exponenial funcion wih he firs wo erms of is aylor series. he derivaion of ' d goes as follows: n n n SW d n d n n d SW d C R n d d d C R V C I C R V V V C R V C R V V C I V C I V e V C I V v v d ' ' ' ' ' ' ' ' In he denominaor of he erm behind he parenheses, we can assume ha n C I C R V << which is a reasonable assumpion since he volage increase caused by noise V n is expeced o be much less han double he maximum volage swing of he oupu: