University of Alberta

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1 Universiy of Albera Mulilevel Space Vecor PWM for Mulilevel Coupled Inducor Inverers by Behzad Vafakhah A hesis submied o he Faculy of Graduae Sudies and Research in parial fulfillmen of he requiremens for he degree of Docor of Philosophy in Power Engineering and Power Elecronics Deparmen of Elecrical and Compuer Engineering Behzad Vafakhah Spring 1 Edmonon, Albera Permission is hereby graned o he Universiy of Albera Libraries o reproduce single copies of his hesis and o lend or sell such copies for privae, scholarly or scienific research purposes only. Where he hesis is convered o, or oherwise made available in digial form, he Universiy of Albera will advise poenial users of he hesis of hese erms. The auhor reserves all oher publicaion and oher righs in associaion wih he copyrigh in he hesis and, excep as herein before provided, neiher he hesis nor any subsanial porion hereof may be prined or oherwise reproduced in any maerial form whasoever wihou he auhor's prior wrien permission.

2 Examining Commiee John Salmon, Elecrical and Compuer Engineering Andrew Knigh, Elecrical and Compuer Engineering Yunwei Li, Elecrical and Compuer Engineering Vincen Gaude, Elecrical and Compuer Engineering Ami Kumar, Mechanical Engineering Mehrdad Kazerani, Elecrical and Compuer Engineering, Universiy of Waerloo

3 To my lovely wife, Roya; I am happy ha I made you proud of me and my work. Your ongoing love and suppor in our life journey give me he confidence o go ou here and explore he world. I love you. To my parens, Mina and Mohsen, and my parens in-law, Homa and Hassan for heir suppor, belief and mos of all, love.

4 Absrac A mulilevel Space Vecor PWM (SVPWM) echnique is developed for a 3-level 3- phase PWM Volage Source Inverer using a 3-phase coupled inducor o ensure high performance operaion. The selecion of a suiable PWM swiching scheme for he Coupled Inducor Inverer (CII) opology should be based on he dual requiremens for a high-qualiy mulilevel PWM oupu volage ogeher wih he need o minimize high frequency currens and associaed losses in he coupled inducor and he inverer swiches. Compared o carrier-based mulilevel PWM schemes, he space vecor echniques provide a wider variey of choices of he available swiching saes and sequences. The precise idenificaion of pulse placemens in he SVPWM mehod is used o improve he CII performance. The successful operaion of he CII opology over he full modulaion range relies on selecing swiching saes where he coupled inducor presens a low winding curren ripple and a high effecive inducance beween he upper and lower swiches in each inverer leg. In addiion o hese requiremens, he CII operaion is affeced by he imbalance inducor common mode dc curren. When used efficienly, SVPWM allows for an appropriae balance beween he need o properly manage he inducor winding currens and o achieve harmonic performance gains. A number of SVPWM sraegies are developed, and suiable swiching saes are seleced for hese mehods. Employing he inerleaved PWM echnique by using overlapping swiching saes, he inerleaved Disconinuous SVPWM (DSVPWM) mehod, compared o oher proposed SVPWM mehods, doubles he effecive swiching frequency of he inverer oupus and, as a resul, offers superior performance for he CII opology by reducing he inducor losses and swiching losses. The inverer operaion is examined by means of simulaion and experimenal esing. The experimenal performance comparison is obained for differen PWM swiching

5 paerns. The inverer performance is affeced by high-frequency inducor curren ripple; he excessive inducor losses are reduced by he DSVPWM mehod. Addiional experimenal es resuls are carried ou o obain he inverer performance as a variable frequency drive when operaed in seady-sae and during ransien condiions. The CII opology is shown o have grea poenial for variable speed drives.

6 Acknowledgemens I would like o express my deep and sincere graiude o my advisors Dr. John Salmon and Dr. Andy Knigh. Their excellen supervision and guidance helped me hroughou my research and provided me a very deep insigh owards my fuure professional life. I have no only learned he ineresing opics of research involved in his work bu have also learned o adop a pracical way of hinking and o cope wih challenging problems. I am also deeply graeful for heir enhusiasic help, undersanding, insighful suggesions, encouraging and personal guidance. Addiionally, I would like o hank my supervisory commiee, Dr. Li, Dr. Kazeroni, Dr. Kumer, and Dr. Guaden, for all of heir ime and effor o review my work and heir suggesions for he improvemen of his disseraion. Special hanks also go o my fellow colleagues and friends who helped me a every sep of his sudy. Moreover, his work could no have been compleed wihou he excellen suppor provided by Alber Theriod. I would also like o hank he faculy and saff members of Elecrical and Compuer Engineering Deparmen, specially Pinder Bains, Kahleen Forbes and Nona McDonagh. Las bu no leas I would like o hank my family (my parens and parens in-law, my brohers and brohers in-law, and my siser in-law) and all my friends who are as close as family have been a consan source of coninues encouragemen, suppor, advice and love. Of course mos of all, I would like o hank o my wife, Roya, for her suppor, love, and above all paience. This endeavour would no have been possible wihou her love and irreplaceable suppor. This research work was suppored parially by he Universiy of Albera, Naural Sciences and Engineering Research Council of Canada (NSERC), Provos Docoral Enrance Award and Queen Elizabeh II Scholarship.

7 Table of Conens Chaper 1 Inroducion Research Objecives Thesis Ouline... 7 Chaper Mulilevel Power Converers Mulilevel Power Converer Feaures Mulilevel Power Converer Srucures Cascaded H-Bridges Diode-Clamped Mulilevel Inverer Flying Capacior Mulilevel Inverer Parallel Inverers Srucure Coupled Inducor Inverer Mulilevel Converers PWM Modulaion Sraegies Mulilevel Converer Applicaions Chaper Summary... Chaper 3 Spli-Wound Coupled Inducor Inverer Topology Coupled Inducor Inverer Topology Descripion CII Muli-Level Topology Operaion CII Winding and Oupu Currens Equaions CII Simplified Transformer Equivalen Model Coupled Inducor Winding and Oupu Curren Ripples Spli-Wound Coupled Inducor Flux Spli-Wound Coupled Inducor Cores Types Coupled Inducor Using Three-Single Cores Coupled Inducor Using a Three-Limb Core CII Swiching Saes Common Mode DC Curren Analysis Impac of Common Mode DC Curren on CII Operaion Impac of Swiching Saes on Common Mode DC curren Impac of Swiching Turn-On or Turn-Off Delays on Common Mode DC curren Impac of Device Volage Drops on Common Mode DC curren Swiching Device Raing Specificaions Chaper Summary... 4 Chaper 4 Coupled Inducor Inverer PWM Modulaion Sraegies The Significance of Using Differen PWM Sraegies Inerleaved Carrier-Based PWM Inerleaved Sinusoidal PWM (SPWM) Inerleaved Disconinuous PWM (DPWM1) Mulilevel Space Vecor Modulaion Swiching Saes Space Vecor Equaions for 3-Phase Swiching Saes... 49

8 Volage Vecors Caegories Space Vecor Block Diagram Dwell Time Calculaion Swiching Sequence Design Selecion of Winding Configuraions for Volage Vecors Common Mode Curren Balance Even-Order Volage Harmonic Eliminaion Original SVPWM Implemenaion of Original SVPWM SVPWM wih Opimal Swiching Selecion (Improved SVPWM) Implemenaion of Improved SVPWM Impac of Swiched Pulse Posiions on Winding Curren Inerleaved disconinuous SVPWM SVPWM Inerleaved Swiching Inerleaved Disconinuous SVPWM Swiching Sequence Implemenaion of Inerleaved DSVPWM Impac of Swiched Pulse Posiions on Oupu Curren Chaper Summary Chaper 5 Coupled Inducor Inverer Performance Comparison Using Experimenal and Simulaion Resuls Review of PWM Schemes Examined Experimenal Se-up Simulaions Se-up CII Performance wih Inerleaved SPWM and DPWM Inerleaved SPWM and DPWM1 Simulaion Resuls Inerleaved SPWM and DPWM1 THD Resuls Inerleaved SPWM and DPWM1 Experimenal Resuls CII Performance wih Original SVPWM Original SVPWM Simulaion Resuls Original SVPWM THD Resuls Original SVPWM Experimenal Resuls CII Performance wih Improved SVPWM Improved SVPWM Simulaion Resuls Improved SVPWM THD Resuls Comparison Improved SVPWM Experimenal Resuls CII Performance wih Inerleaved DSVPWM Inerleaved DSVPWM Simulaion Resuls (m a <.5) Inerleaved DSVPWM Simulaion Resuls (m a >.5) Inerleaved DSVPWM Common Mode Volage Inerleaved DSVPWM THD Resuls Inerleaved DSVPWM Experimenal Resuls CII Topology Power Losses Comparison CII Topology Inverer Power Losses Comparison Coupled Inducor Power Losses Comparison Coupled Inducor rms Currens Comparison

9 5.9. CII Topology Performance as a PMSM Drive PMSM Closed Loop Power Conrol Performance PMSM Closed Loop Speed Conrol Performance Chaper Summary... 1 Chaper 6 Conclusions and Recommendaions for Fuure Research Summary Recommendaions for Fuure Research Bibliography Appendix A Permanen Magne Synchronous Machines... 14

10 Liss of Tables Table 3-1 CII fundamenal rms and THD of he phase A curren and V AB volage... 4 Table 3- Swiching saes of he coupled inducor inverer... 5 Table 3-3 Swiching saes for phase A, ogeher wih impac on common mode dc curren (Assuming oher windings are open circui) Table 4-1: Inerleaved DPWM1 swiching sequence Table 4-: Swiching saes of he coupled inducor inverer Table 4-3: Swiching saes corresponding o each space volage vecor Table 4-4: Volage vecors wih he corresponding swiching saes and configuraions... 5 Table 4-5: Ranked swiching saes for each volage level based on he effecive winding inducance Table 4-6: Original SVPWM swiching saes for sequence 1 and Table 4-7: Improved SVPWM swiching saes Table 5-1: Simulaed original SVPWM harmonic conen for sequence Table 5-: Simulaed original SVPWM harmonic conens for sequence Table 5-3: PMSM Specificaions

11 Liss of Figures Figure 1-1: 3-phase 3-level coupled inducor inverer opology... Figure -1: Single-phase 3-level H-bridge inverer Figure -: 5-level cascaded H-Bridge inverer opology... 1 Figure -3: Three-level NPC inverer Figure -4: Three-level flying-capacior inverer Figure -5: Parallel inverers using inerphase ransformers (curren sharing reacors) Figure -6: Three-phase 3-level coupled inducor inverer Figure -7: 3-level converer space vecor block diagram Figure 3-1: Three-phase mulilevel coupled inducor inverer opology... 1 Figure 3-: Simulaed CII opology (a) line-line V AB oupu volage (b) phase A curren (m a =1.15, inerleaved DPWM1, CII coninuous conducion mode)... Figure 3-3: Swiching saes of a CII single leg... 3 Figure 3-4 CII opology (a) line-o-line V AB oupu volage (b) phase A curren (m a =1.15, inerleaved DPWM1, CII disconinuons conducion mode)... 4 Figure 3-5: Transformer equivalen model of he coupled inducor... 5 Figure 3-6: CII upper and lower winding currens (m a =.9, SVPWM)... 6 Figure 3-7: CII common mode curren and phase A curren (m a =.9, SVPWM) 6 Figure 3-8: Equivalen circuis for he single phase inverer leg: (a) ransformer equivalen model, (b) oupu model, (c) circui model beween he swiches... 7 Figure 3-9: Coupled inducor core ypes a) hree-limb core b) hree-single cores Figure 3-1: a) hree-limb relucance circui b) hree-single cores relucance circui Figure 3-11: hree-phase coupled inducor placed on hree-single cores Figure 3-1: hree-phase coupled inducor placed on a hree-limb core... 3 Figure 3-13: Simulaed upper and lower winding currens and oupu curren in phase A (m a =1.15, Inerleaved DPWM1, M xy =-.45L ) Figure 3-14: Simulaed upper and lower winding currens and oupu curren in phase A (m a =1.15, Inerleaved DPWM1, M xy =-.48L )... 34

12 Figure 3-15: 3-phase coupled inducor configuraions for various swiching saes Figure 3-16: Phase A winding (a) common mode curren (b) common mode winding volage (m a =1.15, inerleaved DPWM1, f s =15 khz) Figure 3-17: Phase A winding wih he coupling effecs: (a) common mode curren (b) common mode winding volage (m a =1.15, inerleaved DPWM1, f s =15 khz) Figure 3-18: Phase A winding wihou he coupling effecs: (a) common mode curren (b) common mode winding volage (m a =1.15, inerleaved DPWM1, f s =15 khz) Figure 4-1: Inerleaved SPWM: PWM conrol and gae signals, and phase A PWM volage (m a =.9 and m f =9) [19] Figure 4-: Simulaed SPWM: line-line oupu volage of he CII inverer (m a =.9, f c =15 khz) Figure 4-3: Inerleaved disconinuous PWM: PWM conrol and gae signals, and phase A PWM volage (m a =1.15 and m f =9) [19] Figure 4-4: Simulaed DPWM1: line-line oupu volage of he CII inverer (m a =.9, f c =15 khz) Figure 4-5: Simulaed DPWM1: (a) common mode winding volage (b) common mode curren and winding currens in phase A (m a =.9, f c =3 khz) Figure 4-6: CII space vecor diagram including swiching saes Figure 4-7: SVPWM basic 5-segmen swiching sequence Figure 4-8: Original SVPWM swiching sequence Figure 4-9: Original SVPWM: swiching saes in secor I wih he eliminaion of (a), (b), (f) and (g) inducor configuraions for zero and small volage vecors, sequence Figure 4-1: Original SVPWM: coupled inducor winding volage in each leg based on swiching saes in Figure 4-9, sequence 1, (Common mode volages are ±V DC )... 6

13 Figure 4-11: Original SVPWM: swiching saes in secor I wih he eliminaion of (a), (b), (f), (g), (i) and (j) inducor configuraions for zero and small volage vecors, sequence Figure 4-1: Original SVPWM: coupled inducor winding volage in each leg based on swiching saes in Figure 4-11, sequence, (Common mode volages are ±V DC ) Figure 4-13: Improved SVPWM swiching sequence... 6 Figure 4-14: Improved SVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 1, (Common mode volages are ±V DC ) Figure 4-15: Improved SVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I-, (Common mode volages are ±V DC ) Figure 4-16: Improved SVPWM: coupled inducor upper winding volage and phase volage in each leg based on swiching saes in secor I- 3, (Common mode volages are ±V DC ) Figure 4-17: Improved SVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 4, (Common mode volages are ±V DC ) Figure 4-18: Improved SVPWM: alernae winding and phase volage in secor I- 3, wih poorly chosen swiching sequence, (Common mode volages are eiher ±V dc ) Figure 4-19: Inerleaved swiching scheme I (Acive High) Figure 4-: Inerleaved swiching scheme II (Acive Low) Figure 4-1: Inerleaved SVPWM swiching sequence Figure 4-: CII space vecor diagram using a large volage vecor in... 7 Figure 4-3: CII space vecor diagram in Secor I using V 13 in (a) riangle of verices V 1, V and V 13 (b) riangle of verices V, V 7, V Figure 4-4: CII space vecor diagram using a large volage vecor in Figure 4-5: CII space vecor diagram using combined volage vecors in and

14 Figure 4-6: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 1F, (Common mode volages are eiher ±V dc ) Figure 4-7: DSVPWM: alernaive coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 1E, (Common mode volages are eiher ±V dc ) Figure 4-8: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I-, (Common mode volages are eiher ±V dc ) Figure 4-9: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 3A, (Common mode volages are eiher ±V dc ) Figure 4-3: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 3B, (Common mode volages are eiher ±V dc ) Figure 4-31: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 3C, (Common mode volages are eiher ±V dc ) Figure 4-3: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 3D, (Common mode volages are eiher ±V dc ) Figure 4-33: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 4, (Common mode volages are eiher ±V dc ) Figure 5-1: Experimenal se-up of he CII inverer wih combined hree limb core, inerface boards and a TI DSP conroller... 8 Figure 5-: Simulaion block diagram of he CII opology... 8 Figure 5-3: Simulaed SPWM: upper and lower winding currens and oupu curren in phase A (m a =.9, f c =15kHz) Figure 5-4: Simulaed DPWM1: upper and lower winding currens and oupu curren in phase A (m a =.9, f c =15kHz)... 83

15 Figure 5-5: Simulaed SPWM: upper and lower winding currens and oupu curren in phase A (m a =.4, f c =15kHz) Figure 5-6: Simulaed DPWM1: upper and lower winding currens and oupu curren in phase A (m a =.4, f c =15kHz) Figure 5-7: Simulaed SPWM: harmonic specrum (a) phase A curren (b) upper winding curren (c) lower winding curren in proposed SVPWM (m a =.9) Figure 5-8: Simulaed DPWM1: harmonic specrum (a) phase A curren (b) upper winding curren (c) lower winding curren in proposed SVPWM (m a =.9) Figure 5-9: Simulaed SPWM: line-line volage harmonic specrum (m a =.9) Figure 5-1: Simulaed DPWM1: line -line volage harmonic specrum (m a =.9) Figure 5-11: Experimenal SPWM: winding currens and phase A curren (m a =.9, f c = 15 khz) Figure 5-1: Experimenal DPWM1: winding currens and phase A curren (m a =.9, f c = 15 khz) Figure 5-13: Experimenal SPWM: winding curren and phase A curren (m a =.4, f c = 15 khz) Figure 5-14: Experimenal DPWM1: winding curren and phase A curren (m a =.4, f c = 15 khz) Figure 5-15: Simulaed original SVPWM: winding currens, and oupu curren in phase A, sequence 1, (m a =.9, f c =15 khz) Figure 5-16: Simulaed original SVPWM: winding currens, and oupu curren in phase A, sequence, (m a =.9, f c =15 khz) Figure 5-17: Simulaed original SVPWM: winding currens and oupu curren in phase A, sequence 1, (m a =.8, f c =15 khz) Figure 5-18: Simulaed original SVPWM: winding currens and oupu curren in phase A, sequence, (m a =.8, f c =15 khz) Figure 5-19: Simulaed original SVPWM: winding currens and oupu curren in phase A, sequence 1, (m a =.4, f c =15 khz) Figure 5-: Simulaed original SVPWM: winding currens and oupu curren in phase A, sequence, (m a =.4, f c =15 khz)... 89

16 Figure 5-1: Simulaed original SVPWM : common mode volage, sequence Figure 5-: Simulaed original SVPWM : common mode volage, sequence. 89 Figure 5-3: Simulaed original SVPWM: harmonic specra for (a) phase A oupu curren (b) upper winding curren, sequence 1, (m a =.9, f c =15 khz)... 9 Figure 5-4: Simulaed original SVPWM: harmonic specra for (a) phase A oupu curren (b) upper winding curren, sequence, (m a =.9, f c =15 khz)... 9 Figure 5-5: Simulaed original SVPWM phase A curren THD Figure 5-6: Simulaed original SVPWM line-line volage THD Figure 5-7: Simulaed original SVPWM, DPWM1 and SPWM line-line volage THD... 9 Figure 5-8: Simulaed original SVPWM, DPWM1 and SPWM phase A curren THD... 9 Figure 5-9: Experimenal original SVPWM: line-o-line volage (V ab ) for sequence wih (a) m a =1. (b) m a =.75 (c) m a =.5 (d) m a = Figure 5-3: Experimenal original SVPWM: phase A curren for sequence wih (a) m a =1. (b) m a =.75 (c) m a =.5 (d) m a = Figure 5-31: Experimenal original SVPWM : winding currens and phase A curren, sequence 1 (m a =.9, f c = 15 khz) Figure 5-3: Experimenal original SVPWM : winding currens and phase A curren, sequence, (m a =.9, f c = 15 khz) Figure 5-33: Experimenal original SVPWM: winding currens and phase A curren, sequence, (m a =.4, fc= 15 khz) Figure 5-34: Experimenal common mode dc curren wih (a) SVPWM (b) DPWM1 (c) SPWM plus hird harmonic (m a =.9, fc= 15 khz) Figure 5-35: Simulaed improved SVPWM: winding currens and oupu curren in phase A (m a =.9, f c =15 khz) Figure 5-36: Simulaed improved SVPWM: winding currens and oupu curren in phase A (m a =.4, f c =15 khz) Figure 5-37: Improved SVPWM: Harmonic specrum (a) phase A curren (b) upper winding curren (c) lower winding curren (m a =.9)... 96

17 Figure 5-38: Original SVPWM : Harmonic specrum (a) phase A curren (b) upper winding curren (c) lower winding curren (m a =.9) Figure 5-39: improved SVPWM: line-line volage harmonic specrum (m a =.9)96 Figure 5-4: Original SVPWM: line-line volage harmonic specrum (m a =.9). 96 Figure 5-41: SVPWM, DPWM1 and SPWM line o line volage THD Figure 5-4: SVPWM, DPWM1 and SPWM phase A curren THD Figure 5-43: SVPWM, DPWM1 and SPWM phase A lower winding curren THD Figure 5-44: SVPWM, DPWM1 and SPWM phase A upper winding curren THD Figure 5-45: Experimenal improved SVPWM: line-line volage (Vab) wih (a) m a =1. (b) m a =.8 (c) m a =. 5 (d) m a = Figure 5-46: Experimenal improved SVPWM: phase A curren wih (a) m a =1. (b) m a =.8 c) m a =.5 (d) m a = Figure 5-47: Experimenal improved SVPWM: winding currens and phase A curren (m a =.9, F c = 15 khz) Figure 5-48: Experimenal improved SVPWM: winding currens and phase A curren (m a =.4, f c = 15 khz) Figure 5-49: DSVPWM CII filered erminal volage (V Ao ) and load fundamenal phase volage (V An1 ) (m a =.4) Figure 5-5: DSVPWM1 CII filered erminal volage (V Ao ) and load fundamenal phase volage (V An1 ) (m a =.4) Figure 5-51: DSVPWM3 CII filered erminal volage (V Ao ) and load fundamenal phase volage (V An1 ) (m a =.4) Figure 5-5: Simulaed DSVPWM: winding currens and phase A curren (m a =.4, f c = 15 khz)... 1 Figure 5-53: Simulaed DSVPWM1: winding currens and phase A curren (m a =.4, fc= 15 khz)... 1 Figure 5-54: Simulaed DSVPWM3: winding currens and phase A curren (m a =.4, f c = 15 khz)... 1

18 Figure 5-55: Simulaed DSVPWM: phase A winding curren THD for DSVPWM, DSVPWM1 and DSVPWM Figure 5-56: Simulaed DSVPWM line-line oupu volage V ab using a large vecor in Δ (m a =.8) Figure 5-57: Simulaed DSVPWM line-line oupu volage V ab using a large vecor in Δ 4 (m a =.8) Figure 5-58: Simulaed DSVPWM line-line oupu volage V ab using combinaion of large vecors in Δ and Δ 4 (m a =.8) Figure 5-59: Simulaed CII filered erminal volage (V Ao ) and load fundamenal phase volage (V An1 ) using combinaion of large vecors in Δ and Δ 4 (ma =.8) Figure 5-6: Simulaed CII filered erminal volage (V Ao ) and load fundamenal phase volage (V An1 ) using a large vecor in Δ (m a =.8) Figure 5-61: Simulaed CII filered erminal volage (V Ao ) and load fundamenal phase volage (V An1 ) using a large vecor in Δ 4 (m a =.8) Figure 5-6: Simulaed DSVPWM: winding currens and oupu curren in phase A using combinaion of large vecors in Δ and Δ 4 (m a =.9) Figure 5-63: Simulaed DSVPWM: winding currens and oupu curren in phase A using a large vecor in Δ (m a =.9) Figure 5-64: Simulaed DSVPWM: winding currens and oupu curren in phase A using a large vecor in Δ 4 (m a =.9) Figure 5-65: Simulaed DSVPWM: winding currens and oupu curren in phase A using combinaion of large vecors in Δ and Δ 4 (ma =.8) Figure 5-66 : Simulaed DSVPWM: winding currens and oupu curren in phase A using a large vecor in Δ (m a =.8) Figure 5-67: Simulaed DSVPWM: winding currens and oupu curren in phase A using a large vecor in Δ 4 (m a =.8) Figure 5-68: Simulaed DSVPWM: harmonic specrum: (a) phase A curren (b) upper winding curren(c) lower winding curren using combinaion of large vecors in Δ and Δ 4 (m a =.9)... 17

19 Figure 5-69: Simulaed DSVPWM: harmonic specrum (a) phase A curren (b) upper winding (c) lower winding curren using a large vecor in Δ (m a =.9).. 17 Figure 5-7 Simulaed DSVPWM: harmonic specrum (a) phase A curren (b) upper winding (c) lower winding curren using a large vecor in Δ 4 (m a =.9).. 17 Figure 5-71: Simulaed DSVPWM: harmonic specrum: V ab line-line volage using combinaion of large vecors in Δ and Δ 4 (m a =.9) Figure 5-7: Simulaed DSVPWM: harmonic specrum V ab line-line volage using a large vecor in Δ (m a =.9) Figure 5-73: Simulaed DSVPWM: harmonic specrum V ab line-line volage using a large vecor in Δ 4 (ma =.9) Figure 5-74: Simulaed DSVPWM: common mode volage (m a =.9) Figure 5-75: Simulaed DSVPWM: common mode volage (m a =.4) Figure 5-76: Simulaed DSVPWM, DPWM1 and SPWM line o line volage THD Figure 5-77: Simulaed DSVPWM, DPWM1 and SPWM phase A curren THD Figure 5-78: Simulaed DSVPWM, improved SVPWM, DPWM1 and SPWM phase A upper winding curren THD Figure 5-79: Experimenal DSVPWM: line-line volage (V ab ) wih (a) m a =1. (b) m a =.8 (c) m a =. 5 (d) m a = Figure 5-8: Experimenal DSVPWM phase A curren wih (a) m a =1. (b) m a =.8 c) m a =. 5 (d) m a = Figure 5-81: Experimenal DSVPWM1: winding currens and phase A curren (m a =.9, f c = 15 khz) Figure 5-8: Experimenal DSVPWM3: winding currens and phase A curren (m a =.4, f c = 15 khz) Figure 5-83: Experimenal DSVPWM1: winding currens and phase A curren (m a =.8, f c = 15 khz) Figure 5-84: Experimenal DPWM1: winding curren and phase A curren (m a =.8, f c = 15 khz)... 11

20 Figure 5-85: Experimenal DSVPWM: harmonic specrum: (a) V ab line-line volage (b) phase A curren (m a =.9, f c = 15 khz) Figure 5-86: Experimenal DSVPWM: harmonic specrum: (a) V ab line-line volage (b) phase A curren (ma =.4, f c = 15 khz) Figure 5-87: Experimenal CII oal losses: SPWM, DPWM1 and DSVPWM schemes wih 4mil and 14.5mil laminaions cores (R = 15.66Ω) Figure 5-88: Experimenal CII oal losses for various load currens wih SPWM and DPWM1 and DSVPWM (4 mil laminaions and m a = 1.) Figure 5-89: Experimenal coupled inducor losses: SPWM, DPWM1 and DSVPWM wih 4mil and 14.5mil laminaions cores (R = 15.66Ω) Figure 5-9: Experimenal coupled inducor losses for various load currens wih SPWM and DPWM1 and DSVPWM (4 mil laminaions and m a = 1.) Figure 5-91: Experimenal percenage increase in coupled inducor power losses wih SPWM and DPWM1 schemes compared wih DSVPWM scheme a differen load currens ( m a = 1., 4 mil laminaions core) Figure 5-9: Experimenal winding curren for differen load currens wih SPWM, DPWM1 and DSVPWM schemes (m a = 1., 4mil laminaions) Figure 5-93: Experimenal winding curren as funcion of m a wih SPWM, DPWM1 and DSVPWM schemes (R = 15.66Ω, 4mil laminaions) Figure 5-94: Experimenal PMSM phase A curren wih PMSM closed loop power conrol Figure 5-95: Experimenal coupled inducor upper winding curren wih PMSM closed loop power conrol Figure 5-96: Experimenal PMSM line-line volage wih PMSM closed loop power conrol Figure 5-97: Experimenal PMSM quadraure curren (iq) wih PMSM closed loop power conrol Figure 5-98: Experimenal PMSM speed wih PMSM closed loop power conrol Figure 5-99: Experimenal PMSM phase A curren wih PMSM closed loop speed conrol... 1

21 Figure 5-1: Experimenal Coupled inducor upper winding curren wih PMSM closed loop speed conrol... 1 Figure 5-11: Experimenal Phase A Common mode winding curren wih PMSM closed loop speed conrol... 1 Figure 5-1: Experimenal PMSM line o line Volage wih PMSM closed loop speed conrol Figure 5-13: Experimenal PMSM Speed wih PMSM closed loop speed conrol Figure 5-14: Experimenal PMSM: upper winding, common mode dc and phase A currens wih PMSM closed loop speed conrol a 15 rpm (m a =.45, f c = 15 khz) Figure 5-15: Experimenal PMSM: PWM line o line Volage wih PMSM closed loop speed conrol a 15 rpm (m a =.45, f c = 15 khz) Figure 5-16: Experimenal DSVPWM phase A curren harmonic specrum wih PMSM a 15 rpm (m a =.45, f c = 15 khz)... 1 Figure 5-17: Experimenal DSVPWM phase A upper winding harmonic specrum wih PMSM a 15 rpm (m a =.45, f c = 15 khz)... 1 Figure 5-18: Experimenal DSVPWM Vab line-line volage harmonic specrum wih PMSM a 15 rpm (m a =.45, f c = 15 khz)... 1 Figure 6-1: PMSM Conrol Block Diagram

22 LIST OF SYMBOLS AND ABBREVIATIONS APOD-PWM CII CHB DPWM d x, d y, d z EMC EMI FOC FC ia IaU ial icm IPD-PWM L l LS-PWM L m m a mmf NPC PMSM POD-PWM PS-PWM PI PWM L rms SHE SPWM SVPWM T s f c THD THDi THDv VaCM Vref VSI V x, V y, Vz 1,, 3, 4 Alernae phase opposiion disposiion Coupled inducor inverer Cascade H-bridge Disconinuous pulse widh modulaion Dwell ime Elecro-magneic compaibiliy Elecromagneic inerference Field oriened conrol Flying capacior Phase A curren Phase A upper winding curren Pahse A lower winding curren Common mode dc curren In-phase disposiion Leakage inducance Level-shifed pulse widh modulaion Magneizing inducance Modulaion ampliude Magneic moive force Neural poin clamped Permanen magne synchronous machine Phase opposiion disposiion pulse widh modulaion Phase shifed pulse widh modulaion Proporional and inegral Pulse widh modulaion Resulan magneizing inducance Roo mean square Selecive harmonic eliminaion Sinusoidal pulse widh modulaion Space vecor pulse widh modulaion PWM Swiching cycle Swiching frequency Toal harmonic disorion Curren oal harmonic disorion Volage oal harmonic disorion Phase A common mode volage Reference volage vecor Volage source inverer volage vecors of a given riangle wih verex V x, V y and V z Triangles in each 6º of a space vecor block diagram

23 Chaper 1 Inroducion A number of opologies are available for he inverer sage of variable frequency drives. Commonly, a 6-swich -level inverer is used for low-medium power applicaions, and 1-swich mulilevel Neural-Poin Clamped (NPC) inverer opologies are used a higher power levels [1]. The oupu volage and curren harmonics of hese inverers can cause addiional power losses in he loads, deraing hem and lowering heir oupu capaciies. If needed, he oupu of hese inverers can be passed hrough an inducive filer o improve he curren Toal Harmonic Disorion (THD). However, he use of AC inducor filers can be limied by facors including he maximum swiching frequency, flux densiies in he magneic cores, power losses, efficiency, and fundamenal volage drops []. These effecs can be significanly magnified when AC inducor filers are used in high-speed applicaions such as flywheel energy sorage sysems where he fundamenal frequency range changes by a few hundred Herz [3, 4]. Pulse Widh Modulaion (PWM) converers also inroduce some design limiaions on he load, such as dv/d sresses, common mode volages and cable ineracions beween he power converer and he load, which are more pronounced in high-power applicaions [5]. Many sudies have been conduced o improve he oupu qualiy of inverers by increasing he effecive oupu swiching frequency and he number of PWM oupu volage levels [6, 7]. If he applicaion and power level jusifies he choice of mulilevel opologies, hese improvemens can be achieved by increasing he number of swiches (i.e., mulilevel converers) or he number of power converer modules (i.e., muliple converer modules). The use of mulilevel inverers and parallel inverer oupu sages coupled hrough inerphase ransformers also improves he oupu THD [8-11]. Unforunaely he parallel connecion of inverers can presen curren-balancing issues since he various inducors and power converers canno always have idenical elecrical characerisics; hence, he harmonic curren cancellaion may no be opimal. Also, he rade-off for such increased performance in mulilevel inverers is a large increase in circui componens, conrol complexiy and cos, which limis he use of hese inverers o high-power applicaions. Thus, many low-medium power applicaions which could 1

24 benefi from he performance gains of muli-level converers are unaainable because of he cos. The PWM conrol of sandard converers uses dead-imes in he PWM signal generaion o avoid he DC supply volage shor-circuis when boh he upper and lower swiches are conducing wihin he same inverer leg. These dead-imes are imporan because hey provide a safey margin beween he on-saes of he upper and lower swiches in an inverer leg. If no compensaed for, he dead-imes can reduce he fundamenal oupu volage and also produce sub-harmonics in he oupu volage, lowering he oupu qualiy [1-17]. In addiion, he inverer swiching frequency can be limied due o he dead-imes for high-performance applicaion such as ha in audio amplifiers [18]. Figure 1-1: 3-phase 3-level coupled inducor inverer opology One recen proposed alernaive mulilevel opology applied in low power applicaions is o use coupled inducors in he oupu sage of a 6-swich inverer, as shown in Figure 1-1 [, 19]. Using appropriae PWM swiching of he upper and he lower swiches in each inverer leg, he Coupled Inducor Inverer (CII) opology produces a mulilevel oupu from a single DC volage level. When compared wih comparable alernaives, he CII opology uses half he number of swiches o generae he same number of volage levels. In conras o AC inducor filers, he fundamenal inducor volage drops are removed since he upper and lower coupled inducor windings are placed in one limb of he inducor core, cancelling he fundamenal frequency flux produced by each oher []. In addiion, a significan advanage of he CII opology is ha he requiremen for he dead-imes o avoid he shoo-hrough curren is eliminaed. Thus, he radiional adverse effecs of he dead-imes are avoided. By lowering swiching losses, he inerleaved disconinuous PWM sraegy is demonsraed in [, 19] o be an effecive PWM sraegy for he CII opology, allowing

25 for higher swiching frequency wihou degrading he oupu qualiy due o disconinuous PWM. The use of he inerleaved PWM echnique [1] also increases he effecive oupu swiching frequency, reducing he high frequency harmonics in he oupu PWM volage and curren. The improved PWM volages can also lower he high-frequency losses in AC inducors and machine loads, wih a poenial improvemen of he load efficiency and power densiy [19]. Wih hese feaures, he CII opology is more suied han alernaive opologies for loss-sensiive and high-frequency fundamenal applicaions where higher frequency PWM oupus are essenial Research Objecives The various benefis of he CII opology can assure he fuure use of his srucure in many high-performance applicaions. The CII circui has been demonsraed o have superior oupu feaures, bu he performance of he inverer ogeher wih he impac of he addiional coupled inducors has no been fully invesigaed. The curren ripple associaed wih he coupled inducors is one of he key parameers in deermining he inverer performance. This sudy will demonsrae ha he curren ripple is linked o he coupled inducor losses. Thus, o achieve improvemen in he efficiency and performance of he CII opology as main objecives of his hesis, he curren ripple should be carefully considered, and he impacs of differen facors on minimizing ripple should be examined. The objecives of his disseraion can be caegorized as follows: Invesigae he facors which conribue o he winding curren and oupu curren ripples in he CII opology. Develop a suiable PWM swiching scheme which minimizes he high frequency curren ripple and allows for operaion over a wide range of modulaion ampliudes (m a ). Improve he CII inverer performance by a. Minimizing he inducor losses associaed o high frequency curren ripple. b. Alleviaing he EMI noises by mainaining he high frequency flux inside he coupled inducor core raher he ouside of he inducor core. This hesis explores he relaionship beween he curren ripple and various CII circui and conrol parameers. The maximum high-frequency winding and oupu curren ripples can be obained from he inducance requiremen of he coupled inducors. However, 3

26 when he coupled inducor is placed on a hree-limb core, he coupled inducor curren ripple in one inverer leg can be affeced by boh he coupled inducor windings in he same inverer leg and in he oher inverer legs due o he magneic coupling beween he windings in a hree-limb core. Since he coupled inducor winding configuraion a each swiching sae can be changed wih he condiion of being on and off for each inverer swich, he curren ripple will be dependen on he value of he effecive inducance beween he upper and lower swiches in each inverer leg. In fac, he effecive inducances mainly conribue o he expeced curren ramping rae for he winding curren. The inducance effecive size deermines he maximum high frequency curren peak-peak ripple. In addiion, a very simple approach is used, which considers he relaionship beween he ime-varying volage across he inducor wih he effecive inducance L effecive and he ime-varying curren passing hrough; he duraion of applying he PWM swiching volage across each inducor winding in each swiching sae can also impac on he curren ripple. Thus, as shown in his hesis, he curren ripple varies wih he effecive inducance in each swiching sae and he duraion of he PWM volage across he inducor in each swiching sae. Since hese wo parameers are characerisics of every PWM modulaion scheme, he curren ripple will be significanly dependen on he PWM swiching echnique and he PWM swiching frequency. From he fundamenal operaion of his opology in [, 19], he common-mode ripple componens in he winding curren are given by he high-frequency swiching over he coupled inducor winding; he high-frequency common mode AC ripple is he only componen of he winding curren, which produces (AC ripple) flux in he coupled inducor core. Since he ripple magniude of he winding curren is essenially linked o he AC ripple flux, he PWM modulaion scheme wih he abiliy o minimize he AC curren ripple in he windings, lowers he coupled inducor core losses []. As a resul, he overall performance of he inverer can be improved by reducing he coupled inducor losses. Consequenly, he selecion of an opimal modulaion sraegy is essenial o ensure he high-performance operaion of he muli-level coupled inducor inverer opology. The successful operaion of he CII opology over he full modulaion range relies on selecion of swiching saes and sequences where he coupled inducor presens a low winding curren ripple. In addiion o hese requiremens, when using any modulaion scheme, 4

27 care mus be aken o balance he common mode winding volage (curren) over he swiching period for he coninuous conducion operaion of he coupled inducor. If disconinuous conducion were o occur, he cenre-ap volage would be undefined, resuling in high harmonic volage disorion [18, 3]. PWM sraegies used for sandard inverers can be modified for use wih his opology. The presence of he coupled inducors in his inverer allows inerleaved PWM swiching of he upper and lower swiches in each inverer leg o be an effecive swiching scheme for his opology. Inerleaved sinusoidal PWM (SPWM) [1, 4] and disconinuous PWM (DPWM1) [4] echniques adoped from -level sandard inverers can be used o lower he size of he oupu AC filer and reduce he magniude of high-frequency oupu curren harmonics by increasing he effecive swiching-frequency of he oupu PWM waveforms above he acual swiching frequency [, 19, 5]. DPWM1 compared o SPWM generaes muli-level oupu volages wih lower harmonic conen. However, as shown in his hesis, even wih high-qualiy oupu signals, he overall performance of he CII can be poor due o coupled inducor losses, and his problem is especially noiceable a low modulaion dephs. These modulaion schemes have no freedom o selec he more desirable swiching saes presen in each swiching cycle. Therefore, swiching saes wih a low-effecive winding inducance are seleced, resuling in significan highfrequency curren ripple in he inducor windings. This ripple generaes high winding and core losses, wih a high-frequency leakage flux produced ouside he magneic core. In his hesis, a mulilevel Space Vecor PWM (SVPWM) sraegy is developed and applied o he CII opology. The SVPWM sraegy is based on hose schemes developed for oher mulilevel inverers [5, 4, 6-36]. The mulilevel SVPWM echnique for he CII opology can offer superior performance over previous modulaion schemes by addressing issues relaed o common mode dc curren balance and ripple minimizaion. The prime benefis of SVPWM are precise idenificaion of he pulse placemen and choice beween redundan swiching saes for each volage vecor. When used efficienly, SVPWM can allow for an appropriae balance beween he need o produce a muli-level oupu and he proper managemen of he inducor winding currens and effecive inducance. In addiion, a careful analysis of he space vecor will reveal ha he winding curren ripple depends on no only he selecion of swiching saes wih a higheffecive inducance, bu also heir sequences. As shown in his hesis, he order of he volage vecors in each sequence during a swiching cycle can be arranged o minimize 5

28 he winding curren ripple and oupu curren ripple as well. If he swiching saes wih he same curren-ramp direcion link ogeher, hey can increase he expeced curren ramp by adding he duraion of he same PWM volage across he inducor winding. In his hesis, a number of SVPWM sraegies for he CII opology are developed. The effecs of he PWM schemes on he oupu curren ripple are invesigaed, and he resuls demonsrae ha, like he winding curren ripple, he oupu curren waveform is also dependen on he swiching sequence, he effecive oupu frequency and he coupled inducor leakage inducance. Using he analysis in his hesis, an inerleaved disconinuous SVPWM (DSVPWM) mehod is developed. The DSVPWM scheme can minimize he winding curren ripple while providing high-qualiy oupus for a large operaing range. Using he inerleaved PWM swiching echnique in he CII opology, he effecive oupu swiching frequency can be doubled in he DSVPWM scheme. The inerleaved DSVPWM sraegies are caegorized as DSVPWM, DSVPWM1, DSVPWM and DSVPWM3. (The difference among hese schemes is he posiion of he disconinuous period wihin each fundamenal volage cycle.) This hesis demonsraes ha he winding curren ripple is also dependen on he posiion of he disconinuous period in he fundamenal volage relaive o he phase angle a which he magniude of he fundamenal curren is maximum. In general, he fundamenal oupu volage produced by carrier-based PWM echniques can be idenical o ha produced by SVPWM. However, he opimal sequence of pulses wihin he sampling inerval (or he reamen of he zero space vecors) leads o he superior harmonic performance of he space-vecor modulaion echnique. This hesis invesigaes wheher his performance improvemen is limied o he oupu waveforms or if i can be effecively exended o include he opimal operaion of he couple inducor inverers. A comparison beween he wo-modulaion approaches, he inerleaved carrier-based PWM and inerleaved DSVPWM, indicaes ha he mehods produce differen CII performance. The inerleaved DSVPWM sraegy presened in his hesis for he coupled inducor inverers can reduce he inducor losses and significanly improve he performance of he inverer drive by lowering he oal inverer loss. The effeciveness of he proposed approaches and he comparison of differen PWM algorihms is verified by using simulaion resuls and validaed by experimenal ess. Finally, he performance of he CII opology as a machine drive is invesigaed hrough 6

29 laboraory experimens wih a Permanen Magne Synchronous Machine (PMSM). The ransien response of he drive wih he closed-loop speed and power conrol for he proposed CII drive srucure are imporan for mos indusrial applicaions. The resuls will demonsrae he successful operaion of he CII opology as a variable frequency drive while providing high-qualiy oupus, which can increase he operaing efficiency of he PMSM machine. 1.. Thesis Ouline This hesis presens a new mulilevel space-vecor pulse widh modulaion (SVPWM) echnique for coupled inducor inverers. The SVPWM echnique is used o improve he performance of he coupled inducor inverers by lowering he inducor losses. This disseraion consiss of 6 chapers. Chaper describes he advanage of mulilevel converers over convenional wo-level converers and briefly reviews he aracive feaures and drawbacks of mulilevel converers. The mos popular mulilevel converer opologies are reviewed. The PWM swiching sraegies such as carrier-based PWM, selecive harmonic eliminaion and SVPWM for mulilevel converers are explained and summarized. Finally, he use of mulilevel converers in differen applicaions is explored. Chaper 3 describes he fundamenal operaion of he mulilevel volage source inverer using spli-wound coupled inducors. Coninuous and disconinuous conducion operaion modes of he CII opology are explained, and he performance of he CII inverer is compared for hese wo condiions. The relaionship beween he winding currens, he oupu currens, and common mode dc curren is idenified. The coupled inducor is modeled wih he magneizing and leakage inducances by using a simplified equivalen ransformer model. By using his model, he maximum ripple equaions for he inducor winding (common mode) curren and oupu curren are given. Swiching saes are analyzed based on he configuraion of he coupled inducor in a single inverer leg. The impacs of hese swiching saes ogeher wih oher facors such as swiching urn -on and -off are explained. Finally, he inverer (swiching) device raing is deermined. Chaper 4 describes he principles of wo commonly used PWM echniques (he iniial inerleaved carrier-based PWM and newly developed mulilevel space vecor PWM modulaion schemes) for he CII opology. The basic operaion of he CII opology wih hese schemes and heir evoluions, advanages and limiaions are invesigaed. The 7

30 iniial inerleaved carrier-based PWM sraegies, sinusoidal PWM and disconinuous PWM (DPWM1), are explained. The mulilevel space vecor PWM algorihm for his opology is developed and invesigaed by exracing all possible CII swiching saes wih he examinaion of various 3-phase coupled inducor winding configuraions. By using he SVPWM echnique, he mulilevel space vecor block diagram is derived, and he dwell ime calculaion is described. The impacs of he volage vecors corresponding o each winding configuraion on he common mode curren are sudied for inducance requiremens. The basic seps in designing a swiching sequence are developed; he various parameers considered in he design sage o minimize he curren ripple, selec he high-effecive inducance swiching saes and balance he common mode winding curren (volage) are explained. Wih he flexibiliy of selecing he swiching saes and sequences in he SVPWM echnique, a number of SVPWM sraegies are developed. The developmen sage of each sraegy and he performance improvemen obained is explained, and he characerisic of he sraegies are derived. In Chaper 5, he performances of he CII opology wih SPWM, DPWM1 and SVPWM modulaion sraegies are compared by means of simulaion and experimenally verified wih a RL load. This comparison examines he performance of he coupled inducor inverer by iself and also he inverer s oupu qualiy, which is invesigaed by using a volage and curren THD specra comparison over he full modulaion range. The winding curren waveforms and THD specra are used o evaluae he inverer performance. The resuls confirm he effecive operaion of he opology wih differen modulaion mehods. To verify he superioriy of he proposed SVPWM echnique, he inerleaved DSVPWM mehod is compared wih inerleaved carrier-based mehods hrough a series of experimenal loss measuremens, which are performed wih differen load condiions, various modulaion indices and wo differen core laminaions for he coupled inducors. Finally, experimenal ess including he closed loop speed and power conrol experimens wih a PMSM are carried ou o show he performance of he CII opology as a machine drive. The resuls will verify he poenial of his opology for use in moor drive applicaions. Chaper 7 summarizes he resuls presened in he previous chapers, concludes he work carried ou, and indicaes he accomplishmens of his hesis. Finally, his chaper provides recommendaions for fuure research. 8

31 Chaper Mulilevel Power Converers Numerous mulilevel converer opologies have been inroduced during he las few years [37-41]. Among he power converers for high-power applicaions, he mos common opologies are he Cascaded H-Bridge (CHB) converer wih separae dc sources, he Neural-Poin Clamped (NPC) converer (or neural-clamped converer), and he Flying Capacior (FC) converer (or capacior clamped converer). Recenly, many researchers have developed new opologies and unique modulaion schemes. A newly developed opology explored in his hesis is he coupled inducor inverer (CII), which is used for relaively low power 3-phase applicaions. Several surveys of mulilevel converers have been published o inroduce hese opologies [1, 4-44]. This chaper describes he aracive feaures of mulilevel power converers in general. Mulilevel opologies are reviewed and he fundamenal operaion of hese srucures is also presened. The advanages and disadvanages of each opology such as is operaional and echnological issues are discussed. A survey of he PWM modulaion echniques developed for hese converers is briefly reviewed. Finally, a few applicaions of mulilevel converers are explained..1. Mulilevel Power Converer Feaures Recenly, mulilevel power converers have received a grea deal of aenion in numerous high-power medium-volage indusrial applicaions [1, 5, 4, 43, 45, 46]. A mulilevel converer uses a series of power semiconducor swiches o perform he power conversion by synhesizing he AC oupu erminal volage from several DC volage levels, and, as a resul, saircase waveforms can be generaed. Compared o sandard wolevel converers, mulilevel converers offer grea advanages such as lower harmonic disorion, lower volage sress on loads, lower common-mode volage, and less elecromagneic inerference. By reducing filering requiremens, hey no only improve he efficiency of converers, bu also increase he load power and, hence, he load efficiency by improving he load volage wih a lower harmonic conen. Mulilevel converers are basically developed o increase a nominal power in he 9

32 converer. The higher number of volage levels in hese opologies resuls in higher qualiy oupu volages. The concep of mulilevel converers was inroduced in 1975 [47], and he erm mulilevel firs mean hree-level [48] bu now refers o converers wih more han a wo-level oupu volage. Mulilevel opologies have been developed by increasing he number of semiconducor swiches or he number of power converer modules (i.e., muliple converer modules). The rend oward a greaer number of volage levels is necessary due o he benefis of higher volage raings wih a very low oal harmonic disorion. By increasing he number of volage levels, he converer s fundamenal oupu volage can be produced wih a lower harmonic conen, and will significanly improve he qualiy of he oupu volage and evenually approach a desired sinusoidal waveform. The convenional wo-level converer can produce high-qualiy oupus for low-power applicaions by using a high swiching frequency. However, for medium- and highpower applicaions, he maximum swiching frequency is limied by he swiching devices due o he high swiching losses. In his case, mulilevel converers can be used o lower he swiching frequency, and a high qualiy oupu waveform can be produced. The superior feaures of mulilevel converers over wo-level converers can be briefly summarized as follows [5, 44, 49]. They can generae oupu volages wih very low THD. Mulilevel oupu PWM volage can reduce he inverer swiches blocking volage and he dv/d sress on he load such as a moor. The lower volage sress on a load can reduce he number of Elecro-Magneic Compaibiliy (EMC) problems. They can produce a lower common-mode volage. Thus, he lifeime of a moor conneced o a mulilevel moor drive can be increased due o he reduced sress on he bearings of he moor. By generaing a saircase volage waveform, hey can produce lower converer inpu curren disorion. The lower curren ripple can reduce he size of a capacior filer in a DC link. They are capable of operaing a boh a fundamenal swiching frequency and a high swiching frequency PWM. In high-power applicaions, a lower swiching frequency can reduce he swiching loss, resuling in an efficiency increase. However, he rade-off for such increased performance in mulilevel converers is ha hey require a greaer number of power swiching devices. The number of semiconducor 1

33 swiches ogeher wih heir relaed gae drive circuis can increase he overall sysem cos and he conrol complexiy. Therefore, hey can be used only where he applicaion and power level jusify he choice of mulilevel opologies. They have been seleced as a preferred power converer opology for high-volage and high-power applicaions... Mulilevel Power Converer Srucures The mulilevel converers have differen characerisics such as he number of componens, he modulariy, and he conrol complexiy. Each converer opology can be chosen for a specific applicaion. This secion describes he major mulilevel srucures and focuses on hree-level power converers...1. Cascaded H-Bridges The cascaded H-bridge inverer is composed of muliple unis of single-phase H-bridge power cells as shown in Figure -1. For example, he 5-level CHB opology demonsraed in Figure - is obained by cascading wo CHB power cells in each phase. This ype of converer opology has been used in high-power medium-volage drives [5-55]. To achieve mulilevel high-volage oupu wih a low THD, he AC oupus of each H-bridge inverer can be conneced in series. The operaing volage level of each applicaion and he manufacuring cos of each uni for he seleced volage level deermine he number of power cells in a CHB inverer. Figure -1: Single-phase 3-level H-bridge inverer Each power cell in a CHB inverer requires an isolaed dc supply which can be obained from mulipulse diode recifiers [5]. Each power cell can be powered by a dc supply of equal volage or unequal volage. The use of idenical power cells leads o a modular srucure, which is cos-effecive and has less conrol complexiy han ha of oher srucures. The modular opology provides more redundan swiching saes. This 11

34 feaure allows for grea flexibiliy in he PWM swiching design, especially for space vecor modulaion schemes. However, wih unequal dc volages, more volage seps can be obained in he inverer oupu volage waveform for a given number of power cells [56, 57]. Wih his configuraion, he CHB inverer using unequal dc volages is no longer modular. In addiion, he PWM conrol complexiy increases due o he reducion in he redundan swiching saes. Therefore, his ype of inverer opology has limied indusrial applicaion. Figure -: 5-level cascaded H-Bridge inverer opology In Figure -1, a single-phase H-bridge inverer includes wo inverer legs wih wo swiching devices in each leg. Each H-bridge inverer level can produce hree differen volage oupus, +V dc,, and V dc,by connecing he dc source o he AC oupu by differen combinaions of he four swiches, S 1, S, S 3, and S 4. When swiches S 1 and S 4 are urned on, he oupu volage is +V dc, and when swiches S and S are urned on, V 3 dc can be obained. By urning on S 1 and S 3 or S and S 4, he oupu volage is. Eiher bipolar or unipolar modulaion schemes can be used for a CHB opology. However, he unipolar modulaion sraegy increases he effecive swiching frequency o double he acual swiching frequency [5]. The number of PWM volage levels in a CHB opology can be obained by N = (C + 1), ( -1) where C is he number of H-bridge cells per phase leg. The volage level N is always an odd number for he CHB inverer, bu can be eiher an even or odd number for oher 1

35 mulilevel opologies such as diode-clamped inverers. The CHB inverer can be exended o any number of volage levels, bu he number of swiches increases significanly. The oal number of acive swiches used in he CHB inverers can be esimaed by M = 6(N -1). ( -) For example, a 7-level CHB inverer requires 36 swiches wih he same number of gae drivers. Mulilevel cascaded inverers have been used for several applicaions. Since phoovolaics or fuel cells applicaions provide separae dc sources, cascaded inverers are ideal for connecing renewable energy sources wih an AC grid. Anoher applicaion is in he main racion drive in elecric vehicles where several baeries or ulracapaciors are well-suied o serve as separae dc sources [5, 51, 58]. The main benefis of he CHB mulilevel inverer are is modular srucure and highvolage operaion wihou swiching devices in series, for hese feaures eliminae he problem of equal volage sharing for series-conneced devices. The drawbacks of CHB inverers are is requiremens for a large number of isolaed dc supplies and a swiching device coun.... Diode-Clamped Mulilevel Inverer In 1981, he firs diode-clamped converer, also called a Neural-Poin Clamped (NPC) converer, was proposed by A. Nabae, I. Takahashi, and H. Akagi in [48]. The hree-level NPC opology is based on a modificaion of he sandard wo-level converer opology by adding wo new swiching devices per phase, as shown in Figure -3. The blocking volage for each swiching device of NPC is half he blocking volage of he wo-level inverers wih he same dc-link volage. The mulilevel oupu volage is achieved by using clamping diodes and cascaded dc capaciors. This opology is exendable o higher number of volage levels such as four- and five-level opologies. However, he hree-level NPC has found wide applicaions in high-power medium-volage drives [4, 59]. In Figure -3, o provide a floaing neural poin, he wo cascaded dc capaciors spli he dc inpu volage of he inverer. The wo diodes in each inverer leg conneced o he neural poin are called he clamping diodes. When swiches S 1 and S are urned on and S 3 and S 4 are urned off, he inverer oupu erminal is conneced o he posiive dc-link volage +V dc ; when swiches S 1 and S are urned off and S 3 and S 4 are urned on, he inverer oupu erminal is conneced o he negaive dc-link volage -V dc. When swiches 13

36 S and S 3 are urned on, he inverer oupu erminal is conneced o he neural poin hrough one of he clamping diodes, depending on he direcion of he load curren. In his condiion, he dc link capaciors (normally charged o V dc /) can be charged or discharged by he neural curren, causing a neural-poin volage unbalance [6-67]. Thus, he PWM conrol sraegy is needed o balance he neural-poin volage deviaion, making he conrol algorihm complex. By using proper PWM swiching, he average device swiching frequency can also be increased o wice he acual swiching frequency. Figure -3: Three-level NPC inverer The main advanages of he NPC opology are (i) he swiches can be seleced wih lower blocking volages and (ii) any number of volage levels can be obained by increasing he number of swiches in his opology. The main drawbacks of his opology are he capacior volage deviaion, he requiremen for a complicaed PWM swiching sraegy, and he differen blocking volages of he addiional clamping diodes...3. Flying Capacior Mulilevel Inverer A Flying-Capacior (FC) inverer was proposed by Meynard and Foch in 199 [68]. Figure -4 shows a ypical configuraion of a 3-level flying-capacior inverer. Compared o NPC, his opology uses dc capaciors conneced o he cascaded swiches insead of using clamping diodes [69, 7]. The volage on each capacior demonsraes he size of he volage seps. The oal capacior volage for each level differs from ha of he nex volage level by one volage sep. (S 1, S 1 ), and (S, S ) are complemenary swich pairs in each of he inverer legs. For example, when swiches S 1 and S conduc, he inverer erminal volage V AN is V dc /, corresponding o he negaive DC bus N. Similar o he swiching sae redundancies in oher mulilevel converers, hose in his opology provide 14

37 a grea flexibiliy for he PWM swiching sraegy o conrol and balance he charging/discharging for specific capaciors. The effecive equivalen inverer swiching frequency could be four imes he device s acual swiching frequency. However, he flying-capacior inverer has some limiaions. The inverer requires a large number of dc capaciors wih pre-charge circuis needed for each one. The PWM conrol is complex due o he need o balance he capacior volages, which change wih he differen inverer operaing condiions. The pracical use of he flying-capacior inverer is limied due o he above drawbacks. Figure -4: Three-level flying-capacior inverer..4. Parallel Inverers Srucure Like he previous mulilevel opologies, sandard inverer modules can be conneced in parallel by using inerphase ransformers o produce mulilevel PWM oupu volages. The parallel inverer opology as shown in Figure -5 can produce 3-level PWM oupu volages wih low THD [9, 1]. Figure -5: Parallel inverers using inerphase ransformers (curren sharing reacors) 15

38 However, he main drawback of his opology is ha he operaion of he parallel inverers depends on he device s parameer variaions. A small variaions in he swich urn-off imes and on-sae volage drops can creae dc curren drifs and circulaing currens. A balanced symmerical operaion of parallel conneced inverers can be obained by using inerleaved PWM conrols...5. Coupled Inducor Inverer One recen alernaive mulilevel opology uses coupled inducors in he oupu sage of a 6-swich inverer [, 19]. The 3-level coupled inducor inverer (CII) is shown in Figure -6. This opology produces mulilevel oupu volages from a single DC volage supply a each inverer oupu erminal using a 3-phase spli wound coupled inducor. The oupu erminal volage V AN of he CII opology can generae an exra volage level of ½V DC when swiches S 1 and S are urned on or urned off. When swich S 1 is urned on and S is urned off, V AN is conneced o he posiive dc-link volage +V dc ; when swich S 1 is urned off and swich S is urned on, V AN is conneced o he negaive dc-link volage - V dc. The significan advanage of he CII opology is ha he requiremen for dead-ime o avoid shoo-hrough curren is eliminaed since he spli-wound coupled inducor is in series wih he upper and lower swiches. Thus, radiional adverse effecs of dead-ime are avoided. In addiion, by using a proper PWM swiching scheme, he effecive swiching frequency of he PWM oupu volages can be doubled [, 19]. Figure -6: Three-phase 3-level coupled inducor inverer Wih he same number of semiconducor swiches, he CII opology benefis from mulilevel feaures and advanages over sandard inverers [, 19]. This opology is also comparable o oher 3-level converers (i.e., 3-level NPC) in erms of oupu waveform qualiy while uses half he number of swiches o generae he same number of volage levels. These feaures make his opology suiable for high-performance drives. 16

39 .3. Mulilevel Converers PWM Modulaion Sraegies Pulse widh modulaion has been sudied exensively during he pas decades. PWM sraegies have been developed o achieve a wide linear modulaion range, less swiching loss, less harmonic conen in he specrum of he PWM oupu waveforms, and easy implemenaion wih less compuaion burden. Recenly, many sudies have been conduced o modify radiional PWM sraegies in order o exend hem for use as a mulilevel converer modulaion. These schemes have become more complex due o addiional power elecronics devices conrol. However, he mulilevel converers provide exra degrees of freedom in deermining he PWM swiching paerns by providing he swiching redundancies. As a resul, many modulaion sraegies have been developed for mulilevel converers [5, 4, 61, 6, 71-84]. The hree major mulilevel PWM sraegies can be classified as mulilevel carrierbased PWM (or muli-carrier based PWM), mulilevel space vecor PWM, and Selecive Harmonic Eliminaion (SHE). Depending on he swiching frequency of mulilevel converers for each specific applicaion, he appropriae modulaion scheme can be seleced. Generally, high-power applicaions require low swiching frequency due o he lower swiching losses. Thus, he use of selecive harmonic eliminaion and mulilevel space vecor PWM are preferred sraegies since hese mehods can operae wih he fundamenal swiching frequency. However, high-qualiy converer oupus can be obained by increasing he swiching frequency. In his case, he mulilevel carrier-based PWM and space vecor PWM can be used. These schemes are more suiable for high dynamic range applicaions. Mulilevel carrier-based PWM echniques, Phase-Shifed PWM (PS-PWM) and Level- Shifed PWM (LS-PWM), are developed for mulilevel converer opologies by using muliple carriers [85-93]. The phase-shifed muliple carriers have been used for CHB and FC opologies o conrol each swich of he converer, providing an even power disribuion among he power cells. For a mulilevel converer wih C power cells, a sinusoidal bipolar PWM or unipolar PWM reference waveform wih muliple carriers phase shifed by 18 /C for he CHB and by 36 /C for he FC can be applied o he cells o produce a mulilevel oupu waveform [5]. The PS-PWM mehod inherenly reduces he inpu curren harmonics of he CHB and balances he capacior volages of he FC. The level-shifed PWM includes muliple carriers, which are shifed in ampliude for each possible oupu volage level generaed by he mulilevel converer. The LS-PWM 17

40 sraegies vary depending on he disposiion of he level-shifed carriers. LS-PWM can be caegorized as in-phase disposiion (IPD-PWM), where all carriers are in phase; phase opposiion disposiion (POD-PWM), where all carriers above he zero reference are in phase, bu below he zero reference are 18 phase-shifed; and alernae phase opposiion disposiion (APOD-PWM), where all carriers are alernaively in opposie disposiion [7]. More deails abou PWM sraegies can be found in [71, 85]. LS-PWM mehods are more suied for he NPC, since each carrier signal can be easily relaed o each power swich. The Space Vecor PWM (SVPWM) used for he wo-level sandard inverer can be exended o mulilevel converers. Since he number of volage vecors is increased in mulilevel converers, he compuaional cos and he algorihm complexiy are also increased. However, he redundan swiching saes allow for selecing he opimal swiching paern, and his feaure reduces he unbalance problems associae wih mulilevel converers. The degree of freedom in he selecion of opimal swiching saes can be used o balance he capacior volages in NPC and FC. V r 15 V r 8 V r 14 V r 16 V r 9 V r 4 V r 3 V r Δ 4 V r Δ3 Δ V r 1 1 Δ V r 7 V r 13 V r 1 V r 5 V r 6 V r 17 V r V r V r 1 Figure -7: 3-level converer space vecor block diagram A space vecor volage block diagram of a hree-level converer is shown in Figure -7. The SVPWM echnique uses he hree neares volage vecors o synhesize he reference volage vecor forming he swiching sequence [94]. A linear combinaion of he hree vecors generaes an averaged oupu volage equal o he reference over one swiching period. A convenional mulilevel SVPWM algorihm firs idenifies he secor and 18

41 riangle in which he reference vecor falls, as shown in Figure -7. To find a riangle, a series of calculaions involving he use of rigonomeric funcions is necessary. Nex, by using a look-up able, he hree volage vecors can be idenified. Finally, he SVPWM algorihm uses anoher series of rigonomeric calculaions o obain he duy raios of hose vecors [5, 4]. Compared wih oher convenional SVPWM sraegies, he recen SVPWM sraegies have reduced he compuaional burden and he complexiy of he algorihms [35, 73, 95, 96]. The riangle idenificaion and duy cycles can be calculaed by using very simple calculaions. The new SVPWM does no require he calculaion of rigonomeric funcions, or he use of look-up ables or coordinae sysem ransformaions. In addiion, he algorihm can be easily exended o a higher number of he volage levels wihou increasing he compuaional load. Mulilevel space vecor conrol can also be used o approximae he reference volage a he fundamenal frequency by choosing he closes generable vecors since mulilevel converers wih a high number of volage levels provide a high number of volage vecors [97]. SVPWM wih he naural fundamenal swiching frequency resuls in reduced swiching losses for high-power applicaion. As an alernaive, he selecive harmonic eliminaion (SHE) mehod, or saircase modulaion, can be applied o mulilevel converers for high-power applicaions due o he reducion in he swiching losses [98-1]. In his mehod, he inverer phase volage V AN is formed by a n-level saircase. The swiching angles for he volage levels are calculaed o cancel he low-order harmonics. The saircase modulaion is especially suiable for a CHB wih several power cells. However, he complexiy of he SHE schemes increases by increasing he number of volage levels due o he increase in he number of swiching angles and he corresponding number of polynomial equaions which mus be solved..4. Mulilevel Converer Applicaions Many mulilevel converer applicaions focus on indusrial medium-volage moor drives [5, 51, 7], flexible AC ransmission sysem (FACTS) [13], and racion drive sysems [51]. Mulilevel converers also allow for power conversion beween he uiliy and he renewable energy sources such as phoovolaic, wind, and fuel cells [14]. In addiion, he applicaion of mulilevel converers in Hybrid Elecric Vehicles (HEV) has 19

42 emerged as a very imporan alernaive. To achieve high power and high volage, a mulilevel power converer can be used in HEV o inerface wih he power cell of he muliple dc volage sources such as ulracapaciors and baeries [5]. The mulilevel converer can also be used for loss-sensiive susainable energy sources such as flywheel energy sorage sysems where he higher frequency PWM oupus wih high-frequency fundamenals are essenial o drive a high-speed machine. The minimum volage and curren THD are necessary o obain high efficiency and a normal operaion [4]. The four-level and hree-level inverers were implemened for a high-speed drive sysem in [19, 15]. The sandard inverer sysem wih an inducor filer can be used o reduce he curren THD. However, since in his ype of he applicaion, he fundamenal frequency range varies by a few hundred Herz, he AC inducor filer, which is usually designed o work wih he consan fundamenal frequency, canno operae efficienly in his range and can produce a large volage drop, which reduces he efficiency of he sysem. In addiion, he high-power level and high-fundamenal frequency limi he swiching frequency. This problem can increase harmonics in he oupus. In addiion, a flywheel energy sorage sysem operaing in a vacuum is very sensiive o roor heaing, which is associaed wih machine losses due o curren (and volage) harmonics. In [4], an increase in he swiching frequency significanly improves THD and hence, lowers he saor curren ripple and associaed copper losses. Thus, he roor heaing caused by a emperaure increase in he saor due o saor losses improves in a high-speed permanen magne machine. By miigaing he above limiaions, he CII opology is a good candidae and a suiable choice as an alernaive mulilevel opology for loss-sensiive applicaions..5. Chaper Summary This chaper presens a number of mulilevel converer opologies. The basic principles of differen mulilevel converers are discussed, and for each mulilevel opology, he hree-level converer srucures are explained. The coupled inducor inverer presens he superior feaures over sandard inverers and he oher 3-level inverers. A review of he various modulaion echniques for mulilevel converers is conduced. Finally, a few applicaions of mulilevel converers are briefly described.

43 Chaper 3 Spli-Wound Coupled Inducor Inverer Topology As he primary subjec of his hesis, he operaion of an inverer opology using a coupled inducor (see Figure 3-1) is described. A simplified equivalen ransformer model is used o clarify he operaing modes of his opology. The inducor winding curren and oupu curren characerisics of he coupled inducor inverer (CII) are invesigaed, and relaed equaions are derived. Winding and oupu curren ripples are obained from he effecive inducance experienced by he coupled inducor a swiching saes. The coninuous and disconinuous operaion modes of CII are examined based on common mode curren analysis. The differen ypes of flux produced by he winding curren are sudied by using wo ypes of cores: hree-single cores and a hree-limb core. All possible CII swiching saes are invesigaed by examining he differen 3-phase coupled inducor winding configuraions. The effecs of hese swiching saes and oher facors like urnon and off delays on he common mode curren are explored. Finally, he raings of CII swiching devices are calculaed. Figure 3-1: Three-phase mulilevel coupled inducor inverer opology 3.1. Coupled Inducor Inverer Topology Descripion The opology of he invesigaed 3-level coupled inducor inverer is shown in Figure 3-1 [, 19]. Spli-wound coupled inducors are placed a he inverer oupus beween he upper and lower swiches in each inverer leg. Each se of spli-wound coupled inducors can be placed on one limb of hree-single cores or a hree-limb inducor core (as is he case in his research). Using a hree-limb inducor core eliminaes boh fundamenal 1

44 frequency and common mode dc flux in he core [18]. As a resul, he magneic core flux densiy becomes small, which produces a special core size benefi. Unlike he sandard inverers, he new opology produces a 3-level PWM oupu waveform from a single DC volage level, filers oupu curren ripples, reduces volage sress and Elecromagneic Inerference (EMI), and can double he effecive oupu swiching frequency. All hese benefis improve he performance of sandard inverers when using he coupled inducors. These feaures make his opology suiable for highperformance drives. For example, he oupu line-o-line volage and phase curren of his opology are depiced in Figure 3-, which reveals ha he line-o-line volage is 3-level (V, 15V and 3V), and he oupu phase curren waveform is sinusoidal. 3 Volage [V] Curren [A] 15 (a) (b) Time [ms] Figure 3-: Simulaed CII opology (a) line-line V AB oupu volage (b) phase A curren (m a =1.15, inerleaved DPWM1, CII coninuous conducion mode) Since he spli-wound coupled inducor is in series wih he upper and lower swiches, he necessiy of having dead-ime proecion o avoid shor-circui currens in his opology is eliminaed. However, sandard and mulilevel inverers do no provide his benefi. If he effec of dead-ime proecion is no compensaed by using an analog or a digial PWM conrol uni [1, 14-16], he dead-ime can reduce he per-uni phase volage and produce poenially significan disorion over he inverer oupus [13, 17]. However, he CII opology no only enables operaion wihou he need for dead-ime compensaion, bu also allows for he overlapping of he upper and lower swiches onimes in he PWM swiching schemes. This unique propery eliminaes he effecs of dead-ime, produces an addiional mid-poin volage, and can double he effecive oupu swiching frequency [, 19]. Therefore, he modulaion index for he CII opology can correspond wih a higher phase volage; harmonic disorion in he oupu waveforms can be improved significanly by increasing a hird volage level and doubling he effecive

45 swiching frequency. 3.. CII Muli-Level Topology Operaion By comparing he operaion of a single leg of he sandard inverer wih ha of he CII opology, he oupu erminal volage V AN of he CII opology can generae an exra volage level of ½V DC, in addiion o V DC and. In he sandard inverer, he swiching urn-on and off imes of he upper and lower swiches are complemenary o avoid shoring he DC link. Each swich in one inverer leg canno operae independenly of he oher one. However, in he CII inverer opology, he upper and lower swiches can urn off and urn on simulaneously bu no independenly (his feaure will be shown laer in his chaper) o creae he mid-volage poin. Figure 3-3: Swiching saes of a CII single leg During he normal operaion of he opology, boh windings in he coupled inducor in each limb are conducing posiive currens wihou crossing he zero curren axes. This desirable operaion mode of CII opology is called he Coninuous Conducion Mode. The inverer leg s basic swiching saes in he coninuous conducion mode [19] are illusraed in Figure 3-3 wih he 3 possible oupu volage levels for V AN. Basically, each leg of he hree-phase inverer has four swiching condiions. Boh swiches are on in Figure 3-3(i); boh swiches are off in Figure 3-3(ii); and eiher one swich is on while he oher is off and one diode is conducing in Figure 3-3(iii) and Figure 3-3(iv). However, in he case of zero-curren axis crossing, he winding curren becomes zero and leads o he Disconinuous Conducion Mode. This condiion can happen for each phase when eiher only one diode or swich is conducing or when no device conducs. These disconinuous condiions are no suiable because one of he spli-wound coupled inducor coils is no elecrically wired o he circui bu magneically is conneced o he oher 3

46 coils, and, as he experimenal resuls in Figure 3-4 show, he qualiy of he oupus degrades, and, during he disconinuous period, he oupu volage conains noches wih an undefined volage. These resuls demonsrae ha proper PWM operaion is no possible in he disconinuous conducion mode. To explore he difference beween he oupu qualiy of he coninuous and disconinuous modes, he fundamenal rms and oal harmonic disorion (THD) of he oupu waveforms are abulaed in Table 3-1. The resuls demonsrae ha he rms value of he oupu volage and oupu curren is lower in he disconinuous mode. In addiion, he coninuous mode conains a lower harmonic conen compared o ha of he disconinuous mode. Thus, he disconinuous mode is no he opimal operaing poin of he inverer since his mode disors he oupu waveforms and reduces he magniude of he oupu volage and curren. Volage [V] Curren [A] 3 15 (a) (b) Time [ms] Figure 3-4 CII opology (a) line-o-line V AB oupu volage (b) phase A curren (m a =1.15, inerleaved DPWM1, CII disconinuons conducion mode) Table 3-1 CII fundamenal rms and THD of he phase A curren and V AB volage Operaing Coninuous Conducion Disconinuous Conducion Mode ia V AB ia V AB 6 Hz 8.17 A 11. V A 7 V THD 1.6% 6.44% 1.78% 7.% In a hree-level NPC inverer, he hree-level oupu is obained by using a neural poin connecion o a cener apped DC link [5, 4]. However, Figure 3-3(i) and Figure 3-3(ii) illusraes ha in he CII opology, he hird volage level is achieved by volage division on he spli wound inducor. When boh he upper and lower swiches urn on and off boh simulaneously in each leg, a hird volage level of ½V dc can be achieved. In Figure 3-3(i), when boh swiches are on, he oal DC volage bus, V dc, is dropped across he spli wound inducor, and since he coupling raio beween hese wo coils is one, and boh coils are designed idenically, he volage splis evenly beween he coils, and he 4

47 oupu erminal of.5v dc is obained. In he same way, in Figure 3-3(ii) when boh swiches are off, if he same polariy for he coupled inducor winding volage is considered, -V dc is dropped across he inducor, bu his ime, again due o he orienaion of he inducors,.5 V dc can be obained a he oupu. For he zero volage (Figure 3-3(iii)) and V dc volage (Figure 3-3(iv)) oupus, he coupled inducor coils are shored, and boh sides of he inducor srucure are ied eiher o he upper DC bus (P) or o he lower DC bus (N), respecively. The oupu erminal volage for he various swiching saes ( swich off, 1 swich on) is abulaed in Table 3-. Each phase has 4 possible swiching saes. The combinaions of swiching saes in each phase can be used o generae hree-phase oupus. Table 3- Swiching saes of he coupled inducor inverer Swiching Sae Device Swiching Saes (Phase A) (Phase B) (Phase C) S 1 S V AN S 3 S 4 V BN S 5 S 6 V CN P 1 1 ½V dc 1 1 ½ V dc 1 1 ½ V dc N ½V dc ½ V dc ½ V dc O O 1 V dc 1 V dc 1 V dc 3.3. CII Winding and Oupu Currens Equaions Based on he circui configuraion of he opology shown in Figure 3-3(i), (ii), (iii) and (iv), i can be concluded ha he coupled inducor curren is unidirecional and always flows from he op winding (wih do convecion) o he boom winding, indicaing he presence of a posiive common mode dc curren. To illusrae he winding currens and oupu curren relaionships, an equivalen circui for he coupled inducor in one limb is given in Figure 3-5. Figure 3-5: Transformer equivalen model of he coupled inducor 5

48 As Figure 3-5 reveals, he common DC curren, i CM, flows from he upper o he lower spli-wound inducors. This curren is he average of he upper and lower winding currens and is given by i acm iau + ial =, ( 3-1) where i au and i al are upper and lower winding currens, respecively. The oupu curren is obained by subracing he upper and lower winding curren and is given by i a = i i ( 3-) au Similarly, from equaions ( 3-1) and ( 3-), he winding currens can be rearranged based on he common mode curren and oupu phase curren as 1 i = i + i au a al. acm ( 3-3) 1 i al = ia + iacm. ( 3-4) To demonsrae hese curren relaionships, he experimenal resuls are given in Figure 3-6 and Figure 3-7. The upper and lower winding currens are illusraed in Figure 3-6. The common mode and phase A oupu currens are shown in Figure 3-7. Curren [A] iau ial Time [ms] Figure 3-6: Experimenal CII upper and lower winding currens (m a =.9, SVPWM) iacm Curren [A] 1-1 ia Time [ms] Figure 3-7: Calculaed CII common mode curren and experimenal phase A curren (m a =.9, SVPWM) 6

49 In each phase, he common mode curren is essenially a DC curren (DC offse) wih a high-frequency AC ripple a he swiching frequency. The ideal winding DC offse curren is approximaely one-half of he maximum peak of he fundamenal oupu curren. Assuming ha he winding currens are in he coninuous conducion mode, equaion ( 3-1) can be rewrien as 1 i acm = ia _ peak + iac _ ripple. ( 3-5) The value of i CM can be conrolled by using differen operaing modes and swiching conrol algorihms. As menioned before, he operaion of he coupled inducor in he coninuous conducion mode is he proper operaing mode of his opology. This mode can be characerized by he symmeric winding currens waveforms depiced in Figure 3-6, where hey are achieved wih a saisfacory common mode curren. The minimum common mode curren for he coninuous operaing mode, as shown in Figure 3-7, is he average winding curren. However, o overcome he disconinuous mode due o he variaion of he high-frequency AC ripple curren a he zero-curren crossing, a very small DC bias is added o i CM. Oherwise, if disconinuous conducion were o occur, he winding currens and he oupu volage and curren would be disored CII Simplified Transformer Equivalen Model The basic ransformer equivalen circui model given in Figure 3-5 is provided again in Figure 3-8. To demonsrae how he couple inducor impacs on he common mode curren and oupu curren, he model is simplified o wo decoupled circuis. Figure 3-8(b) shows he oupu model, and Figure 3-8(c) demonsraes he circui model beween he swiches. Figure 3-8: Equivalen circuis for he single phase inverer leg: (a) ransformer equivalen model, (b) oupu model, (c) circui model beween he swiches 7

50 In his model, he magneizing inducance and leakage inducance are shown by L m and L l per winding, respecively. The spli-wound coupled inducor is modeled wih a simple ransformer including magneizing and leakage inducances as shown in Figure 3-8(a). Figure 3-8(b) shows he resulan inducance seen a he oupu erminal. Since he upper and lower windings are placed on one limb and ighly coupled magneically wih differen polariies (do convenion), he fundamenal AC magneizing flux (inducance) in he upper winding is cancelled by ha in he lower winding; only wo parallel leakage fluxes (inducances) are lef a he oupu. Thus, each winding leakage inducance conribues half of he oupu curren. The resulan oupu inducance, L s, seen in series wih he oupu curren a he 3-level oupu volage, is Ll L s =. ( 3-6) On he oher hand, he DC componen of he spli-wound inducor curren, he common mode DC curren, passes hrough he full magneizing inducance of boh windings. Because he inducance is proporional o he squared number of urns, and wo winding coils wih same number of urns are conneced in series, he resulan magneizing inducance, L, is quadruple he magneizing inducance of one coil, L m. This oal magneizing inducance L is equal o L = 4L m. ( 3-7) 3.5. Coupled Inducor Winding and Oupu Curren Ripples As Figure 3-6 and Figure 3-7 reveals, in he CII opology, he coupled inducor winding currens and he oupu curren conain high-frequency AC curren ripples, and, as a resul, his ripple exiss in he common mode dc curren. The simplified magneizing model of he spli-wound couple inducor shown in Figure 3-8 can be used o analyze hese curren ripples. The high-frequency swiching volages over he oal series-conneced inducance of he coupled inducor produce he common mode ripple componens in he winding currens (see Figure 3-6). The maximum peak-peak common mode ripple given in ( 3-8) is calculaed when he square-wave volage of he magniude V dc a he swiching frequency f s is across he oal magneizing inducance L and he sum leakage inducance L l [3, 5]: i ac _ peakpeak _ cm = Vdc. ( L + L ) f ( 3-8) 8 l s

51 By increasing he magniude of he magneizing inducance, he common mode ripple can be reduced. The required magneizing inducance can be obained by increasing he number of urns in he upper and lower inducor windings. However, while in series wih he PWM volage source, he leakage inducance in each coil of he coupled inducor is conducing half of he oupu curren. The maximum oupu ripple can be obained when he inverer is swiching a square wave volage. Therefore, he oupu inducance including he sum of he leakage and filer inducances is exposed o a square wave wih magniude V dc / a he effecive swiching frequency of f s_effecive. The effecive swiching frequency depends on PWM schemes and can be doubled (f s_effecive = fs) by using a proper PWM swiching paern. The differen PWM swiching schemes will be explained in deail in chaper 4. i ac _ peakpeak _ oupu = Vdc / / 3 Vdc =. ( L + L ) ( f ) 4 3( L + L ) f ( 3-9) s filer s _ effecive s filer s _ effecive Expressions ( 3-8) and ( 3-9) can now be used o predic or design he AC ripple properies of he sysem, based on he magneizing and leakage inducances. For comparison, he oupu curren ripple when a sandard inverer is used is given as Vdc / 3 Vdc i ac _ peakpeak _ oupu = =. ( 3-1) L ( f ) 3L f filer The curren ripple in a sandard inverer could be four imes larger in magniude and one-half he frequency of he ripple of he CII opology. If he filer inducance is required, his requiremen will direcly benefi he core size because of he reduced magniude of he AC ripple flux. As well, if he same core and inducance are used, his opology provides he oupu waveform wih a lower harmonic conen and beer qualiy han ha of he sandard inverer. The CII opology can reduce he power losses caused by he harmonic curren and volage and, as a resul, can improve he load efficiency [19] Spli-Wound Coupled Inducor Flux The winding curren is composed of he fundamenal curren, common mode dc curren, and high frequency AC ripple. Each of hese componens of he winding curren can produce he flux inside he core. In oal, hree ypes of fluxes can be produced in he CII opology: he fundamenal AC flux, common mode dc flux, and high-frequency AC flux. s filer s 9

52 Regardless of he ype of spli-wound inducor core used (i.e., hree-single cores or hree-lime core), since he upper and lower winding coils are placed on one limb in a core, he fundamenal AC curren does no produce a flux in he spli-wound inducor core. The upper and lower winding each carries he half of he oupu curren wih a negaive value (or opposie polariy). Thus, he upper and lower windings in each limb cancel he fundamenal AC flux produced by anoher winding, and, as a resul, he fundamenal AC flux does no exis. The common mode dc curren does no conribue o he fundamenal AC flux in he core bu produces he dc flux in each limb in he core. This flux can be cancelled if a hree-limb core is used. When he 3-phase core is chosen, he fluxes generaed by he symmerical windings on he limbs oppose each oher, and so he dc flux in he core is eliminaed. However, small parasiic dc magneic fluxes can sill be produced. Since a high-frequency AC ripple curren flows hrough he windings, a highfrequency AC flux exiss in he core. This flux is generaed because of he high-frequency swiching volages across he coils. The main facors conribuing o he value of his flux are he swiching frequency, swiching sequence, swiching saes (or winding configuraion), and he magniude of he DC bus volage [16]. The higher he swiching frequency is, he lower he AC ripple curren is. Generally, in he CII opology, he hree-phase coupled inducor can be designed by using he same design mehod used for linear inducors carrying a DC curren wih a high-frequency ripple [17, 18]. In he nex secion, wo ypes of cores wih heir magneic models are described. The relucance circui can be used o explore how he CII inverer opology operaes wih differen ypes of cores Spli-Wound Coupled Inducor Cores Types The spli-wound coupled inducor in he CII inverer opology can be placed on wo ypes of cores [5]: a hree-limb core (see Figure 3-9(a)) and hree-separae cores (see Figure 3-9(b)). A simplified relucance equivalen circui for each ype of core is given in Figure 3-1. The main difference beween he models is he flux reurn pah in he core. Figure 3-1(a) shows he dependen flux pahs in he hree-phase cores. However, in Figure 3-1(b), he hree-single cores flux pahs are independen. 3

53 Figure 3-9: Coupled inducor core ypes a) hree-limb core b) hree-single cores Rab Rbc N T i bcm ' R b N i T acm R a N i T bcm R b N i T bcm R c N i T acm ' R a N i T ccm ' R c R ab R bc (a) (b) Figure 3-1: a) hree-limb relucance circui b) hree-single cores relucance circui Coupled Inducor Using Three-Single Cores The hree-phase coupled inducor using hree-single cores and wo windings per phase is shown in Figure The flux of he separae core in each phase is independen of he flux in he oher phases so ha hese fluxes are no muually coupled. Thus, no ineracion occurs beween he phases due o he single-core coupled inducor srucure. If he winding curren passes hrough he inducor, he DC and high-frequency AC fluxes can flow hrough he relucance circui. Thus, only he common mode curren including he high-frequency AC ripple produces he flux in he core. Figure 3-11: hree-phase coupled inducor placed on hree-single cores 31

54 In fac, when all hree spli wound inducors are magneically decoupled, he relaionship beween he common mode volage per phase and he corresponding magneizing inducance ha conrols he common mode curren ripple is given by v v v acm bcm ccm 4Lm = 4L m 4L m i i i acm bcm ccm. ( 3-11) Unforunaely, he main limiaion on he size of he inducor is he DC flux in he core and inducor losses corresponding o he DC flux. The nex secion inroduces he hreelimb core and focuses on how o eliminae he DC flux ha exiss wihin wih no DC flux reurn pah Coupled Inducor Using a Three-Limb Core The coupled inducor winding for each phase can be placed on a hree-limb core srucure as shown in Figure 3-9(a). The phases are muually coupled o one anoher via he relucance circui given in Figure 3-1(a). The same number of urns is used for he upper and lower windings o produce he mid-poin volage of V dc / a oupu. All limb relucances and inerlimb relucances are approximaely equal in Figure 3-1, and he number of urns for each phase is also he same. Wih his descripion, he DC Magneic Moive Force (mmf) produced in each limb will be equal if he common mode winding currens are equal. As a resul, DC flux will cancel ou in a hree-limb core. On he oher hand, high-frequency AC fluxes are produced in he core due o he high-frequency AC curren ripples which are no equal. Thus, he high-frequency fluxes in each limb are no he same. This siuaion would be caasrophic for he CII opology if all hree limbs had idenical high-frequency curren componens. In his case, he high-frequency fluxes in he core would cancel, shoring he swiches in each limb and damaging of all swiches []. Figure 3-1: hree-phase coupled inducor placed on a hree-limb core 3

55 The hree-phase coupled inducor using a hree-limb core and wo windings per phase is shown in Figure 3-1. This core geomery implies ha he upper winding in phase A is coupled o all oher windings, whereas wih hree independen cores, he upper winding in phase A is coupled only wih he lower winding in phase A. Wih he ineracion of he hree phases in he hree-limb core, fifeen coupling coefficiens are defined such ha he flux produced in one limb generaes he opposie flux in each of he oher wo limbs. Based on he ransformer model for he muliple coupled inducor windings [19-113], he relaionship beween he winding volages and currens in hree-limb core is given in v v v v v v au al bu bl cu cl r = au r al r bu r bl 33 r cu i i i i i rcl i au al bu bl cu cl + ( 3-1) M auau M aual M aubu M aubl M aucu M aucl iau M alau M alal M albu M albl M alcu M alcl ial M buau M bual M bubu M bubl M bucu M bucl d ibu, M blau M blal M blbu M blbl M blcu M blcl d ibl M cuau M cual M cubu M cubl M cucu M cucl icu M clau M clal M clbu M clbl M clcu M clcl icl where r x represen he winding resisances, M xx is he self-inducance and M xy is he muual inducance coefficiens (x and y are au, al, bu, bl, cu and cl). Since he number of urns for each winding in each phase is equal, he self-inducances are he same (.99 L ), and he muual inducance coefficiens are equal. Because he fundamenal AC curren does no produce a flux in he core, he above equaion can be simplified by subsiuing equaions ( 3-3) and ( 3-4) ino ( 3-1). This gives hree spli wound inducors and a oal of hree windings in each phase ha need coupling, as given in equaion ( 3-13): vacm ra iacm M aa M ab M ac iacm + d vbcm = ra ibcm M ba M bb M bc ibcm, ( 3-13) d v ccm rb iccm M ca M cb M cc iccm where r x represens he winding resisances, M xx is he self-inducance, and M xy is he muual inducance coefficiens (x and y are a, b and c).

56 Unlike he curren in he hree-single cores, he common mode curren for each phase is now generaed by he ineracion of all hree phases ogeher. In equaion ( 3-13), he common mode curren ripple is considerably dependen o he coupling coefficien and, as a resul, impacs on he winding curren ripple. To illusrae his dependence, upper and lower windings and oupu currens are simulaed in Figure 3-13 for M xy = -.45L and in Figure 3-14 for M xy = -.48L. The resuls show ha by changing he coupling coefficien from -.45L o -.48L, (a facor of 6.5%), he winding curren ripple is increased by a facor of abou 3. 3 Curren [A] 1-1 iau ia ial Time [ms] Figure 3-13: Simulaed upper and lower winding currens and oupu curren in phase A (m a =1.15, Inerleaved DPWM1, M xy =-.45L ) Curren [A] iau ia ial Time [ms] Figure 3-14: Simulaed upper and lower winding currens and oupu curren in phase A (m a =1.15, Inerleaved DPWM1, M xy =-.48L ) In his chaper, i has been shown ha he common mode curren is dependen on several facors: self-inducance, coupling inducance, and swiching frequency. In chaper 5, i will be shown ha his ripple depends on he modulaion schemes as well CII Swiching Saes The impac of winding configuraions on he effecive inducance is invesigaed in his secion. The effecive inducances conribue mainly o he expeced curren ramping rae for he winding curren and he corresponding common mode dc curren in each 34

57 swiching sae. The effecive inducance in each swiching sae deermines he maximum high frequency curren peak-peak ripple given in equaion ( 3-8) []. The effecive inducance does no have any significan effec on he oupu currens since only he leakage inducance can be seen from he oupu. The 3-phase swiching saes of he CII opology wih he 3-phase spli-wound inducor using a 3-limb core are invesigaed. By considering he operaion of all hree legs of he inverer, each leg may ake on one of he saes given in Figure 3-3, so ha he possible combinaions of he swiching saes for all hree phases are as shown in Figure For he purposes of clariy, Figure 3-15 illusraes he spli-wound inducor for each limb as a single coil, omiing he cenre-ap. Since all hree coils are wound on a common hree-limb core, he effecive inducance of any coil is dependen on he connecion of he oher wo coils. For example, he swiching saes (a) and (b) in Figure 3-15 produce he lowes effecive winding inducance in all hree legs, corresponding o he case when all inverer swiches are eiher on or off. Basically in hese wo condiions, all coils are energized or deenergized, respecively, canceling he majoriy of he flux in he core and producing a low effecive inducance. If he core flux is eliminaed, as occurs in swiching saes (a) and (b) in Figure 3-15, he swiches can become shor-circuied in each inverer leg, damaging all swiches []. By using he same analysis, he nex low-inducance swiching saes can be idenified as cases (f) and (g) in Figure Figure 3-15: 3-phase coupled inducor configuraions for various swiching saes Many of he above low-inducance swiching saes happen when carrier-based PWM or convenional SVPWM schemes are used. For example, he swiching saes (a) and (b) in Figure 3-15 occur frequenly when using a sandard sinusoidal PWM []. They can be avoided by using a disconinuous PWM (DPWM1) [1, 4]. However, he swiching saes (f) and (g) ake place in DPWM1. The aim of his research is o develop a new 35

58 swiching paern ha can eliminae he effecive low-inducance saes and improve he winding curren specrum while providing high-qualiy oupus. These resuls will significanly reduce he winding and core losses in coupled inducors and, hereby, also can reduce he size of he core and is relaed cos Common Mode DC Curren Analysis This secion describes he impac of he common mode dc curren on he operaion of coupled inducor inverers and explains how he swiching saes, urn-on and off delays, and device volage drops affec he common mode dc curren Impac of Common Mode DC Curren on CII Operaion The common mode curren is esablished by he common mode volage across he coupled inducor. Basically, in he ransien condiion, he minimum common mode dc curren is forced by he CII opology o he circui, which is he average of he upper and lower winding currens. However, in he seady sae, he average value of he winding common mode volage deermines he common mode DC bias. In he normal operaion of his opology, he bias value is very small and close o zero. If he average winding volage is zero, he common mode curren is no biased and is marginal, bu if he average winding volage is a posiive value (i.e.,.1% of V dc ), hen he common mode curren is biased wih a very small amoun of DC, and his resul helps o keep he operaion of he CII inverer in he coninuous conducion mode. To avoid he disconinuous conducion mode, a fixed DC bias is added o he common mode curren by using PWM modulaion schemes. In fac, he PWM swiching signals using he swiching saes of (i) and (ii) in Figure 3-3 can significanly conrol he average common mode volage. Therefore, conrol of he common mode curren is very imporan o he operaion of he coupled inducor inverer. For example, he common mode curren and he common mode winding volage which appears across he coupled inducor are shown in Figure 3-16, which demonsraes ha where he winding volage is zero, he coupled inducor winding is shored. However, he common mode curren has been changed due o he coupling beween he windings in he oher phases. To illusrae he effec of he winding volage, wo periods of ms are exraced from Figure 3-16 and expanded in Figure 3-17 and Figure Each figure shows hree successive swiching cycles. 36

59 Curren [A] Volgae [V] 15 1 (a) 5 1 (b) Time [ms] Figure 3-16: Phase A winding (a) common mode curren (b) common mode winding volage (m a =1.15, inerleaved DPWM1, f s =15 khz) In Figure 3-17, he coupled inducor winding is shored, and he common mode curren varies due o he coupling effecs of he oher winding. However, in Figure 3-18, since he upper and lower swiches PWM signals are generaed from ani-phase modulaing signals, posiive winding volage occurs in he firs half of he swiching cycle and negaive winding volage occurs in he second half. Figure 3-18 reveals ha he common mode curren ramps follow he winding volage changes in each swiching cycle. Curren [A] Volgae [V] 15 1 (a) 5 1 (b) Time [ms] Figure 3-17: Phase A winding wih he coupling effecs: (a) common mode curren (b) common mode winding volage (m a =1.15, inerleaved DPWM1, f s =15 khz) Curren [A] Volgae [V] 15 1 (a) 5 1 (b) Time [ms] Figure 3-18: Phase A winding wihou he coupling effecs: (a) common mode curren (b) common mode winding volage (m a =1.15, inerleaved DPWM1, f s =15 khz) 37

60 3.9.. Impac of Swiching Saes on Common Mode DC curren Four conducion modes were represened in Figure 3-3 for he coninuous operaion mode of (i) wo-swich conducion, (ii) wo-diode conducion, (iii) and (iv) one-swich conducion wih one-diode conducion. The impac of he swiching sae on he common mode dc curren is shown in Table 3-3. The swiching sae (i) increases and he swiching sae (ii) decreases he common mode dc curren by applying +V dc and -V dc across he coupled inducor winding in each limb, respecively. The swiching saes (iii) and (iv) do no conribue o he common mode dc curren since in his mode, he coupled inducors are shored. Since he losses in he shor-circui pass are negligible during very brief periods of swiching, he common mode dc curren is mainained. The common mode curren in one leg can be direcly impaced by energizing or de-energizing he same leg, and can also be indirecly affeced by coupling wih he oher leg when he swiching saes are (iii) and (iv). For insance, in cases (f) and (g) in Figure 3-15, wo windings are energized or de-energized, bu he hird winding is shored. The resulan flux caused by he energized or de-energized windings induces a volage in he shored winding. This volage produces he curren in he shored winding, opposing he resulan flux caused by he oher windings. However, if one winding is energized and he oher one is deenergized, as in case (h) in Figure 3 15, he common dc curren in he shored winding is no influenced by he oher windings, and is variaion is negligible. In his case, he flux reurn pass for he energized winding is closed by he flux reurn pass from he deenergized winding. Table 3-3 Swiching saes for phase A, ogeher wih impac on common mode dc curren (Assuming oher windings are open circui) Swiching ype S 1 S V AN Circui (Figure 3-3) Coupled inducor winding Common mode dc curren P 1 1 ½V dc (i) Energized Increases N ½V dc (ii) De-energized Decreases O 1 (iii) Shor circui Consan O 1 V dc (iv) Shor circui Consan Impac of Swiching Turn-On or Turn-Off Delays on Common Mode DC curren The magniude of he common mode dc curren can be conrolled by he swiching 38

61 urn-on or urn-off delays. In Figure 3-3 (i), he swich urn-off delays produce a posiive volage across he coupled inducor, generaing a posiive common mode dc offse. On he oher hand, a urn-on delay (dead-ime) causes he negaive volage o drop, producing a negaive volage across he coupled inducor. This volage drop negaes he common mode dc offse Impac of Device Volage Drops on Common Mode DC curren In Figure 3-3(iii) and (iv), free-wheel diodes and coupled inducor resisor volage drops decrease he common mode curren gradually. For insance, for case (iv) in Figure 3-3, as he volage a he lower winding is clamped o a posiive supply hrough he freewheel diode, he forward volage drop of he diode will decrease he average winding volage, lowering he common mode curren. For all cases in Figure 3-3, he average winding volage and oupu volage are lowered by device volage drops Swiching Device Raing Specificaions The volage raing of each device is he same as ha in he sandard inverer [5]. However, he curren raing for each device given by he rms of he winding curren in ( 3-14) is smaller: iarms i aurms = ialrms = ( ) + icm rms, ( 3-14) where he rms common mode curren is ia _ peak i = ( ) + icm _ ripple_ rms, ( 3-15) CM rms and he rms value of he phase curren is i = /. ( 3-16) arms i apk By subsiuing ( 3-15) and ( 3-16) ino ( 3-14), he rms of he winding curren becomes 3 i aurms = ialrms = ia _ peak + icm, ripple, rms. ( 3-17) 8 If he value of he common mode ripple is negligible, he curren raing of each semiconducor swich can be reduced by 15% compared o ha of he sandard inverer. 39

62 3.11. Chaper Summary The operaion of he CII opology is described, and he performance is invesigaed. The unique operaing characerisics of his inverer are explored. The coninuous and disconinuous operaing modes of he CII inverer are explained, and he common mode curren is inroduced as a main facor for conrolling he operaing mode. A very small dc bias is needed o esablish symmeric operaion of he coupled-inducor windings currens. The basic ransformer model of he coupled inducor is explained by using hree-single cores and a hree-limb core. The hree-limb core shows beer performance han he hree-single cores by eliminaing he DC flux. Since he only inducance ha can be seen a he oupu of his inverer is he leakage inducance, he coupled inducor is acually ransparen o he oupu. The self and muual magneizing inducances can be opimized wihou concern for oupu lineariy, and his feaure can improve he performance of he CII inverer by reducing he size of he core and lowering he coupled inducor losses. Wih 3-level oupu line-line volage, reduced oupu curren ripple, lowered oupu THD, and dead-ime free operaion, he CII opology is one of he mulilevel opologies ha can be used for high-performance applicaions like high-speed drives, as is demonsraed in [19, 114]. 4

63 Chaper 4 Coupled Inducor Inverer PWM Modulaion Sraegies Pulse widh modulaion (PWM) sraegies, including he disconinuous modulaion schemes used for a sandard inverer, can be modified and applied o he mulilevel coupled inducor inverer. However, when using any modulaion scheme, care mus be aken o balance he common mode winding curren (volage) over he swiching period for he coninuous mode of operaion and o generae muli-level volages wih low harmonic conen [18, 19, 3, 16, 115]. The significance of various PWM modulaion sraegies on he performance of he CII is explored in his chaper. Carrier-based PWM schemes for he mulilevel CII opologies are described and new mulilevel space vecor PWM mehods are invesigaed and developed o improve he performance of he CII opology. The PWM swiching echniques are caegorized as follows: Inerleaved carrier-based PWM Sinusoidal Pulse Widh Modulaion (SPWM) Disconinuous Pulse Widh Modulaion (DPWM1) Mulilevel Space vecor PWM (SVPWM) Original SVPWM SVPWM wih opimal swiching selecion (Improved SVPWM) Inerleaved disconinuous SVPWM (DSVPWM) The SVPWM mehods are differen in erms of swiching saes and sequences. The original SVPWM and improved SVPWM mehods have 5-segmen swiching sequences, and he DSVPWM has a 9-segmen swiching sequence. The original and improved SVPWMs balance he common mode curren (volage) over wo successive swiching cycles whereas he DSVPWM balances he common mode curren during one swiching cycle. This feaure has a significan impac on he winding curren ripple in differen mehods. In addiion, he effecive swiching frequency for each mehod varies depending on SVPWM swiching saes and swiching sequences. The effecive oupu swiching frequency significanly conribues o he oupu curren ripple. 41

64 4.1. The Significance of Using Differen PWM Sraegies The selecion of an opimal modulaion sraegy is essenial o ensure he highperformance operaion of he muli-level coupled inducor inverer opology. Successful operaion of he CII opology over he full modulaion range relies on selecing swiching saes and sequences where he coupled inducor presens a low winding curren ripple and a high effecive inducance beween he upper and lower swiches in each inverer leg (he high inducance sae). As a resul, a low high-frequency winding curren ripple is produced, reducing he coupled inducor losses and improving he inverer s overall performance [, 16]. Alhough he DC flux is removed in he hree-limb core srucure, he rms of he AC ripple flux increases due o he coupling beween he inducors in he inverer legs compared o he hree-single cores srucure, which has similar effecs on he core losses [, 5]. The PWM swiching wih he abiliy o minimize he AC ripple of he highfrequency common mode curren ripple allows for smaller core losses. In addiion, mos imporanly, minimizing he peak flux densiy allows for core maerials (such as ferries) o be used, resuling much lower core losses han hose creaed by core maerials designed o cope wih a large flux densiy [5, 116]. The presence of he coupled inducors in his inverer allows for he inerleaved PWM swiching of he upper and lower swiches in each inverer leg o be an effecive swiching echnique for his opology by increasing he effecive swiching frequency of he oupu PWM waveforms above he acual swiching frequency. The inerleaved PWM echnique can be used o lower he size of he oupu AC filer and lower he highfrequency harmonics [, 8-11, 19, 114, 117-1]. In general, he PWM modulaion sraegies for he CII configuraion can be classified ino wo major caegories: inerleaved carrier-based PWM and mulilevel space vecor PWM. When using carrier-based sandard PWM schemes, he swiching saes in each swiching cycle are no seleced arbirarily bu chosen by he reference waveform. Unconrolled swiching saes can produce low effecive inducance connecions and produce a large high-frequency curren ripple in he inducor windings, resuling in high winding Joule losses, core losses, and high-frequency leakage flux ouside he magneic core. Even hough he oupu volage and curren waveforms have low harmonic conen, he inverer winding curren conains high harmonic disorion [, 16]. Thus, even wih high-qualiy oupu signals, he overall performance of he CII can be poor due o he 4

65 coupled inducor losses. If swiching saes are unconrolled, he coupled inducor mus be oversized o provide sufficien effecive inducance in all swiching cases. As an alernaive, he muli-level SVPWM echnique for CII opology can offer superior performance and feaures over previous modulaion schemes by paricularly addressing he issues relaed o he common mode dc curren balance and ripple minimizaion. Since each volage vecor can be generaed by redundan swiching saes, he SVPWM mehod can be used o eliminae he low-inducance swiching saes in he CII ha lower he high-frequency inducor winding curren ripple. A careful analysis of he space vecor reveals ha he winding curren ripple depends on no only he selecion of he swiching saes bu also heir sequences. The order of volage vecors in each sequence during a swiching cycle can be arranged o minimize he winding curren ripple [19, 4, 16, 115]. Consequenly, by generaing a muli-level oupu volage waveform, SVPWM provides some choices for swiching saes and sequences. When used efficienly, an opimal PWM sraegy allows an appropriae balance beween he need o produce a muli-level oupu and he proper managemen of he inducor winding currens and effecive inducance. 4.. Inerleaved Carrier-Based PWM This secion describes he inerleaved swiching sraegy for carrier-based PWM schemes and shows how o obain he inerleaved upper- and lower-swich gae signals in he CII opology. The inerleaved swiching can be achieved by using eiher wo modulaing waves of he same magniude and frequency bu 18 ou of phase compared wih a common riangular carrier wave or wo riangular carrier waves 18 ou of phase compared wih a common modulaing wave. This selecion of references and carriers enables overlapping swich saes (Figure 3-3(i) and Figure 3-3(ii)) o occur in each swiching cycle, increasing he effecive oupu swiching frequency [, 19]. As menioned in chaper 3, secion 3.9., overlapping swich saes can conrol he common mode dc curren as well. Thus, his feaure should be considered when designing any PWM swiching mehod for he CII opology. In he case where wo references waveforms 18 ou of phase are used, in order o balance he common mode dc curren in each swiching cycle, he insananeous modulaion signals are inerleaved such ha he upper and lower swiches 43

66 per-uni duy cycle always sum o uniy. As a resul, boh overlapping swich saes are placed in each swiching cycle wih he same period, and hus, hey cancel ou each oher s effecs on he common mode dc curren. As a resul, a each poin of ime, he sum of wo modulaing signals is: m m = 1, ( 4-1) Ap + An where m Ap and m An are he insananeous values of he upper and lower swiches reference waveforms in each swiching cycle. In addiion o his basic relaionship, small deviaions in m Ap and m An can allow a small dc volage drop across he coupled inducor windings o be conrolled, hence allowing conrol of he common mode dc curren. By using he inerleaved echnique, he iniial inerleaved carrier-based modulaions he inerleaved Sinusoidal PWM (SPWM) and he Disconinuous PWM (DWPM1) were developed and applied o he CII opology in [, 19]. These modulaion schemes are described in he following secions for his opology Inerleaved Sinusoidal PWM (SPWM) The SPWM echnique is adoped from -level coninuous PWM schemes for sandard inverers. For PWM swiching of one inverer leg, he SPWM modulaion echnique normally requires wo sinusoidal modulaing waves, v m+ and v m, which are of he same magniude and frequency bu 18 ou of phase as shown in Figure 4-1. The wo modulaing waves are compared wih a common riangular carrier wave v cr, generaing wo gaing signals, v g1 and v g3, for he upper swiches, S 1 and S 3, respecively. Figure 4-1 reveals ha he upper and lower devices in one inverer leg can swich simulaneously. Figure 4-1: Inerleaved SPWM: PWM conrol and gae signals, and phase A PWM volage (m a =.9 and m f =9) [19] 44

67 To increase he linear operaion range, he hird harmonic can be added o he reference waveform [4]. The SPWM wih a hird harmonic injeced is used for he SPWM resuls presened in his hesis. In inerleaved carrier-based PWM mehods, he DC offse componens of he upper and lower PWM signals can be conrolled o give he desired dc bias level o he common mode curren. Using symmeric winding offses ensures he oupu curren offse remains zero. In Figure 4-, a hree-level PWM line-line volage is demonsraed by using hreephase inerleaved SPWM. The oupu volage around he peak volage is swiching beween and ± V dc, resuling in high THD of he oupu volage waveforms and high dv/d around he peak volage. Since he hree-phase swiching saes canno be seleced freely, low-inducance swiching saes of { } and { }, configuraion (a) and (b) in Figure 3-15, occur frequenly when using inerleaved SPWM []. As shown in chaper 5, hese facors cause he inerleaved sinusoidal PWM mehod o produce excessive winding curren ripples, especially when m a is low, resuling in high winding and core losses, wih a high-frequency leakage flux produced ouside he magneic core [,, 16]. Volage [V] Time [ms] Figure 4-: Simulaed SPWM: line-line oupu volage of he CII inverer (m a =.9, f c =15 khz) 4... Inerleaved Disconinuous PWM (DPWM1) The mehod of clamping a phase leg oupu volage o he dc volage bus is called disconinuous pulse widh modulaion (DPWM). The DPWM1 scheme, creaed by a 6º disconinuous PWM in each posiive and negaive peak cycle of he inverer volage, generaes a muli-level volage wih lower harmonic conen and lower swiching losses compared o he SPWM in he CII circui [, 19, 1]. The DPWM1 conrol mehod uses zero-sequence disconinuous-ype signals o augmen he sinusoidal reference in each swiching cycle; only wo inverer phase legs are swiching while he hird phase leg (where he seleced phase afer 1 degree changes in a cyclic manner over one 45

68 fundamenal period) is clamped o he dc volage bus a N or P poins. Table 4-1 demonsraes he DPWM1 swiching logic for each phase corresponding o he oupu phase volage of he CII opology. The swiching signals and relaed he phase PWM volage for one inverer leg are shown in Figure 4-3. The PWM swiching exiss in each single phase for 1 a he fundamenal cycle. Table 4-1: Inerleaved DPWM1 swiching sequence [4, 5] Reference Phase Phase A Phase B Phase C -6 PWM LOW PWM 6-1 HIGH PWM PWM 1-18 PWM PWM LOW 18-4 PWM HIGH PWM 4-3 LOW PWM PWM 3-36 PWM PWM HIGH Figure 4-3: Inerleaved disconinuous PWM: PWM conrol and gae signals, and phase A PWM volage (m a =1.15 and m f =9) [19] The DPWM1 mehod allows he CII srucure o minimize he winding curren ripple because his mehod eliminaes he direc effecs of he non-swiching leg around he peak volage and reduces he effecs of he coupling beween he inducor windings in a hree-limb core wih only wo inverer legs acively PWM a a given ime; he common mode ripple in he non-swiching leg is indirecly affeced by he oher wo legs because of he flux pass creaed by he magneizing inducance of he windings as he nonswiching leg has a flux reurn pah. In addiion, compared o SPWM, DPWM1 has a lower dv/d a he peak line-line volage, and his feaure can reduce he oupu curren ripple. These characerisics make he disconinuous PWM mehod one of he suiable PWM sraegies for he CII opology. 46

69 One of he advanages of he DPWM1 mehod is ha 6º disconinuous regions exis in he inverer s erminal volages bu no in he line-line volages and he load phase volages o he load neural poin. The disconinuous regions decrease he swiching losses since he average swiching frequency is reduced o /3 he insananeous swiching frequency. However, unlike disconinuous PWM mehods used for sandard inverers, he DPWM1 mehod no only does no degrade he qualiy of he load volages (since he non-acive regions canno be seen in he load volages), bu also increases he oupu PWM frequency o double he insananeous swiching frequency. For example, Figure 4-4 demonsraes a PWM line-o-line volage, obained by DPWM1 wih he cancellaion of non-acive regions in he inverer erminal volage. 3 Volage [V] Time [ms] Figure 4-4: Simulaed DPWM1: line-line oupu volage of he CII inverer (m a =.9, f c =15 khz) Volage [V] Curren [A] 15 (a) (b) 5 iau iacm ial Time [ms] Figure 4-5: Simulaed DPWM1: (a) common mode winding volage (b) common mode curren and winding currens in phase A (m a =.9, f c =3 khz) A zero winding volage across he spli wound inducor for phase A in he 6 inacive regions is shown in Figure 4-5, which reveals ha he common mode curren ripple is changing while he phase A couple inducor windings are no eiher energized or deenergized because no swich aciviy is occurring. In fac, he coupling beween he phases in he hree-limb core is conrolling he common mode ripple magniude. Because of Faraday s law, he changing flux produced by he swich aciviy in he oher wo 47

70 phases induces a common mode volage (in opposie polariy) across phase A s spliwound inducor srucure. Anoher advanage of he DPWM1 mehod is ha he low-inducance swiching saes in SPWM can be avoided by using DPWM1 [, 114]. However, careful inspecion of he DPWM1 swiching saes in [4] demonsraes ha he nex low-inducance swiching saes { }, { 1}, and ec. (configuraion (f) and (g) in Figure 3-15) ake place in DPWM1. To minimize he curren ripple, having a swiching scheme which eliminaes he low-inducance swiching saes is essenial Mulilevel Space Vecor Modulaion When carrier-based modulaions, inerleaved SPWM and DPWM1, are used, he swiching saes are deermined by he reference waveform. Thus, he swiching saes canno be seleced arbirarily. The ripple and harmonic conen of he coupled inducor s winding currens depend on he swiching saes in each of he hree inverer legs [16, 115]. To obain a lower winding curren ripple, swiching saes wih a low inducance should be avoided. However, carrier-based modulaions resul in frequen use of lowinducance saes, which can be eliminaed by using he space vecor pulse widh modulaion (SVPWM). SVPWM is one of he preferred real-ime modulaion echniques and has been widely used for mulilevel inverers [5, 4]. In his secion, as an alernaive, he mulilevel SVPWM sraegy for he CII opology is presened o provide some choices over he swiching saes and sequences. In fac, he main benefi of SVPWM is he precise idenificaion of pulse placemen ha can be used o opimize he CII operaion. The operaion of he CII opology can be affeced by he imbalance common mode dc curren and he winding curren ripple [18]. When used efficienly, SVPWM allows for an appropriae balance beween he need o properly manage he common mode winding currens (volages) and o achieve harmonic performance gains while producing he muli-level oupu volages. This secion presens he principles of he mulilevel space vecor modulaion for he CII inverer Swiching Saes The operaing saus of he swiches in each inverer leg (Figure 3-1) can be represened by he swiching saes as shown in Table 4-. Swiching sae P denoes 48

71 ha he upper and lower swiches in he inverer leg are on. In his condiion, he common mode curren increases (ramps up). Similarly, swiching sae N denoes ha he upper and lower swiches in he inverer leg are off. In his condiion, he common mode curren decreases (ramps down). In conras, O indicaes ha eiher he upper or lower swiches are on so ha he common mode curren is mainained. For example, he swiching sae {1 11} corresponds o he conducion of S 1, S 5, and S 6 while S, S 3, and S 4 are off in he inverer legs A, B, and C, respecively. Table 4-: Swiching saes of he coupled inducor inverer (Logic 1 means swich S 1 on, logic means off) Swiching Sae Device Swiching Saes (Phase A) (Phase B) (Phase C) S 1 S V AN S 3 S 4 V BN S 5 S 6 V CN P 1 1 ½V dc 1 1 ½ V dc 1 1 ½ V dc N ½V dc ½ V dc ½ V dc O O 1 V dc 1 V dc 1 V dc Space Vecor Equaions for 3-Phase Swiching Saes In his secion, he relaionship beween he space volage vecors and swiching saes is derived. If we assume he hree-phase balanced operaion of he inverer, he relaionship beween phase volages A, B and C is as follows: vao ( ) + vbo ( ) + VCO ( ) =, ( 4-) where V AO, V BO, and V CO are he insananeous load phase volages. A space vecor volage can be generally expressed in erms of he α-β volages in he saionary coordinaion as r v( ) = vα ( ) + jvβ ( ). ( 4-3) The hree-phase variables can be ransformed ino equivalen α-β variables by v V α β 1 ( ) = ( ) 3 Subsiuing ( 4-4) ino ( 4-3), we have v 3 v V r j jπ / 3 v ( ) = ( vao ( ) e + vbo ( ) e + V 3 AO BO CO ( ) ( ). ( ) ( ) e j4π / 3 CO ). ( 4-4) ( 4-5) 49

72 For example, for he acive swiching sae {1 11}, he generaed load phase volages are v ) = vdc, vbo ( ) = Vdc, VCO ( ) = v. ( 4-6) AO ( dc The corresponding space vecor volage, denoed as V 1, can be obained by subsiuing ( 4-6) ino ( 4-5): r Vdc V = 3 1 e. ( 4-7) Taking ino accoun all he swiching saes in he hree phases, Table 4-3 illusraes he possible volage vecors wih he corresponding swiching sae for each winding configuraion. In oal, 64 possible combinaions of swiching saes are in he CII opology as lised in Table 4-3. In addiion o he swiching saes, he load phase volages and he corresponding oupu volage vecors in he polar coordinaes are also lised in Table 4-3. The 64 swiching saes consiss of 1 zero saes and 54 acive saes Volage Vecors Caegories The possible volage vecors corresponding o he swiching saes in Table 4-3 wih he 3-phase coupled inducor winding configuraion for each swiching sae are depiced in Table volage vecors are obained from 64 swiching saes. Since he swiching saes have redundancies in generaing he same volage vecor, in oal here are 18 acive volage vecors plus a zero volage vecor. The volage vecors are caegorized as zero, small (V dc /3), medium (V dc / 3) and large vecors (V dc /3). The impac of he various swiching saes on he common mode currens is also shown in Table 4-4. In one or more inverer legs, he swiching sae ype-p increases he common mode curren, and he swiching sae ype-n decreases. The swiching sae ype-pn has boh effecs bu on he common mode curren in differen phases. The swiching sae ype-o does no affec he common mode curren. 5

73 Table 4-3: Swiching saes corresponding o each space volage vecor Sae of Inverers Swiches Load Phase Volages Oupu volage S 1 S S 3 S 4 S 5 S 6 V AO V BO V CO Phase Ampliude 1 1 Vdc/6 Vdc/6 -Vdc/ Vdc/6 -Vdc/6 Vdc/ Vdc/6 -Vdc/3 Vdc/ Vdc/3 -Vdc/6 -Vdc/ Vdc/ Vdc/ Vdc/6 -Vdc/3 Vdc/ Vdc/6 Vdc/3 -Vdc/ Vdc/ -Vdc/ Vdc/3 Vdc/6 Vdc/ Vdc/6 Vdc/3 -Vdc/ Vdc/6 Vdc/6 -Vdc/ Vdc/6 -Vdc/6 Vdc/ Vdc/3 Vdc/6 Vdc/ Vdc/6 Vdc/3 -Vdc/ Vdc/ Vdc/ Vdc/3 Vdc/6 Vdc/ Vdc/6 -Vdc/6 Vdc/ Vdc/ -Vdc/ Vdc/ Vdc/6 -Vdc/6 Vdc/ Vdc/ Vdc/ Vdc/ Vdc/ -Vdc/ Vdc/ Vdc/ Vdc/ Vdc/ Vdc/ Vdc/3 Vdc/6 Vdc/ Vdc/6 Vdc/3 -Vdc/ Vdc/ Vdc/ Vdc/3 Vdc/6 Vdc/ Vdc/3 -Vdc/6 -Vdc/ Vdc/ -Vdc/ Vdc/ Vdc/ Vdc/3 -Vdc/6 -Vdc/ Vdc/ -Vdc/ Vdc/ -Vdc/ -Vdc/ Vdc/ -Vdc/ Vdc/ Vdc/ -Vdc/ Vdc/ Vdc/ Vdc/ Vdc/ -Vdc/ Vdc/ Vdc/ Vdc/3 -Vdc/6 -Vdc/ Vdc/ -Vdc/ Vdc/ Vdc/ Vdc/3 -Vdc/6 -Vdc/ Vdc/6 Vdc/6 -Vdc/ Vdc/6 -Vdc/6 Vdc/ Vdc/6 -Vdc/3 Vdc/ Vdc/3 -Vdc/6 -Vdc/ Vdc/ Vdc/ Vdc/6 -Vdc/3 Vdc/ Vdc/6 Vdc/3 -Vdc/ Vdc/ -Vdc/ Vdc/3 Vdc/6 Vdc/ Vdc/6 Vdc/3 -Vdc/ Vdc/6 Vdc/6 -Vdc/ Vdc/6 -Vdc/6 Vdc/

74 Table 4-4(a): Zero volage vecors wih he corresponding swiching saes and configuraions NP-ype NP-ype O-ype O-ype O-ype Zero Volage Vecor Vecor Phase Angle {11 } { 11 11} {1 1 1} V r { 11 } {11 11} {1 1 1} { } { } { 11} {11 11 } Small Volage Vecor 1 Vdc 3 Table 4-4(b): Small volage vecors wih he corresponding swiching saes and configuraions N-ype P-ype NP-ype NP-ype N-ype P-ype Vecor Phase Angle V r { 1 1} {11 1 1} {1 11} {1 11 } {1 } { } 1 V r {1 1 } {1 1 11} { 11 1} {11 1} { 1} { } π / 3 V r {1 1} {1 11 1} { 1 11} {11 1 } { 1 } { } π / 3 3 V r { 1 1} {11 1 1} {1 11} {1 11 } {1 } { } π 4 V r {1 1 } {1 1 11} { 11 1} {11 1} { 1} { } 4π / 3 5 V r {1 1} {1 11 1} { 1 11} {11 1 } { 1 } { } 5π / 3 6 Table 4-4(c): Medium and large volage vecors wih he corresponding swiching saes and configuraions Medium Volage Vecor 1 Vdc 3 7 N-ype P-ype Large O-ype Volage Vecor Vecor Phase Angle V r {1 1} {1 11 1} / 6 V r { 1 1} {11 1 1} / 8 V r {1 1 } {1 1 11} 5π / 6 9 V r {1 1} {1 11 1} 5π / 6 1 V r { 1 1} {11 1 1} π / 11 V r {1 1 } {1 1 11} π / 6 1 Vdc 3 π 13 π Vecor Phase Angle V r {1 1 1} V r {1 1 1} π / 3 V r {1 1 1} π / 3 15 V r {1 1 1} π V r {1 1 1} 4π / 3 V r {1 1 1} 5π / 3 5

75 Space Vecor Block Diagram The space vecor diagram of he 3-phase 3-level CII including he swiching sae corresponding o each volage vecor is depiced in Figure 4-6. This diagram is similar o ha of ypical 3-phase 3-level inverer [5, 4] since he number of volage levels are he same in boh cases. However, he swiching sae required o generae similar volage vecors is specific o each muli-level opology. In his opology, he overlapping swiching saes are a unique feaure, eliminaing dead-ime consideraions. The space vecor block diagram in Figure 4-6 shows 19 effecive volage space vecors, including a zero volage space vecor, wih he corresponding swiching saes for each volage vecor. The space vecor block diagram has been divided ino six 6 degree secors (I, II, III, IV, V, and VI). Each secor consiss of 4 riangles ( 1,, 3, 4 ). The ip of he reference vecor can be locaed wihin any riangle, and each riangle verex represens a swiching vecor. This vecor represens one or more swiching saes depending on is locaion. V r V r 15 V r 8 V r 14 V r 9 V r 7 V r 3 V r V r 16 V r 4 Δ V r 1V r 1 V r 13 V r 1 V r 5 V r 6 V r 1 V r 17 V r V r Figure 4-6: CII space vecor diagram including swiching saes A careful analysis of he space vecor diagram reveals ha he performance of he inverer depends on he selecion of swiching saes and heir sequences [, 16, 115]. Each volage vecor has redundan swiching saes. By selecing an appropriae swiching sae for each volage vecor, winding curren ripple can be reduced. The swiching sequence should be designed o also decrease he curren ripple while increasing he 53

76 effecive oupu swiching frequency and lowering he swiching losses. These processes can lower he inverer losses by reducing he coupled inducor losses and swiching losses. These properies consiue he key feaures of he proposed SVPWM approaches Dwell Time Calculaion Similar o he sandard SVPWM algorihm for muli-level inverers, he mulilevel space vecor modulaion for he CII inverer is also based on he vol-second balancing principle. To minimize he harmonic disorion in he volage, he reference vecor is approximaed by he ime averaging of he neares hree vecors, V x, V y, and V z according o ( 4-8) and ( 4-9): r r r r V = ( d V + d V + d V ) / T ( 4-8) ref x x y y z z s T = d + d + d, ( 4-9) s x where d x, d y, d z are he dwell ime of V x, V y, and V z, respecively. The hree neares vecors and heir dwell imes can be deermined by finding he riangle where he reference vecor lies in he hexagon [35]. V ref can also be synhesized by using oher space vecors insead of he neares hree. However, doing so will cause higher harmonic disorion in he inverer oupu volage, and his resul is undesirable in mos cases Swiching Sequence Design In each riangle in Figure 4-6, a swiching sequence is formed by using he bes combinaion among all possible swiching saes a he verices for he hree neares volage vecors. The appropriae swiching saes are chosen based on he effecive inducance values and preferred configuraions as given in Table 4-5; he swiching sequences are designed o minimize he curren ripple and he number of swiching occurrences per cycle. Among differen ypes of swiching sequences, he mos popular ones are (i) he 7-segmen and (ii) he 5-segmen ypes [5]. The 7-segmen sequence is difficul o apply o he CII opology because eiher he swiching ransien in each ime inerval becomes more han for a leas one of he 6 swiches, or he symmerical PWM pulses corresponding o he middle of he swiching period can no be produced. For his reason, he approach used in his hesis applies a 5-segmen swiching sequence as a basic srucure o design he swiching sequences. The basic 5-segmen swiching sequence is shown in Figure 4-7. y z 54

77 T s d x V r x d y V r y d z V r z d y V r y d x V r x Figure 4-7: SVPWM basic 5-segmen swiching sequence Selecion of Winding Configuraions for Volage Vecors The coupled inducor curren ripple magniude is dependen on he coupled inducor effecive inducance for each swiching sae. Depending on each swiching sae, he coupled inducor configuraion changes, so ha he effecive inducance value beween he upper and lower swiches in an inverer leg varies. Since effecive inducance depends on he swiching sae, selecing he swiching sae wih he highes possible effecive inducance (he lowes curren ripple) for each volage vecor resuls in reduced winding curren harmonic disorion [, 16, 115]. The effec of he various swiching saes on each volage vecor level is invesigaed. In Figure 4-6, he volage vecors are caegorized as zero (vecors 1), small (vecors 1 o 6), medium (vecors 7 o 1) and large vecors (vecors 13 o 18). Careful inspecion of he swiching saes for he vecors in Figure 4-6, as well as he coil connecions shown in Figure 3-15, indicaes he available inducor configuraions for each sae as shown in Table 4-4. Large and medium volage vecors are generaed only from specific winding configuraions. A large volage vecor is possible only when he inverer oupu volages are all eiher V dc or zero, as shown in Figure 3-15(e) (ype-o). Similarly, medium volages are possible only wih he inducor configuraions shown in Figure 3-15(i) (ype- N) and Figure 3-15(j) (ype-p). Therefore, he choices of winding configuraions for medium and large volage vecors are limied; winding configuraions wih high inducances and low curren ripple can no be freely chosen. The effecive inducance affeced by he winding configuraion says he same for hese volage levels. However, for small and zero volage vecors, various winding configuraions can be chosen so ha he lowes effecive inducance saes can be deermined and eliminaed from SVPWM swiching sequences. For a zero volage vecor, he winding configuraions shown in Figure 3-15(a) and Figure 3-15(b) have he lowes inducance. In his case, all hree coupled inducors in each leg are energized or de-energized ogeher, canceling he majoriy of he flux in he core and producing he lowes effecive 55

78 inducance compared o all winding configuraions. In Figure 3-15(e), none of he windings are energized or de-energized. Thus, he coupled inducor windings do no impac on each oher. In fac, no high-frequency AC ripple curren is flowing in he windings. Similarly, for small volage vecors, he winding configuraions of Figure 3-15(f) and Figure 3-15(g) have he lowes inducance since in hese configuraions, he coupled inducor in wo legs are energized or de-energized, and he hird one is shored. The high-frequency flux due o energized or de-energized coils induces a volage in he shored coil. This volage produces a high-frequency curren, and, as resul, a highfrequency flux generaes o oppose he resuling flux of he energized or de-energized coils. Since wo coils are energized or de-energized, he high-frequency curren ripples in he configuraions in Figure 3-15(f) and Figure 3-15(g) are larger han hose in he configuraions in Figure 3-15(i) and Figure 3-15(j), where he configuraions have one coil energized. The winding configuraion in Figure 3-15(h), in comparison wih hose in Figure 3-15(i) and Figure 3-15(j), has a larger effecive inducance because he highfrequency flux generaed by he spli-wound coupled inducor flux in one leg is absorbed by spli-wound coupled inducor flux in he oher leg. The high-frequency flux pass is closed by wo limbs in he core wih high permeabiliy compared o he air in he configuraions of Figure 3-15(i) and Figure 3-15(j). Therefore, he lower relucance and he higher inducance are achieved for configuraion (h) in Figure In addiion, he shored coil is no affeced due o he oher coils. Table 4-5: Ranked swiching saes for each volage level based on he effecive winding inducance (Larges o smalles from lef o righ) Type of vecor Winding Configuraion (Figure 3-15) Zero Volage (e) (no AC flux) (c), (d) (a), (b) Small Volage (h) (i), (j) (f), (g) Medium Volage (i), (j) Large Volage (e) (no AC flux) Combinaions of possible inducor configuraions for each size of volage vecor are presened in Table 4-5, grouped by he magniude of he effecive coil inducance; i.e., if possible, a small volage should be obained by using he configuraion in Figure 3-15(h) in preference o hose in Figure 3-15(i) and Figure 3-15(j), which are, in urn, preferable o hose in Figure 3-15(f) and Figure 3-15(g). In fac, he expeced curren ramping rae 56

79 for he winding in each swiching sae is relaed o he effecive inducance, and, as a resul, he larges effecive inducance minimizes he winding curren and common mode dc curren ripples Common Mode Curren Balance The swiching saes and sequences for a given vecor mus be chosen carefully o ensure ha he average common mode volage applied o he windings on each limb is mainained a abou zero value. As he preceding discussion demonsraed, equivalen oupu volages may be obained for differen swiching saes, which may ac o eiher increase or decrease he common mode dc curren. To ensure ha he common mode dc curren is no ramped excessively in one direcion or he oher, he proposed SVPWM scheme should alernae swiching saes and/or he swiching sequence. To minimize he common mode curren deviaion, he dwell ime of a given P-ype and N-ype swiching sae for he coupled inducor in each phase should be equally disribued over he sampling periods, which could be one or wo successive swiching cycles Even-Order Volage Harmonic Eliminaion To cancel even line-o-line volage harmonics, half-wave symmery is applied in he selecion of swiching saes [5, 81]. To do so, each volage vecor in one secor is given one oher volage vecor 18º apar, generaing he same volage in each leg bu wih an opposie polariy. This vecor is placed in he same sequence wih he same dwell ime of he iniial vecor. For example, if he volage sequence is {V 7 V V 1 V V 7 } in secor I- 3, hen in IV- 3, 18º apar, he seleced volage sequence is {V 1 V 5 V 4 V 5 V 1 }. V 1, V 5, and V 4 are complemenary of V 7, V, and V 1, respecively, and have he same dwell ime. If he upper and lower swich posiion of a given leg is {1}, hen 18º away i is {1} and vice versa. However, if he swiching posiion of a given leg is {} or {11} in a secor, he swiching posiion of he same leg is eiher {} or {11}, in a secor 18º away. To summarize, he swiching sequences are seleced o minimize he number of swiching occurrences per swiching cycle and he ransiions required for V ref when moving from one secor o anoher. The general crieria for choosing he swiching saes in he swiching sequence are summarized as follows: (a) Minimize he effec of he swiching sae on he inducor winding common mode curren deviaion. 57

80 (b) Selec a high-effecive inducance swiching sae wherever possible. (c) Mainain half-wave symmery o cancel even line-o-line volage harmonics. The reminder of his chaper focuses on hese crieria o find an opimal swiching sequence wih appropriae swiching saes. Various SVPWM modulaion schemes are developed and invesigaed which differ in erms of he designs of heir swiching sequences and swiching saes. The performance comparisons of he SVPWM mehods wih he CII opology will be demonsraed hrough simulaion resuls and experimenal ess in chaper Original SVPWM The original SVPWM scheme is he iniial mulilevel SVPWM algorihm developed for he CII opology [16]. In his mehod, a swiching sequence is formed by applying he appropriae swiching saes chosen from all possible swiching saes a he verices in each riangle in Figure 4-6. The swiching saes are chosen based on he effecive inducance values and preferred configuraions as given in Table 4-5. To ensure ha he common mode dc curren is no ramped excessively in one direcion or he oher, he original SVPWM scheme alernaes he swiching sequence in successive swiching cycles. Ts Ts d x d y d z d y d x d z d y d x d y d z V r V r x1 y1 V r V r V r z1 y1 x V r V r V r 1 y x V r z y V r z Figure 4-8: Original SVPWM swiching sequence Figure 4-8 illusraes he swiching sequence for his approach. dx, dy and dz are allocaed dwell imes for he volage vecors of a given riangle (Figure 4-6) wih verex V x, V y and V z, respecively. In he firs swiching cycle A, he volages are applied in he order x-y-z-y-x. In he following swiching cycle B, he volages are applied in he order z-y-x-y-z. The oal dwell imes for each volage vecor in cycle A and B are he same. However, each volage vecor of x, y, or z in cycle B has opposie effecs on he common mode dc curren ramp in each limb compared wih he same volage vecor in cycle A. For example, consider he case when V x is {11 } in cycle A and { 11 11} in cycle B: he wo swiching saes generae he same volage vecor in each inverer leg 58

81 wih opposie effecs on he common dc currens. This approach ensures ha he common mode winding volage in each phase is balanced over each pair of swiching cycles in a given riangle. As a resul, he corresponding common mode curren in each leg is direcly balanced by he same leg winding volage; he effecs of he coupling beween he windings from oher legs also are canceled due o he balanced average winding volage for each winding over each pair of swiching cycles Implemenaion of Original SVPWM By using he original SVPWM approach discussed in he pervious secion, wo possible 5-segmen swiching sequences are invesigaed in his secion. By properly selecing he swiching saes, he low-inducance swiching saes of (a), (b), (f) and (g) in Figure 3-15 are eliminaed for zero and small volage vecors in boh sequences. However, in sequence, he swiching sae of Figure 3-15(h) wih a higher inducance is chosen insead of he swiching saes of (i) and (j) in Figure 3-15 in sequence 1. The seleced swiching saes for each volage level in sequences 1 and are shown in Table 4-6. Type of vecor Swiching saes for sequence 1 Table 4-6: Original SVPWM swiching saes for sequence 1 and Zero Volage (V ) Small Volage (V 1 o V 6 ) Medium Volage (V 7 o V 1 ) Large Volage (V 13 o V 18 ) Swiching saes for sequence (h) The swiching saes of sequences 1 and are illusraed in segmen I of he spacevecor diagram in Figure 4-9 and Figure 4-11, respecively. The resuling common mode winding volages for each phase in each riangle in secor I are ploed in Figure 4-1 and Figure 4-1. The swiching sequences in Figure 4-9 and Figure 4-11 indicae he proposed mehod is coninuous SVPWM when m a is low (m a <.5) and becomes disconinuous SVPWM when m a is high (m a >.5) (noe ha he maximum m a is 1.). Specifically, in sequence 1, coninuous SVPWM is observed in riangle 1 while disconinuous SVPWM is observed in for phase C and in 3, 4 for phase A. In sequence, coninuous SVPWM is observed in riangles 1 and 3, while disconinuous SVPWM for phases A and C is observed in and 4, respecively. 59

82 V r 14 V r 14 V r 14 V r 14 V r Δ 4 V r 7 V r Δ 4 V r 7 V r Δ 4 V r 7 V r Δ 4 V r 7 Δ 3 Δ 3 Δ Δ 1 V r V r V r Δ V r Δ 13 Δ 1 13 V r Δ 3 1 Δ V r 1 V r 1 V r 1 Δ 1 Δ 3 V r 13 V r Δ V r 1 V r 13 Secor I- 1 Cycle A Vecors V r [11 ] x1 V r [11 1] y1 V r [11 1 1] z1 V r [11 1] y1 V r [11 ] x1 Cycle B Vecors V r [ 1 1] z V r y [ 11 1] V r [ 11 11] x V r y [ 11 1] V r [ 1 1] z Secor I- Cycle A Vecors V r [1 1] x1 V r [1 1 1] y1 V r [11 1 1] z1 V r [1 1 1] y1 V r [1 1] x1 Cycle B Vecors V r [ 1 1] z V r y [1 1 1] V r [1 11 1] x V r y [1 1 1] V r [ 1 1] z Secor I- 3 Cycle A Vecors V r [1 1] x1 V r [1 11] y1 V r [1 1 11] z1 V r [1 11] y1 V r [1 1] x1 Cycle B Vecors V r [1 1 ] z V r y [1 11 ] V r [1 11 1] x V r y [1 11 ] V r [1 1 ] z Secor I- 4 Cycle A Vecors V r [1 1] x1 V r [1 1 1] y1 V r [1 1 11] z1 V r [1 1 1] y1 V r [1 1] x1 Cycle B Vecors V r [1 1 ] z V r y [1 1 1] V r [1 11 1] x V r y [1 1 1] V r [1 1 ] z Figure 4-9: Original SVPWM: swiching saes in secor I wih he eliminaion of (a), (b), (f) and (g) inducor configuraions for zero and small volage vecors, sequence 1 Ts Ts d x d y d z d y d x d z d y d x d y d z V r V r x1 y1 V r V r V r z1 y1 x V r V r V r 1 y x V r y V r z z V r cmwa V r 14 V r cmwb V r cmwc V r Δ 4 Δ 3 V r Δ1 V r 1 V r 7 Δ V r 13 V r cmwa V r 14 V r cmwb V r cmwc V r Δ 4 V r 7 Δ 3 Δ V r 1 Δ V r 1 V r 13 V r cmwa V r 14 V r cmwb V r cmwc V r Δ 4 V r 7 Δ V r Δ 3 1 Δ V r 1 V r 13 V r cmwa V r 14 V r cmwb V r cmwc 6 V r Δ 4 V r 7 Δ 3 Δ V r 1 Δ V r 1 Figure 4-1: Original SVPWM: coupled inducor winding volage in each leg based on swiching saes in Figure 4-9, sequence 1, (Common mode volages are ±V DC ) V r 13

83 V r 14 V r 14 V r 14 V r 14 V r Δ 4 V r 7 V r Δ 4 V r 7 V r Δ 4 V r 7 V r Δ 4 V r 7 Δ 3 Δ 3 Δ Δ 1 V r V r V r Δ V r Δ 13 Δ 1 13 V r Δ 3 1 Δ V r 1 V r 1 V r 1 Δ 1 Δ 3 V r 13 V r Δ V r 1 V r 13 Secor I- 1 Cycle A Vecors V r [11 11] x1 V r [1 11] y1 V r [ 11 1] z1 V r [1 11] y1 V r [11 11] x1 Cycle B Vecors V r [11 1] z V r y [1 11 ] V r [ 11 ] x V r y [1 11 ] V r [11 1] z Secor I- Cycle A Vecors V r [1 1] x1 V r [1 1 1] y1 V r [1 11 ] z1 V r [1 1 1] y1 V r [1 1] x1 Cycle B Vecors V r [1 11] z V r y [1 1 1] V r [1 11 1] x V r y [1 1 1] V r [1 11] z Secor I- 3 Cycle A Vecors V r [11 1] x1 V r [1 1] y1 V r [1 11 ] z1 V r [1 1] y1 V r [11 1] x1 Cycle B Vecors V r [1 11] z V r y [1 11 1] V r [ 11 1] x V r y [1 11 1] V r [1 11] z Secor I- 4 Cycle A Vecors V r [1 1] x1 V r [1 1 1] y1 V r [ 11 1] z1 V r [1 1 1] y1 V r [1 1] x1 Cycle B Vecors V r [11 1] z V r y [1 1 1] V r [1 11 1] x V r y [1 1 1] V r [11 1] z Figure 4-11: Original SVPWM: swiching saes in secor I wih he eliminaion of (a), (b), (f), (g), (i) and (j) inducor configuraions for zero and small volage vecors, sequence Ts Ts d x d y d z d y d x d z d y d x d y d z V r V r x1 y1 V r V r V r z1 y1 x V r V r V r 1 y x V r y V r z z V r cmwa V r 14 V r cmwb V r cmwc V r Δ 4 Δ 3 V r Δ1 V r 1 V r 7 Δ V r 13 V r cmwa V r 14 V r cmwb V r cmwc V r Δ 4 V r 7 Δ 3 V r Δ1 Δ V r 1 V r 13 V r cmwa V r 14 V r cmwb V r cmwc V r Δ 4 V r 7 Δ V r Δ 3 Δ1 V r 1 V r 13 V r cmwa V r 14 V r cmwb V r cmwc V r Δ 4 V r 7 Δ V r Δ 3 Δ1 V r 1 V r 13 Figure 4-1: Original SVPWM: coupled inducor winding volage in each leg based on swiching saes in Figure 4-11, sequence, (Common mode volages are ±V DC ) 61

84 This resul has he advanage of generaing a muli-shaped reference waveform ha may improve he performance of he drive, especially a a low modulaion deph. The effec of alernaing he swiching sequences from cycles A and B can also be seen in he waveforms in Figure 4-1 and Figure 4-1 and he swiching ables in Figure 4-9 and Figure Alhough he nominal swiching period is T s, many of he devices swich only wice every wo swiching periods. As a resul, he swiching losses may be lower han expeced from he nominal swiching frequency. The winding volage for each coil in sequence 1 changes over wo successive cycles, bu in sequence, he winding volage changes over each cycle. As a resul, he curren ripple in sequence is smaller han he curren ripple in sequence 1. However, he average device swiching has been increased in sequence SVPWM wih Opimal Swiching Selecion (Improved SVPWM) The SVPWM sraegy wih he opimal swiching selecion is presened [115]. This sraegy is designed o minimize he winding curren ripple by eliminaing all he lowinducance swiching saes. For simpliciy, his approach is called Improved SVPWM in his hesis. For his sraegy, a new swiching sequence as illusraed in Figure 4-13 is designed o minimize common mode curren deviaions over wo successive swiching cycles, cycle A and B. T s T s d x d y d z d y d x d x d y d z d y d x V r V r x1 y1 V r y1 V r z1 1 V r x V r V r V r V r V r z y x x y Figure 4-13: Improved SVPWM swiching sequence The swiching sequence is formed by using hree volage vecors, V x, V y, and V z. dx, dy and dz are allocaed dwell imes for V x, V y, and V z volage vecors of a given riangle (Figure 4-6), respecively. For boh swiching cycles, A and B, he space vecor volages are applied in he same order x-y-z-y-x wih he same dwell ime. The volage vecors in cycle A and B have eiher opposie effecs (i.e., P-ype and N-ype) or no effecs (i.e., O-ype) on he common mode curren in each inverer leg. To minimize he 6

85 common mode curren deviaion, he dwell imes of a given P-ype and N-ype swiching sae in Table 4- are equally disribued over each pair of swiching cycles. Similar o he original SVPWM, his approach ensures ha he common mode winding volage is balanced over each pair of swiching cycle in a given riangle Implemenaion of Improved SVPWM The original SVPWM scheme eliminaes he use of low-inducance configuraions of (a), (b), (f), (g), (i) and (j) in Figure 3-15 for small and zero volage saes. In his secion, he improved SVPWM scheme eliminaes all low-inducance swiching saes. Thus, he need o use he configuraions of Figure 3-15(c) and Figure 3-15(d) in zero volage saes is also eliminaed. This resul has significan effecs on he operaion of he CII opology a low modulaion indices. As shown in Table 4-7, he opimal swiching saes in Table 4-5 wih minimized effecs on he common dc mode curren are chosen for he improved SVPWM sequence in Figure Type of vecor Opimal Swiching saes Table 4-7: Improved SVPWM swiching saes Zero Volage (V ) Small Volage (V 1 o V 6 ) (h) Medium Volage (V 7 o V 1 ) Large Volage (V 13 o V 18 ) Figure 4-14 o Figure 4-17 show he proposed 5-segmen swiching sequence wih corresponding winding and phase volages for each specific swiching sae in cycles A and B in secor I for 1,, 3 and 4. These figures reveal ha by properly selecing he swiching saes, he low-inducance swiching saes of (a), (b), (c), (d), (f), (g), (i) and (j) in Figure 3-15 for he zero and small volage vecors are eliminaed. The wo cycles of 5-segmen swiching sequences in Figure 4-14 o Figure 4-17 reveal ha he average winding volage is zero over cycles A and B. For example, in Figure 4-14, consider he case when V x1 is {11 1} in cycle A, and V x is { 11 1} in cycle B: he wo swiching saes generae he same volage vecor in each inverer leg wih opposie effecs on i cm in phases A and B. The swiching sequences in Figure 4-14 o Figure 4-17 indicae ha he proposed mehod is a coninuous SVPWM when m a is lower han.5 and becomes disconinuous SVPWM when m a is higher han.5. Coninuous SVPWM is observed in riangles 1 and 3 while disconinuous SVPWM for phases A and C is observed in and 4, respecively. This ransiion from coninuous SVPWM a 63

86 low-modulaion indices o disconinuous SVPWM a high-modulaion indices provides he opimal use of each modulaion. Ts Ts V r 14 d x d y d d y d x d x d y d z d y d x z V r V r x1 y V r V r V r 1 1 y1 x V r 1 x V r V r y V r V r z y x z V r V r Δ1 Δ 4 Δ 3 V r 7 Δ V r 13 V r cmwa V r cmwb V r 1 Secor I- 1 Cycle A Vecors V r [1 1 1] x1 V r [1 11] y1 V r cmwc V r [11 1] z1 V r [1 11] y1 V r AN V r BN V r CN V r [1 1 1] x1 Cycle B Vecors V r x [1 1 1] V r y [1 11 ] V r [ 11 1] z V r y [1 11 ] V r x [1 1 1] Figure 4-14: Improved SVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 1, (Common mode volages are ±V DC ) Ts Ts V r 14 z d y d y d x d y d d x d x d y z d d x z V r V r x1 y V r V r V r 1 1 y1 x V r 1 x V r V r y V r V r z y x V r V r 1 Δ 4 V r 7 Δ 3 Δ Δ V r 13 V r cmwa V r cmwb V r 1 Secor I- Cycle A Vecors V r [1 1] x1 V r [1 1 1] y1 V r cmwc V r [1 11 ] z1 V r [1 1 1] y1 V r AN V r BN V r CN V r [1 1] x1 Cycle B Vecors V r x [1 11 1] V r y [1 1 1] V r [1 11] z V r y [1 1 1] V r [1 11 1] x Figure 4-15: Improved SVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I-, (Common mode volages are ±V DC ) 64

87 Ts Ts V r 14 d y d x d d x d x d z d x z V r V r x1 y V r V r V r 1 1 y1 x V r 1 x V r V r y V r V r z y x z d y d y d y V r V r Δ1 Δ 4 Δ 3 V r 7 Δ V r 13 V r cmwa V r cmwb V r 1 Secor I- 3 Cycle A Vecors V r [11 1] x1 V r [1 1] y1 V r cmwc V r [1 11 ] z1 V r [1 1] y1 V r AN V r BN V r CN V r [11 1] x1 Cycle B Vecors V r x [ 11 1] V r y [1 11 1] V r [1 11] z V r y [1 11 1] V r [ 11 1] x Figure 4-16: Improved SVPWM: coupled inducor upper winding volage and phase volage in each leg based on swiching saes in secor I- 3, (Common mode volages are ±V DC ) Cycle A Ts Cycle B Ts V r 14 d y z d y d y d y d x d d x d x d z d x z V r V r x1 y V r V r V r 1 1 y1 x V r 1 x V r V r y V r V r z y x V r V r Δ1 Δ 4 Δ 3 V r 7 Δ V r 13 V r cmwa V r cmwb V r 1 Secor I- 4 Type A Vecors V r [1 1] x1 V r [1 1 1] y1 V r cmwc V r AN V r BN V r CN Vdc Vdc/ Vdc Vdc/ Vdc/ Vdc Vdc Vdc/ Vdc/ Vdc Vdc Vdc/ Vdc/ Vdc Vdc Vdc/ V r [ 11 1] z1 V r [1 1 1] y1 V r [1 1] x1 Type B Vecors V r x [1 11 1] V r y [1 1 1] V r [11 1] z V r y [1 1 1] V r x [1 11 1] Figure 4-17: Improved SVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 4, (Common mode volages are ±V DC ) Disconinuous SVPWM reduces he swiching losses and improves he performance a he high-modulaion indices while coninuous SVPWM generaes high-qualiy oupus a 65

88 he low-modulaion indices. The effec of alernaing P-ype and N-ype swiching sequences from cycles A and B can also be seen in he waveforms and swiching ables as shown in Figure 4-14 o Figure The oupu erminal volages in every wo successive swiching cycles are idenical. Thus, he improved SVPWM mainains he oupu swiching frequency a he nominal value Impac of Swiched Pulse Posiions on Winding Curren In addiion o effecive high inducance saes, he sequence of he swiching saes in each swiching cycle (or he order of space volage vecors) also have significan impac on he common mode curren ripple [4]. Wih he swiching paern shown in Figure 4-14 o Figure 4-17, he order of he P-ype and N-ype vecors in each cycle is chosen o minimize he curren ripple in each phase, bu if, for example, he swiching sae shown in Figure 4-16 is rearranged, he new swiching sae is obained as shown in Figure When wo graphs are compared he winding volages for phases A and C are swapped; in Figure 4-16, for he same swiching frequency, he phase B winding volage limis he curren ramping rae in each cycle by alernaing ± V dc across he winding, while in Figure 4-18, he winding volage canno limi he curren ramping rae by puing only + V dc or -V dc across he winding in one cycle. Thus, he curren ripple for phase B in Figure 4-18 is he maximum. Ts Ts V r 14 V r cmwa V r cmwb V r cmwc V r AN V r BN V r CN d x d y d d y d x d x d y d z d y d x z V r V r x1 y V r V r V r 1 1 y1 x V r 1 x V r V r y V r V r z y x z 66 V r V r Δ1 Δ 4 Δ 3 V r 1 V r 7 Δ Secor I- 3 Cycle A Vecors V r [1 11] x1 V r [1 1] y1 V r [11 1] z1 V r [1 1] y1 V r [1 11] x1 Cycle B Vecors V r x [1 11 ] V r y [1 11 1] V r [ 11 1] z V r y [1 11 1] V r [1 11 ] x Figure 4-18: Improved SVPWM: alernae winding and phase volage in secor I- 3, wih poorly chosen swiching sequence, (Common mode volages are eiher ±V dc ) V r 13

89 4.6. Inerleaved disconinuous SVPWM This secion firs describes he concep of he inerleaved swiching in he mulilevel SVPWM sraegies. Then a new SVPWM mehod is designed and developed based on he inerleaved swiching sequence []. The inerleaved swiching saes wih a high effecive inducance are chosen o minimize he common mode curren deviaions. Finally he resuls obained by hese swiching saes demonsrae he proposed SVPWM is he disconinuous SVPWM SVPWM Inerleaved Swiching To easily explain and invesigae he inerleaved swiching in SVPWM, he inerleaved approach based on wo carrier waveforms is adoped here. Figure 4-19 demonsraes he inerleaved swiching scheme when wo riangular carrier waveforms, T P and T A, are 18 ou of phase compared wih m a, he common modulaion waveform value, a he swiching cycle of T s. T Ap and T An are he gaing signals for he upper and lower swiches, S 1 and S, respecively. The swiching insances in which boh he upper and lower swiches overlap each oher are inerleaved a he beginning, middle, and end of he swiching cycle. The inerleaved propery is obained because of he unique characerisic of he CII opology where boh he upper and lower swiches can be eiher on P-ype or off N-ype a he same insan. In Figure 4-19, during he ime inerval of d AP, boh swiches are on, and during he ime inerval of d An, boh swiches are off. Since he value of he modulaion signal is he same for boh carrier signals, d AP is equal o d An. The P- ype and N-ype swiching saes generae he same oupu volage (V dc /). Thus, heir posiion in a swiching cycle can be swiched. If his change happens, he new inerleaved swiching scheme can be obained as shown in Figure 4-. Boh inerleaved swiching schemes I and II produce he same oupu volage. Thus, when designing a swiching sequence, hese inerleaved swiching saes can be replaced whenever necessary. The advanage of using he inerleaved PWM in he CII opology is he possibiliy of obaining he double effecive swiching frequency a he inverer oupus while balancing he common mode volage (curren) which is a significan issue for he successful operaion of he CII opology. Figure 4-19 and Figure 4- reveal ha while he acual swiching frequency is f c, he effecive oupu volage swiching frequency is wice f c. Since he gaing signals are symmerical o he midpoin line (T s /), he oupu volage in he firs half cycle of he swiching cycle is idenical o he second half of he swiching 67

90 cycle. While jus one ransiion occurs in he gaing signals from high o low or vice versa, wo ransiions occur in he oupu volage. To obain he double oupu frequency, d Ap does no have o be equal o d An. The main reason why hese ime inervals should be equal is o balance he winding volage and, as a resul, o minimize he common mode dc curren deviaions. The P-ype and N-ype swiching saes when equally disribued over he sampling period as demonsraed in Figure 4-19 and Figure 4-, can cancel each oher s effecs on he common mode dc curren. Figure 4-19: Inerleaved swiching scheme I (Acive High) Figure 4-: Inerleaved swiching scheme II (Acive Low) The quesion ha arises here is how he inerleaved SVPWM differs from he pervious inerleaved SPWM and DPWM1 mehods discussed in secion As menioned before, he performance of he CII opology is dependen on he swiching saes wih minimum inducor winding ripple. Since he hree-phase swiching saes can no be freely seleced, low-inducance swiching saes occur frequenly when using sandard inerleaved sinusoidal PWM and DPWM1. However, he inerleaved SVPWM canno only provide he advanages of inerleaved swiching bu also improve he performance of he inverer by eliminaing he low effecive inducance swiching saes. As well, hese improvemens can be achieved while SVPWM overcomes he complexiy of he common mode curren balancing. 68

91 4.6.. Inerleaved Disconinuous SVPWM Swiching Sequence The inerleaved swiching sequence for he CII opology is illusraed in Figure 4-1. The nine-segmen inerleaved swiching sequence is formed by combining wo fivesegmen sequences where a he inersecion (see he dash-do line in Figure 4-1), he same volage vecor is used. Each 5-segmen sequence includes boh he P-ype and N- ype swiching saes shown in Table 4-4. This combinaion of wo 5-segmen sequences allows he common mode curren deviaion o be minimized by equally disribuing he dwell ime of a given P-ype and N-ype swiching sae over each of he half sampling period. The inerleaved sequence balances he common mode winding volages over one swiching cycle whereas he previous SVPWM mehods balanced over wo swiching cycles. This difference has a significan effec on reducing he common mode curren and winding curren ripples. T / / s T s d y d y 4 d y 4 d x d z d x d x 4 V r4 V r 4 V r y1 z V r 4 V r V r x1 x x y d z V r d y 4 V r y z V r y1 d x 4 V r x1 Figure 4-1: Inerleaved SVPWM swiching sequence The inerleaved swiching sequence is formed by using hree volage vecors, V x, V y, and V z. d x, d y and d z are allocaed dwell imes for he volage vecors of a given riangle (Figure 4-6) wih verex V x, V y and V z, respecively. In he firs half of he swiching cycle, he space vecor volages are applied in he order x 1 -y 1 -z-y -x, and in he second half, he space vecors order is x -y -z-y 1 -x 1. The space vecors x 1 and x wih he same dwell ime of (d x /4) generae he same volage vecor in each inverer leg bu wih an opposie impac on he common mode curren where applicable, and y 1 and y ac similarly. The space vecor z is always produced by configuraion (e) in Figure 3-15 and does no affec he common mode curren. As shown in Table 4-5, he swiching sae (e) can produce a zero volage vecor or a large volage vecor. Swiching sae (e) is used in he inerleaved sequence o produce a zero volage vecor when he modulaion deph is lower han.5, and o generae a large volage vecor when he modulaion deph is larger han.5. This approach ensures ha he common mode winding volage is balanced over each swiching cycle. 69

92 Generally, o minimize harmonic disorion in he oupu volage, he reference vecor is approximaed by he ime averaging of he neares hree vecors, V x, V y, and V z. The hree neares vecors and heir dwell imes can be deermined by finding he riangle where he reference vecor lies in he hexagon [5, 4]. Wih he inerleaved sequence, V ref can be synhesized by he hree neares volage vecors when is ip is locaed in riangles Δ 1, Δ and Δ 4. However, when he ip of V ref is locaed in riangle Δ 3 he number of swiching insances per cycle increases if V ref is synhesized by he neares hree volage vecors in riangle Δ 3. As a resul, he oupu swiching frequency a wice he swiching frequency canno be possible; his condiion is no desirable. Wih he possible swiching saes, in order o mainain he effecive oupu swiching frequency a wice he swiching frequency, he proposed SVPWM mehod approximaes V ref by he wo neares volage vecors in riangle Δ 3 and one large volage vecor in riangles Δ or Δ 4. For example, in Figure 4-6, when he ip of V ref is locaed in riangle Δ 3 o mainain he double frequency characerisic of he inerleaved swiching, he V ref can be approximaed wih he wo neares volage vecors from V 1, V and V 7, and a large volage vecor of V 13 or V 14 or he combinaion of boh hese vecors. To explain his approach in more deail, he CII space volage block diagram in Figure 4-6 is depiced in Figure 4- where V 13 is used as a large volage vecor. Convenionally V ref can be approximaed wih V 1, V and V 7. However, in he new mehod as shown in Figure 4-3, riangle Δ 3 is divided ino wo new riangles of verices V 1, V, V 13 (see Figure 4-3(a) ) and V, V 7, V 13 (see Figure 4-3(b)); V ref can be approximaed wih his new se of volage vecors. V r 15 V r 8 V r 14 V r 9 V r 3 V r Δ 4 V r 7 Δ 3 V r 16 V r 4 V r Δ 1 V r 1 Δ V r 13 V r 1 V r 5 V r 6 V r 17 V r V r V r 1 Figure 4-: CII space vecor diagram using a large volage vecor in 7

93 V r 14 V r 14 V r Δ 4 V r 7 V r Δ 4 V r 7 Δ 3 Δ 3 V r Δ 1 Δ V r Δ 1 Δ V r 1 V r 13 V r 1 V r 13 Figure 4-3: CII space vecor diagram in Secor I using V 13 in (a) riangle of verices V 1, V and V 13 (b) riangle of verices V, V 7, V 13 To find he new dwell imes for he new se of volage vecors, he eliminaed volage vecor in equaion ( 4-8) is approximaed wih new volage vecors. When V ref is approximaed wih V 1, V and V 7, we have r r r r V = d V + d V + d V ) / ( 4-1) ref ( T s T s = d + ( 4-11) 1 + d d3 where d 1, d and d 3 are allocaed dwell imes for he volage vecors V 1, V and V 7, respecively. Now, when V ref is approximaed wih V, V 7 and V 13, V 1 can be calculaed by r r r r V = V + V. ( 4-1) 1 13 V7 Subsiuing equaion ( 4-1) ino ( 4-1) we ge r r r r V = d + d ) V + ( d d ) V + d V ) / T, ( 4-13) ref (( s bu when V ref is approximaed wih V 1, V and V 13, V 7 can be calculaed by r r r r V = V + V. ( 4-14) 7 13 V1 Subsiuing equaion ( 4-14) ino ( 4-1) we obain r r r r V = d + d ) V + ( d d ) V + d V ) / T. ( 4-15) ref (( s Similarly, V ref can be approximaed wih V 1, V and V 14 or V 1, V 7 and V 14. However, here he riangle Δ 3 is divided ino wo new riangles of verices V 1, V, V 14 and V 1, V 7, V 14 as shown in Figure 4-4. If he combinaion of V 13 and V 14 is possible he new space vecor diagram can be illusraed as in Figure 4-5. These hree mehods are compared in more deail in chaper 5. 71

94 V r 15 V r 8 V r 14 V r 9 V r 3 V r Δ 4 V r 7 Δ 3 V r 16 V r 4 V r Δ 1 V r 1 Δ V r 13 V r 1 V r 5 V r 6 V r 17 V r V r V r 1 Figure 4-4: CII space vecor diagram using a large volage vecor in 4 V r 15 V r 8 V r 14 V r 9 V r 3 V r Δ 4 V r 7 Δ 3 V r 16 V r 4 V r Δ 1 V r 1 Δ V r 13 V r 1 V r 5 V r 6 V r 17 V r V r V r 1 Figure 4-5: CII space vecor diagram using combined volage vecors in and Implemenaion of Inerleaved DSVPWM Figure 4-6 o Figure 4-33 show he proposed 9-segmen inerleaved swiching sequence wih corresponding winding and phase volages in secor I for 1,, 3 and 4. By properly selecing he swiching saes, in inerleaved SVPWM, he low-inducance swiching saes of (a), (b), (c) and (d) in Figure 3-15 for a zero volage vecor and he swiching saes of Figure 3-15(f) and Figure 3-15(g) for small volage vecors are eliminaed in all he riangles 1,, 3 and 4. In addiion, in riangles and 4, he swiching saes of Figure 3-15 (i) and Figure 3-15 (j) are also avoided for small volage vecors. However, he eliminaion of hese configuraions in riangles 1 and 3 is unavoidable. 7

95 T / / s T s V r 14 d x 4 d y d y 4 d y 4 d y 4 d z d x d x d z V r4 V r 4 V r y1 z V r 4 V r x x y V r V r V r V r x1 y z y d x 4 V r x1 V r V r Δ1 Δ 4 Δ 3 V r 7 Δ V r 13 V r cmwa V r cmwb V r 1 Secor I- 1 Volage Vecors V r [1 11] x1 V r [1 1 11] y1 V r cmwc V r [1 1 1] z V r [1 1 ] y V r AN V r BN V r CN V r [1 11 ] x V r [1 11 ] x V r [1 1 ] y V r [1 1 1] z V r [1 1 11] y1 V r [1 11] x1 Figure 4-6: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 1F, (Common mode volages are eiher ±V dc ) T / / s T s V r 14 d y d y 4 d y 4 d y 4 d x d z d x d x d z 4 V r4 V r 4 V r y1 z V r 4 V r x x y V r V r V r V r x1 y z y d x 4 V r x1 V r V r Δ1 Δ 4 Δ 3 V r 7 Δ V r 13 V r cmwa V r cmwb V r 1 Secor I- 1 Volage Vecors V r [11 1] x1 V r [11 1 1] y1 V r cmwc V r [1 1 1] z V r y [ 1 1] V r AN V r BN V r CN V r x [ 11 1] V r x [ 11 1] V r y [ 1 1] V r [1 1 1] z V r [11 1 1] y1 V r [11 1] x1 Figure 4-7: DSVPWM: alernaive coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 1E, (Common mode volages are eiher ±V dc ) 73

96 T / / s T s V r 14 d y d y 4 d y 4 d y 4 d x d z d x d x d z 4 V r4 V r 4 V r y1 z V r 4 V r x x y V r V r V r V r x1 y z y d x 4 V r x1 V r V r 1 Δ 4 V r 7 Δ 3 Δ Δ V r 13 V r cmwa V r cmwb V r 1 Secor I- Volage Vecors V r [1 11] x1 V r [1 1] y1 V r cmwc V r [1 1 1] z V r [1 11 1] y V r AN V r BN V r CN V r [1 11 ] x V r [1 11 ] x V r [1 11 1] y V r [1 1 1] z V r [1 1] y1 V r [1 11] x1 Figure 4-8: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I-, (Common mode volages are eiher ±V dc ) T / / s T s V r 14 V r cmwa V r cmwb V r cmwc V r AN V r BN V r CN d y d y 4 d y 4 d x d z d x d x d z d x 4 V r4 V r 4 V r y1 z V r 4 V r x x y V r V r 4 z y V r V r V r V r Δ V r 4 7 Δ x1 y x1 V r 3 Δ1 Δ V r 1 d y 4 Secor I- 3A Volage Vecors V r [1 11] x1 V r [1 1 11] y1 V r [1 1 1] z V r [1 1 ] y V r [1 11 ] x V r [1 11 ] x V r [1 1 ] y V r [1 1 1] z V r [1 1 11] y1 V r [1 11] x1 V r 13 Figure 4-9: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 3A, (Common mode volages are eiher ±V dc ) 74

97 T / / s T s V r 14 V r cmwa V r cmwb V r cmwc V r AN V r BN V r CN d y d y 4 d y 4 d x d z d x d x d z d x 4 V r4 V r 4 V r y1 z V r 4 V r x x y V r V r 4 z y V r V r V r V r Δ V r 4 7 Δ x1 y x1 V r 3 Δ1 Δ V r 1 d y 4 Secor I- 3B Volage Vecors V r [1 11] x1 V r [1 1] y1 V r [1 1 1] z V r [1 11 1] y V r [1 11 ] x V r [1 11 ] x V r [1 11 1] y V r [1 1 1] z V r [1 1] y1 V r [1 11] x1 V r 13 Figure 4-3: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 3B, (Common mode volages are eiher ±V dc ) T / / s T s V r 14 V r cmwa V r cmwb V r cmwc V r AN V r BN V r CN d y d y 4 d y 4 d x d z d x d x d z d x 4 V r4 V r 4 V r y1 z V r 4 V r x x y V r V r 4 z y V r V r V r V r Δ4 Δ 3 x1 x1 y d y 4 V r 1 V r 1 V r 7 Δ Δ Secor I- 3C Volage Vecors V r [11 1] x1 V r [11 1 1] y1 V r [1 1 1] z V r [ 1 1] y V r [ 11 1] x V r [ 11 1] x V r [ 1 1] y V r [1 1 1] z V r [11 1 1] y1 V r [11 1] x1 V r 13 Figure 4-31: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 3C, (Common mode volages are eiher ±V dc ) 75

98 T / / s T s V r 14 V r cmwa V r cmwb V r cmwc V r AN V r BN V r CN d y d y 4 d y 4 d x d z d x d x d z d x 4 V r4 V r 4 V r y1 z V r 4 V r x x y V r V r 4 z y V r V r V r V r Δ 4 Δ x1 y x1 V r 3 Δ1 V r 1 d y 4 V r 7 Δ Secor I- 3D Volage Vecors V r [11 1] x1 V r [1 1] y1 V r [1 1 1] z V r [1 11 1] y V r [ 11 1] x V r [ 11 1] x V r [1 11 1] y V r [1 1 1] z V r [1 1] y1 V r [11 1] x1 V r 13 Figure 4-3: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 3D, (Common mode volages are eiher ±V dc ) T / / s T s V r 14 d y d y 4 d y 4 d y 4 d x d z d x d x d z 4 V r4 V r 4 V r y1 z V r 4 V r x x y V r V r V r V r x1 y z y d x 4 V r x1 V r V r 1 Δ 4 V r 7 Δ 3 Δ Δ V r 13 V r cmwa V r cmwb V r 1 Secor I- 4 Volage Vecors V r [11 1] x1 V r [1 1] y1 V r cmwc V r [1 1 1] z V r [1 11 1] y V r AN V r BN V r CN V r [ 11 1] x V r [ 11 1] x V r [1 11 1] y V r [1 1 1] z V r [1 1] y1 V r [11 1] x1 Figure 4-33: DSVPWM: coupled inducor winding volage and phase volage in each leg based on swiching saes in secor I- 4, (Common mode volages are eiher ±V dc ) 76

99 The swiching sequences in Figure 4-6 o Figure 4-33 indicae he proposed mehod is disconinuous SVPWM over all modulaion indices. In secor I, in riangles Δ 1F, Δ, Δ 3Α and Δ 3Β, disconinuous SVPWM is observed in phase A while in Δ 1E, Δ 3C, Δ 3D and Δ 4, disconinuous SVPWM is observed in phase C. Two inverer legs always have he PWM swiching, and he hird leg is clamped o he P or N poins of he dc rail. The specific areas in riangles 3 and 1 are labeled by A, B, C, D, E and F. When m a is lower han.5, swiching paerns 1E and 1F provide various ypes of disconinuous SVPWMs such as DPWM, DPWM1 and DPWM3 o be applicable for CII opology. Δ 3Α, Δ 3Β, Δ 3C and Δ 3D swiching paerns are provided for when in riangle Δ 3, V ref is approximaed wih he combinaion of he large vecors in riangles Δ and Δ 4. To undersand how he effecive double oupu frequency is achieved by using inerleaved sequence, consider, for example, he winding and phase volages for he swiching saes in riangle 4 over one swiching cycle in Figure Since he oupu volage level in phase A and B changes four imes during he swiching cycle, he swiching frequency of he oupu volage is double he acual swiching frequency. Figure 4-33 also demonsraes ha he average winding volage is balanced over each half cycle, resuling in no ne change in he common mode curren Impac of Swiched Pulse Posiions on Oupu Curren Like he winding curren ripple as menioned in secion 4.5., he oupu curren ripple also depends on he locaion of he pulses in each half swiching cycle. The sequence of he volage vecors (or he posiion of he pulses) wihin he half swiching cycle affecs he harmonic performance of he inverer oupu waveforms as well. Since he load harmonic losses are proporional o he rms value of he ripple curren, minimizing he curren ripple produces lower losses in he load. For example, consider V AN in Figure 4-33 when he duy cycle is 5% for producing V dc and V dc /; he load losses in he wo exreme posiions can differ by up o a facor of 4 [4, 11]. The inerleaved DSVPWM schemes wih placing heir erminal volage pulses closer o he cener of each swiching cycle have a superior harmonic performance compared o hose schemes which do no cener he volage pulses. Overall, when one designs a SVPWM sraegy, a pulse sequence is he imporan facor o reduce he winding and curren ripple, and needs o be considered carefully. 77

100 4.7. Chaper Summary In his chaper, inerleaved SPWM and DPWM1 carrier-based PWM schemes and mulilevel SVPWM schemes are developed for he CII opology. Wih inerleaved carrier-based PWM schemes, he swiching saes in each swiching cycle are chosen by he reference waveform. The unconrolled swiching saes in he carrier-based PWM mehods include low-effecive inducance connecions and will produce a large highfrequency curren ripple in he inducor windings (as shown in chaper 5). However, SVPWM schemes are capable of eliminaing he low-inducance swiching saes. The main advanages of inerleaved carrier-based PWM mehods are ha hey inherenly balance he common mode volage (curren) and provide he oupu PWM waveforms wih he effecive double swiching frequency. In addiion o providing lower swiching losses han hose from coninuous SPWM, disconinuous PWM (DPWM1) generaes mulilevel oupu volages and allows he effecs of coupling beween inverer legs on he common mode curren ripple o be reduced by clamping one of he inverer legs o P or N poins of he DC bus. The mulilevel SVPWM mehods are developed from a very simple algorihm and improved successively. The main significance of using SVPWM is ha he swiching saes generaing a high curren ripple can be eliminaed. The SVPWM swiching sequences were designed o balance he common mode volage. Wih a 5-segmen sequence he common mode volage (curren) is balanced over wo swiching cycles whereas wih an inerleaved 9-segmen sequence, he common mode curren is balanced over one swiching cycle. In addiion o he selecion of swiching saes, he order of he swiching saes (or volage vecors) in a sequence significanly impacs on common mode curren. Based on he mulilevel SVPWM algorihm for he CII opology, original SVPWM, improved SVPWM and inerleaved DSVPWM are developed. Compare o original SVPWM, he improved SVPWM eliminaes all low-inducance swiching saes. The improved SVPWM is also shown ha he winding curren ripple is dependen o no only he selecion of swiching saes wih a high effecive inducance bu also he swiching sequence (or he order of space volage vecors in a swiching period). In inerleaved DSVPWM, mos swiching saes wih a low inducance are omied. The effecive oupu swiching frequency is increased by inerleaved DSVPWM in comparison o he original and improved SVPWMs. In addiion, he inerleaved DSVPWM scheme has he abiliy o 78

101 reduce he swiching losses in he inverer, allowing for higher swiching frequencies. While mulilevel SVPWM schemes increase he complexiy compared o carrier-based PWM schemes, he design flexibiliy of selecing swiching saes and sequences wih SVPWM schemes can improve he performance of he inverer and provide he opimal operaion for his opology. 79

102 Chaper 5 Coupled Inducor Inverer Performance Comparison Using Experimenal and Simulaion Resuls The CII drive performance wih he SPWM, DPWM1 and SVPWM modulaion sraegies are invesigaed by using simulaion resuls and experimenal ess wih a RL load. The operaion of he CII opology wih differen modulaion mehods is examined and he resulan performances are compared. A modulaion scheme which produces lower losses in he coupled inducor and provides he high-qualiy oupu waveforms is idenified. In addiion, he inverer operaion as a variable frequency drive is validaed hrough experimenal ess using a PMSM machine. These observaions allow a comprehensive analysis of wheher he CII opology is a suiable choice for a highperformance drive sysem as is basic feaures sugges Review of PWM Schemes Examined Firs, he operaion of he CII opology wih inerleaved carrier-based PWM modulaions (SPWM and DPWM1) is invesigaed. The superioriy of DPWM1 over SPWM is validaed by comparing he curren ripple waveforms a various modulaion indices, and volage and curren THD graphs. Then DPWM1 is chosen as a reference modulaion scheme o be compared wih he newly developed mulilevel SVPWM based schemes. The hree main mulilevel SVPWM sraegies explained in Chaper 4 are invesigaed: (1) he original SVPWM, () he improved SVPWM, and (3) he inerleaved disconinuous SVPWM (DSVPWM). These mehods show he incremenal improvemen in inverer performance including he magniude of he winding curren ripple and he qualiy of oupu waveforms. The laer refers o he low-harmonic conen waveforms wih he abiliy o ransfer he firs harmonic PWM o a higher swiching frequency by increasing he effecive swiching frequency. The original SVPWM shows he effeciveness of he mulilevel SVPWM sraegy in eliminaing he swiching saes which produce he high winding curren ripple. The original SVPWM resuls are compared wih hose from DPWM1, demonsraing he 8

103 possibiliy of reducing he coupled inducor losses by lowering he winding curren ripple. The improved SVPWM demonsraes he operaion of he CII circui wih selecion of all high-effecive inducance swiching saes. The lower winding curren ripple significanly improves he performance, especially a low-modulaion dephs, bu he qualiy of oupu curren waveforms is sill less han ha of DPWM1. By lowering inverer losses, he inerleaved DSVPWM is presened as he mos efficien mehod. The DSVPWM sraegy is used o perform DSVPWM, DSVPWM1 and DSVPWM3 modulaion schemes wih SVPWM. These modulaions are compared a low-modulaion indices. The DSVPWM1 shows a beer performance for a uniy-powerfacor load by addiionally lowering he winding curren ripple and swiching losses when a 6 disconinuous period occurs a he posiive and negaive volage peaks. The DSVPWM1 harmonic specra of he volage and curren are compared o hose of DPWM1. The superioriy of DSVPWM is explored by using he experimenal loss measuremens. The DSVPWM modulaion scheme is inroduced as a modulaion scheme ha can be used for drives applicaions. The closed loop performance of he CII opology wih DSVPWM is accomplished wih a series of experimenal ess using a PMSM. The closed loop speed and power conrol are implemened wih his drive opology. The resuls explore he effeciveness of he CII srucure and validae he fas-response operaion of he coupled inducor inverer using he DSVPWM conrol. 5.. Experimenal Se-up In order o validae he proposed approach, he invesigaed PWM modulaion algorihms are implemened using a TI TMS3F81 DSP, and experimenal ess were carried ou using he small-power converer sysem illusraed in Figure 5-1, wih he following parameers: V DC = 3 V, I pk = 1 A, f c =15kHz swiching frequency, he spliwound coupled inducor magneizing inducance (L ) = 4.7 mh. An LC filer is used a he oupu of he inverer before where he load is conneced. The values of he dela-conneced filer capaciors are 5 uf, and hose of he Y-conneced filer inducances are 1 mh. The maximum load curren is obained when he load resisance was 15.65Ω. Mos of he compuaion for mulilevel SVPWM sraegies is done offline and abulaed as PWM-swiching look-up ables, so ha on-line compuaion is minimized. Compared o he SPWM and DPWM1 algorihms, he SVPWM algorihms 81

104 are more compuaionally complex bu also more flexible for selecing he swiching saes and sequences. Figure 5-1: Experimenal se-up of he CII inverer wih combined hree limb core, inerface boards and a TI DSP conroller 5.3. Simulaions Se-up The operaion of he CII opology wih he SPWM, DPWM1 and SVPWM sraegies is simulaed in Simulink as shown Figure 5-. The ess are carried for a range of modulaion indices, m a, by using an inverer wih 3V DC link volage and 15 khz swiching frequency, driving a 15 Ω;1 mh 3-phase load wih he fundamenal frequency of 6Hz. Figure 5-: Simulaion block diagram of he CII opology To achieve a Simulink model, hree spli-wound inducors are considered wih a oal of six windings ha need coupling for he ineracion of he hree phases in he hree-limb 8