AUTOMOTIVE GRADE. Max. I T C = 25 C Continuous Drain Current, V 10V (Silicon Limited)

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1 Features Logic Level Advanced Process Technology Ultra Low On-Resistance 175 C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * AUTOMOTIVE GRADE G PD HEXFET Power MOSFET D S V (BR)DSS R DS(on) max. I D (Silicon Limited) I D (Package Limited) 55V 13.5mΩ 60A 42A Description Specifically designed for Automotive applications, this HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low onresistance per silicon area. Additional features of this design are a 175 C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. D S G D-Pak G D S Gate Drain Source Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (T A ) is 25 C, unless otherwise specified. Parameter Max. Units I T C = 25 C Continuous Drain Current, V V (Silicon Limited) 60 I T C = 0 C Continuous Drain Current, V V 43 A I T C = 25 C Continuous Drain Current, V V (Package Limited) 42 I DM Pulsed Drain Current c 240 P C = 25 C Power Dissipation 1 W Linear Derating Factor 0.72 W/ C V GS Gate-to-Source Voltage ± 16 V E AS Single Pulse Avalanche Energy (Thermally Limited) d 57 mj E AS (tested ) Single Pulse Avalanche Energy Tested Value h 85 I AR Avalanche Currentc See Fig.12a, 12b, 15, 16 A E AR Repetitive Avalanche Energy g mj T J Operating Junction and -55 to 175 T STG Storage Temperature Range C Soldering Temperature, for seconds (1.6mm from case ) Mounting Torque, 6-32 or M3 screw Thermal Resistance 300 lbfyin (1.1Nym) Parameter Typ. Max. Units R θjc Junction-to-Case j 1.38 R θja Junction-to-Ambient (PCB mount) i 40 C/W R θja Junction-to-Ambient 1 HEXFET is a registered trademark of International Rectifier. *Qualification standards can be found at /28/20

2 Static Electrical T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units V (BR)DSS Drain-to-Source Breakdown Voltage 55 V V (BR)DSS / T J Breakdown Voltage Temp. Coefficient V/ C R DS(on) Static Drain-to-Source On-Resistance mω 20 mω 22.5 mω V GS(th) Gate Threshold Voltage V gfs Forward Transconductance 25 S I DSS Drain-to-Source Leakage Current 20 µa 250 I GSS Gate-to-Source Forward Leakage 200 na Gate-to-Source Reverse Leakage -200 Dynamic Electrical T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions Q g Total Gate Charge I D = 36A Q gs Gate-to-Source Charge 8.5 nc V DS = 44V Q gd Gate-to-Drain ("Miller") Charge 12 V GS = 5.0V e t d(on) Turn-On Delay Time 14 V DD = 28V t r Rise Time 130 I D = 36A t d(off) Turn-Off Delay Time 24 ns R G = 15 Ω t f Fall Time 33 V GS = 5.0V e L D Internal Drain Inductance 4.5 Between lead, nh 6mm (0.25in.) L S Internal Source Inductance 7.5 from package C iss Input Capacitance 1570 C oss Output Capacitance 230 C rss Reverse Transfer Capacitance 130 pf C oss Output Capacitance 840 C oss Output Capacitance 180 C oss eff. Effective Output Capacitance 290 Diode Characteristics Parameter Min. Typ. Max. Units I S Continuous Source Current 42 Conditions V GS = 0V, I D = 250µA Reference to 25 C, I D = 1mA V GS = V, I D = 36A e V GS = 5.0V, I D = 30A e V GS = 4.5V, I D = 15A e V DS = V GS, I D = 250µA V DS = 25V, I D = 36A V DS = 55V, V GS = 0V V DS = 55V, V GS = 0V, T J = 125 C V GS = 16V V GS = -16V and center of die contact S V GS = 0V V DS = 25V ƒ = 1.0MHz V GS = 0V, V DS = 1.0V, ƒ = 1.0MHz V GS = 0V, V DS = 44V, ƒ = 1.0MHz V GS = 0V, V DS = 0V to 44V f Conditions MOSFET symbol (Body Diode) A showing the I SM Pulsed Source Current 240 integral reverse (Body Diode)Ãc p-n junction diode. V SD Diode Forward Voltage 1.3 V T J = 25 C, I S = 36A, V GS = 0V e t rr Reverse Recovery Time ns T J = 25 C, I F = 36A, V DD = 28V Q rr Reverse Recovery Charge nc di/dt = 0A/µs e t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LSLD) G D Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Limited by T Jmax, starting T J = 25 C, L = 0.089mH R G = 25Ω, I AS = 36A, V GS =V. Part not recommended for use above this value. ƒ Pulse width 1.0ms; duty cycle 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. Limited by T Jmax, see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population, starting T J = 25 C, L = 0.089mH, R G = 25Ω, I AS = 36A, V GS =V. When mounted on 1" square PCB (FR-4 or G- Material). For recommended footprint and soldering techniques refer to application note #AN-994. ˆ R θ is measured at T J approximately 90 C. 2

3 Qualification Information Automotive (per AEC-Q1) Qualification Level Comments: This part number(s) passed Automotive qualification. IR s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. Moisture Sensitivity Level ESD RoHS Compliant Machine Model Human Body Model Charged Device Model D-PAK MSL1 Class M2 (200V) AEC-Q1-002 Class H1B (00V) AEC-Q1-001 Class C5 (1125V) AEC-Q1-005 Yes Qualification standards can be found at International Rectifier s web site: http// Exceptions to AEC-Q1 requirements are noted in the qualification report. 3

4 I D, Drain-to-Source Current (Α) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) Gfs, Forward Transconductance (S) 00 0 VGS TOP V 9.0V 7.0V 5.0V 4.5V 4.0V 3.5V BOTTOM 3.0V 00 0 VGS TOP V 9.0V 7.0V 5.0V 4.5V 4.0V 3.5V BOTTOM 3.0V 3.0V 1 3.0V 60µs PULSE WIDTH Tj = 25 C V DS, Drain-to-Source Voltage (V) 1 60µs PULSE WIDTH Tj = 175 C V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics T J = 25 C 50 T J = 175 C 0.0 T J = 175 C T J = 25 C.0 20 V DS = V 60µs PULSE WIDTH V GS, Gate-to-Source Voltage (V) 0 V DS = 8.0V 380µs PULSE WIDTH I D, Drain-to-Source Current (A) Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance Vs. Drain Current 4

5 I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) V GS = 0V, f = 1 MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd Ciss 12 8 I D = 36A V DS = 44V VDS= 28V VDS= 11V Coss Crss 1 0 V DS, Drain-to-Source Voltage (V) Q G Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage OPERATION IN THIS AREA LIMITED BY R DS (on) 0.0 T J = 175 C 0.0 T J = 25 C 1.0 V GS = 0V V SD, Source-to-Drain Voltage (V) Tc = 25 C Tj = 175 C Single Pulse 0µsec 1msec msec V DS, Drain-toSource Voltage (V) nce Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 5

6 I D, Drain Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) LIMITED BY PACKAGE 2.0 I D = 30A V GS = 5.0V T C, Case Temperature ( C) T J, Junction Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig. Normalized On-Resistance Vs. Temperature 1 D = 0.50 Thermal Response ( Z thjc ) SINGLE PULSE ( THERMAL RESPONSE ) R 1 R 2 R 1 R 2 τ J τ J τ 1 τ τ 2 1 τ 2 Ci= τi/ri Ci i Ri E-006 1E t 1, Rectangular Pulse Duration (sec) τ C τ Ri ( C/W) τi (sec) Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc Tc Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 6

7 V GS(th) Gate threshold Voltage (V) E AS, Single Pulse Avalanche Energy (mj) 15V 240 V DS L DRIVER 200 I D TOP 36A 6.2A BOTTOM 4.3A R G 20V V GS tp D.U.T IAS 0.01Ω - V DD A Fig 12a. Unclamped Inductive Test Circuit 40 V (BR)DSS tp Starting T J, Junction Temperature ( C) I AS Fig 12b. Unclamped Inductive Waveforms Fig 12c. Maximum Avalanche Energy Vs. Drain Current V Q G Q GS Q GD V G 3.0 Charge 2.5 Fig 13a. Basic Gate Charge Waveform 2.0 I D = 250µA Current Regulator Same Type as D.U.T KΩ 12V.2µF.3µF D.U.T. V - DS V GS T J, Temperature ( C ) 3mA I G I D Current Sampling Resistors Fig 14. Threshold Voltage Vs. Temperature Fig 13b. Gate Charge Test Circuit 7

8 Avalanche Current (A) E AR, Avalanche Energy (mj) 00 Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25 C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax E E E E E-02 tav (sec) Fig 15. Typical Avalanche Current Vs.Pulsewidth TOP Single Pulse BOTTOM 1% Duty Cycle I D = 36A Starting T J, Junction Temperature ( C) Notes on Repetitive Avalanche Curves, Figures 15, 16: (For further info, see AN-05 at 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 15, 16). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f Z thjc (D, t av ) = Transient thermal resistance, see figure 11) P D (ave) = 1/2 ( 1.3 BV I av ) = DT/ Z thjc I av = 2DT/ [1.3 BV Z th ] E AS (AR) = P D (ave) t av Fig 16. Maximum Avalanche Energy Vs. Temperature 8

9 - D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =V V DD * R G dv/dt controlled by RG V DD Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs V DS R D R G V GS D.U.T. - V DD V Pulse Width 1 µs Duty Factor 0.1 % Fig 18a. Switching Time Test Circuit V DS 90% % V GS t d(on) t r t d(off) t f Fig 18b. Switching Time Waveforms 9

10 D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak Part Marking Information Part Number IR Logo AULR2905Z YWWA XX or XX Date Code Y= Year WW= Work Week A= Automotive, LeadFree Lot Code Note: For the most current drawing please refer to IR website at

11 D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR TRL 16.3 (.641 ) 15.7 (.619 ) 16.3 (.641 ) 15.7 (.619 ) 12.1 (.476 ) 11.9 (.469 ) FEED DIRECTION 8.1 (.318 ) 7.9 (.312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA INCH NOTES : 1. OUTLINE CONFORMS TO EIA mm 11

12 Ordering Information Base part number Package Type Standard Pack Complete Part Number Form Quantity Dpak Tube 75 Tape and Reel 2000 TR Tape and Reel Left 3000 TRL Tape and Reel Right 3000 TRR 12

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