CADET SOFTWARE ENGINEERS

Transcription

1 Psitin Highlights Highly cmpetitive cmpensatin package. Be a part f strng innvative team. Patent Incentive Prgram. Stck Optin Grant Signing and Retentin Bnus. CADET SOFTWARE ENGINEERS Psitin Summary The Cadet Sftware Engineer shall design, develp, debug and maintain the firmware / sftware prgrams t prvide innvative slid state drive prducts and slutins. The Cadet Sftware Engineer shall design and evaluate prgrams accrding t standards and new technlgies. Duties & Respnsibilities: Design and develp sftware /firmware prgrams accrding t specificatins. Create design dcumentatins, user manuals and prgramming references required by a sftware / firmware applicatin. Cnduct verificatin and regressin testing using existing r custm hardware and sftware platfrms. Wrk with crss functinal teams t track prgress versus schedules and milestnes. Perfrm ther related duties that may be required frm time t time. Jb Requirements: Educatin Graduate f BS ECE, Cmputer Science, Cmputer Engineering, Electrical Engineering, Applied Physics r any related curse. Math majrs als highly encuraged t apply. Newly graduate t ne (1) year experience frm a sftware develpment r similar envirnment. UI/UX experience wuld be interesting as well as prven hbby f wrking with embedded platfrms (Jetsn TX2 / TX1 and the like). Knwledgeable in Pythn, PhP r C/C++ prgramming languages AI / ML interest r hbbies a plus but nt required. Rest Architecture als a plus but nt required. Must have high integrity, a desire t advance his/her career thrugh hard wrk and great effrt, and an interest t learn the business f the cmpany. Must be a self-starter, have high energy and pssess a can-d attitude. Individuals wh run t criticism withut fear and wh seek fr cnstant cntinual imprvement thrugh creativity and prcedure will be successful in this psitin. Must be willing t start wrk at 6AM PH time.

2 Psitin Highlights Highly cmpetitive cmpensatin package. Be a part f strng innvative team. Patent Incentive Prgram. Stck Optin Grant Signing and Retentin Bnus. ASSOCIATE SOFTWARE ENGINEERS Psitin Summary The Assciate Engineer shall design, develp, debug and maintain the firmware / sftware prgrams t prvide innvative slid state drive prducts and slutins. The Assciate Engineer shall design and evaluate prgrams accrding t standards and new technlgies. Duties & Respnsibilities: Design and develp sftware /firmware prgrams accrding t specificatins. Create design dcumentatins, user manuals and prgramming references required by a sftware / firmware applicatin. Cnduct verificatin and regressin testing using existing r custm hardware and sftware platfrms. Wrk with crss functinal teams t track prgress versus schedules and milestnes. Perfrm ther related duties that may be required frm time t time. Jb Requirements: Educatin Graduate f BS ECE, Cmputer Science, Cmputer Engineering, Electrical Engineering, Applied Physics r any related curse. Math majrs are als encuraged t apply. Minimum ne (1) year experience in Pythn, PhP and r C/C++ prgramming language frm a sftware develpment r similar envirnment. UI/UX experience wuld be interesting as well as prven hbby f wrking with embedded platfrms (Jetsn TX2 / TX1 and the like). Knwledgeable in prgramming and sftware develpment life cycle. AI / ML interest r hbbies a plus but nt required. Rest architecture als a plus but nt required. Individuals wh run t criticism withut fear and wh seek cnstant cntinual imprvement thrugh creativity and prcedure will be successful in this psitin. Must have high integrity, a desire t advance his/her career thrugh hard wrk and great effrt, and an interest t learn the business f the cmpany. Must be a self-starter, have high energy and pssess a can-d attitude. Must be willing t start wrk at 6AM PH time.

3 SENIOR FIRMWARE ENGINEER POSITION HIGHLIGHTS Highly cmpetitive cmpensatin package based n experience. Be a part f strng innvative team. Patent Incentive Prgram. Stck Optin Grant Signing and Retentin Bnus. POSITION SUMMARY The Senir Firmware Design Engineer shall act as lead and shall wrk clsely with internal firmware develpers in creating design plans, specificatins and dcumentatin. The Senir Firmware Design Engineer shall directly reprt t the Directr f Advanced Sftware Grup - Engineering Department. DUTIES & RESPONSIBILITIES Ensure that the design activities are crdinated per develpment prcedure. Create and maintain prject schedules. Develp high level and detailed design, test plans and reprts. Evaluate, test and review firmware designs. Maintain an accurate dcumentatin thrugh the develpment prcess. Participate and cnduct team meetings and knwledge sharing sessins. Develp, cmmunicate and dcument designs/prject strategies and plans. Perfrm ther related duties that may be required frm time t time. QUALIFICATIONS Educatin BS in Cmputer Engineering, Cmputer Science, Electrnics and Cmmunicatins Engineering r any equivalent study. Minimum f six (6) years experience in C and Assembly language and minimum f three (3) years experience in firmware algrithm and ptimizatin. in flash device firmware algrithm. Technlgy prduct design experience, including architechting prduct specificatins. Key enabler f cutting edge technlgies related t slid state drives (SSDs), strage systems, and/r cnnectivity devices (e.g. Thunderblt / USB devices). Strng backgrund in firmware cde develpment, debugging and dcumentatin. Prven ability in mathematical prblem slving. Excellent aptitude in understanding technical specificatins such as NVMe, Fibre Channel, Flash device, SCSI and ATA prtcls, and applicatins n different types f 32bit micrprcessr / micrcntrller. Willing t be assigned and take respnsibility fr multiple tasks in multiple prject develpment. Open and cllabrativel; cmfrtable wrking in an envirnment where ideas are shared and challenged. Strng written and ral cmmunicatin skills. Able t handle multiple tasks, meet deadlines and wrk effectively with thers. Must have high integrity, a desire t advance his/her career thrugh hard wrk and great effrt, and an interest t learn the business f the cmpany.

4 Must be a self-starter, have high energy and pssess a can-d attitude. Individuals wh run t criticism withut fear and wh seek cnstant cntinual imprvement thrugh creativity and prcedure will be successful in this psitin. Must be willing t start wrk at 6AM PH time. SENIOR SOFTWARE ENGINEER POSITION HIGHLIGHTS Highly cmpetitive cmpensatin package based n experience. Be a part f strng innvative team. Patent Incentive Prgram. Stck Optin Grant Signing and Retentin Bnus. POSITION SUMMARY The Sftware Engineer shall design, cde, test, implement, debug and maintain the sftware develpment prjects. He/She shall be wrking with ther sftware engineers and web develpers. The Sftware Engineer shall directly reprt t Advanced Sftware Manager. DUTIES & RESPONSIBILITIES The Sftware Engineer will be the technical subject matter expert in sftware develpment prjects. He/she will design, implement and maintain the features based n requirements. He/she will als be wrking with ther sftware and web engineers fr prject develpment. Perfrm ther related duties that may be assigned frm time t time. QUALIFICATIONS Educatin Graduate f B.S. Cmputer Science, B.S. Cmputer Engineering r curses related t Sftware/Web prgramming. At least six (6) years wrking experience in related field. in sftware applicatin develpment (design and implementatin) in Windws and Linux. Familiarity with the fllwing shall be cnsidered an advantage: Strage technlgies Driver r kernel-level develpment I/O and IOCTL prcessing SCSI, ATA, NVME prtcls Opal / TCG r data encryptin technlgy Web prgramming GUI layut design n the fllwing shall be cnsidered an advantage: Qt IDE GUI layut design Netwrk and desktp / server set-up Cde review and ptimizatin Well updated with latest strage technlgies.

5 Ability t identify and reslve sftware issues Knwledgeable in C/C++, Java, Pythn and bject riented prgramming cncepts. Knwledgeable in Linux and Windws sftware develpment. Knwledgeable in driver develpment. Knwledgeable in kernel develpment. Must have high integrity, a desire t advance his/her career thrugh hard wrk and great effrt, and an interest t learn the business f the cmpany. Must be a self-starter, have high energy and pssess a can-d attitude. Individuals wh run t criticism withut fear and wh seek fr cnstant cntinual imprvement thrugh creativity and prcedure will be successful in this psitin. Must be willing t start wrk at 6AM PH time. SENIOR CIRCUIT DESIGN ENGINEER POSITION HIGHLIGHTS Highly cmpetitive cmpensatin package based n experience. Be a part f strng innvative team. Patent Incentive Prgram. Stck Optin Grant Signing and Retentin Bnus. POSITION SUMMARY The Senir Circuit Design Engineer shall design and develp high-speed circuits applying the knwledge in analg and digital design, participate in the initial planning stage f new prducts, and perfrm prjectlevel mnitring and cntrl activities. The Senir Circuit Engineer shall reprt directly t the Advanced Hardware Grup - Circuit Manager and shall wrk clsely with ther engineering teams in the implementatin f prject specificatins, features and requirements. DUTIES & RESPONSIBILITIES Perfrm signal integrity pre-simulatin. Lead the prttyping, debugging and creating f test plan activities. Wrk clsely with cmpnent engineers in the creatin f part type, decals and lay-ut. Cnduct cmpnent selectin and functinal verificatin. Create Bill f Materials (BOM) fr a specific prject including its maintenance. Verify and review schematics, specificatins and standards. Prepare, analyze and present varius technical reprts related t hardware - circuit engineering. Prvide the needed supprt in Enterprise Resurce Planning (ERP) specifically in Material Management area by ffering suggestin and inputs t enhance the prcess. Liaise with suppliers and vendrs n technical matters and issues. Perfrm ther functins deemed necessary t supprt the wrk f the department.

6 QUALIFICATIONS Educatin Bachelr's degree in Electrnics and Cmmunicatins Engineering r any equivalent study. Prven ability in circuit design, prttyping, signal integrity simulatin, lay-uting, timing cnstraints, impedance cntrl and crss talk with understanding f electrical prperties. Strng analytical, prblem-slving and leadership skills. Minimum five (5) years circuit experience and three (3) years supervisry experience in circuit wrk envirnment. in Mentr Graphics PADS, Mentr Graphics Lgic, Cadence Allegr PCB Editr, Cadence Allegr Design Entry HDL, OrCAD, and HyperLinx Signal integrity and EMI cmpliance simulatin experience. in library maintenance is an advantage. Familiarity with different hard disk drive interfaces: PATA, SATA, SCSI, SAS, FC and ther prduct lines like NVMe and PCIe. Familiarity with IPC, JEDEC, RHS and ISO standards. Familiarity with different PCI standards and electrmechanical specificatins. Self-mtivated and able t wrk independently with minimal supervisin. Able t handle multiple tasks, meet deadlines and wrk effectively with thers. Must have high integrity, a desire t advance his/her career thrugh hard wrk and great effrt, and an interest t learn the business f the cmpany. Must be a self-starter, have high energy and pssess a can-d attitude. Individuals wh run t criticism withut fear and wh seek cnstant cntinual imprvement thrugh creativity and prcedure will be successful in this psitin. Must be willing t start wrk at 6AM PH time.