STU/D10L01. N-Channel Enhancement Mode Field Effect Transistor
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1 Green Product STU/DL SamHop Microelectronics C orp. N-Channel Enhancement Mode Field Effect Transistor PRODUCT SUMMRY VDSS ID RDS(ON) (mω) Max V VGS=V FETURES Super high dense cell design for low RDS(ON). Rugged and reliable. TO-5 and TO-5 Package. G S G D S STU SERIES TO - 5(D- PK ) STD SERIES TO - 5( I - PK ) BSOLUTE MXIMUM RTINGS (T =5 C unless otherwise noted) Symbol V DS V GS I D I DM E S P D T J, T STG Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous -Pulsed b Single Pulse valanche Energy d Maximum Power Dissipation Operating Junction and Storage Temperature Range a a T C =5 C T C =7 C T C =5 C T C =7 C Limit Units V ± V 9 mj 5 W 3 W -55 to 5 C THERML CHRCTERISTICS R JC a Thermal Resistance, Junction-to-Case.5 C/W R J a Thermal Resistance, Junction-to-mbient 5 C/W Details are subject to change without notice. Dec,9,
2 STU/DL ELECTRICL CHRCTERISTICS (T=5 C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units OFF CHRCTERISTICS BVDSS Drain-Source Breakdown Voltage VGS=V, ID=5u V IDSS Zero Gate Voltage Drain Current VDS=V, VGS=V u IGSS Gate-Body Leakage Current VGS= ±V, VDS=V ± n ON CHRCTERISTICS VGS(th) RDS(ON) g FS Gate Threshold Voltage Drain-Source On-State Resistance Forward Transconductance VDS=VGS, ID=5u VGS=V, ID=5 VDS=V, ID= V m ohm S c DYNMIC CHRCTERISTICS CISS Input Capacitance 3 pf VDS=5V,VGS=V COSS Output Capacitance 35 pf f=.mhz CRSS Reverse Transfer Capacitance pf SWITCHING CHRCTERISTICS td(on) Turn-On Delay Time tr Rise Time td(off) tf Fall Time Qg Qgs Qgd Turn-Off Delay Time Total Gate Charge Gate-Source Charge Gate-Drain Charge c VDD=5V ID= VGS=V RGEN= 6 ohm VDS=5V,ID=5,VGS=V VDS=5V,ID=5, VGS=V ns ns ns ns nc nc nc DRIN-SOURCE DIODE CHRCTERISTICS ND MXIMUM RTINGS VSD Diode Forward Voltage VGS=V,IS=.75.3 V Notes a.surface Mounted on FR4 Board,t < _ sec. b.pulse Test:Pulse Width < _ 3us, Duty Cycle < _ %. c.guaranteed by design, not subject to production testing. d.starting TJ=5 C,L=.5mH,VDD = 5V.(See Figure3) Dec,9,
3 STU/DL ID, Drain Current() 6 4 VGS=V VGS=6V VGS=5V VGS=4V VGS=3V ID, Drain Current() 6 4 Tj=5 C 5 C -55 C VDS, Drain-to-Source Voltage(V) Figure. Output Characteristics VGS, Gate-to-Source Voltage(V) Figure. Transfer Characteristics 36.5 RDS(on)(m Ω) V GS=V RDS(on), On-Resistance Normalized V GS=V ID= Tj( C ) ID, Drain Current() Tj, Junction Temperature( C ) Figure 3. On-Resistance vs. Drain Current and Gate Voltage Figure 4. On-Resistance Variation with Drain Current and Temperature Vth, Normalized Gate-Source Threshold Voltage V DS=V GS ID=5u 5 5 BVDSS, Normalized Drain-Source Breakdown Voltage ID=5u Tj, Junction Temperature( C ) Tj, Junction Temperature( C ) Figure 5. Gate Threshold Variation with Temperature Figure 6. Breakdown Voltage Variation with Temperature 3 Dec,9,
4 STU/DL 6. RDS(on)(m Ω) ID=5 5 C 75 C 5 C Is, Source-drain current() C 5 C 5 C 4 6 VGS, Gate-to-Source Voltage(V) Figure 7. On-Resistance vs. Gate-Source Voltage VSD, Body Diode Forward Voltage(V) Figure. Body Diode Forward Voltage Variation with Source Current C, Capacitance(pF) Crss Coss Ciss VGS, Gate to Source Voltage(V) 6 4 VDS=5V ID= VDS, Drain-to-Source Voltage(V) Qg, Total Gate Charge(nC) Figure 9. Capacitance Figure. Gate Charge Switching Time(ns) TD(off ) TD(on) VDS=5V,ID= VGS=V. Tf Tr ID, Drain Current() R DS(ON) Limit ms DC VGS=V Single Pulse T=5 C.. ms us Rg, Gate Resistance(Ω) VDS, Drain-Source Voltage(V) Figure. switching characteristics Figure. Maximum Safe Operating rea Dec,9, 4
5 STU/DL tp V(BR )DSS V DS L R G V tp D.U.T IS. + - V DD IS Unclamped Inductive Test Circuit Figure 3a. Unclamped Inductive Waveforms Figure 3b. D=.5 Normalized Transient Thermal Resistance R J (t)=r (t) * R J. R J=S ee Datasheet SINGLE PULSE 3. T JM-T =PDM* R J (t) 4. Duty Cycle, D=t/t P DM t t Square Wave Pulse Duration(sec) Figure 4. Normalized Thermal Transient Impedance Curve 5 Dec,9,
6 STU/DL PCKGE OUTLINE DIMENSIONS TO-5 E E C L D E D D H B 3 L L B D3 P B SYMBOL MILLIMETERS INCHES MIN MX MIN MX B.4. B.65.5 B.5.9 C.4.6 D D D D3 7.. H E E E L.3.7 L.4. L.5.9 P BSC.9 BSC 6 Dec,9,
7 STU/DL L3 E b C TO-5 D E D H L4 3 DETIL "" b e b L L L DETIL "" SYMBOLS MILLIMETERS MIN MX MIN INCHES MX b b b C D D E E e.9 REF.9 BSC H L L.743 REF.. REF. L.5 REF.. REF. L L REF. 7 REF. 7 Dec,9,
8 STU/DL TO-5 Tube TO-5 Tube/TO-5 Tape and Reel Data ~ " " TO-5 Carrier Tape P T D P B E E K D P FEED DIRECTION UNIT: PCKGE TO-5 (6 B K D D E E E P P P T TO-5 Reel T M N E S G K V R H W UNIT: TPE SIZE 6 REEL SIZE 33 M N W T H K S G R V Dec,9,
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Dual Enhancement Mode Field Effect Traistor (N and P Channel) PRELIMINRY FETURES 3, 4, R DS(ON) = mω @ GS =. -3, -33, R DS(ON) = 7mΩ @ GS = -. Super high dee cell design for extremely low R DS(ON). D D
More informationFeatures. Order code V DS R DS(on) max I D P TOT. Description. Table 1. Device summary. Order code Marking Packages Packaging
N-channel 2 V,.25 Ω typ., 2.3 A STripFET H5 Power MOSFET in a SOT-23 package Features Datasheet production data Order code V DS R DS(on) max I D P TOT 3 STR2N2VH5 2 V.3 Ω (V GS =4.5 V) 2.3 A.35 W 1 SOT-23
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N-Channel Trench Power MOSFET General Description The EZ8590 is N-channel MOS Field Effect Transistor designed for high current switching applications. Rugged EAS capability and ultra low R DS(ON) is suitable
More informationSchematic diagram R DS(ON) < V GS =10V. Marking and pin assignment Uninterruptible power supply
FNK N-Channel Enhancement Mode Power MOSFET Description The FNK 85H21 uses advanced trench technology and design to provide excellent R DS(ON) with low gate charge. It can be used in automotive applications
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DESCRIPTION The SPN80T06 is the N-Channel logic enhancement mode power field effect transistor which is produced using super high cell density DMOS trench technology. This high density process is especially
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DESCRIPTION The SPN180T10 is the N-Channel enhancement mode power field effect transistor which is produced using super high cell density DMOS trench technology. This high density process is especially
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DESCRIPTION The is the N-Channel logic enhancement mode power field effect transistor is produced using high cell density. Advanced trench technology to provide excellent RDS(ON). This high density process
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PD-90712C POWER MOSFET THRU-HOLE (TO-254) IRFM360 400V, N-CHNNEL HEXFET MOSFET TECHNOLOGY Product Summary Part Number RDS(on) ID IRFM360 0.20 Ω 23 HEXFET MOSFET technology is the key to International Rectifier
More informationSymbol Parameter TSB20N60S TSP20N60S TSF20N60S Unit 20* 20* I D -Continuous (TC = 100 ) 12*
TSP20N60S,TSF20N60S, TSB20N60S 600V N-Channel MOSFET Description SJ-FET is new generation of high voltage MOSFET family that is utilizing an advanced charge balance mechanism for outstanding low on-resistance
More informationCEM4279 FEATURES. ABSOLUTE MAXIMUM RATINGS T A = 25 C unless otherwise noted. Thermal Characteristics
Dual Enhancement Mode Field Effect Traistor (N and P Channel) FETURES,., R DS(ON) = mω @ GS =. R DS(ON) = mω @ GS =.. -, -., R DS(ON) = mω @ GS = -. R DS(ON) = mω @ GS = -.. Super high dee cell design
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General Description ELM66EA-S uses advanced trench technology to provide excellent Rds(on) and low gate charge. Maximum Absolute Ratings ELM66EA-S N-channel P-channel Vds=V Vds=-V Id=3.A(Vgs=.V) Id=-.A(Vgs=-.V)
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Dual Enhancement Mode Field Effect Traistor (N and P Channel) FETURES,., R DS(ON) = mω @ GS = 1. R DS(ON) = 7mΩ @ GS =.. -, -3., R DS(ON) = 1mΩ @ GS = -1. R DS(ON) = 1mΩ @ GS = -.. Super high dee cell
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FEATURES 1% EAS Test Super high density cell design Extremely Low Intrinsic Capacitances Remarkable Switching Characteristics Extended Safe Operating Area Lower R DS(ON) : 6. mω (Typ.) @ =1V 15V N-Channel
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Dual P-Channel Enhancement Mode Field Effect Traistor PRELIMINRY FETURES -, -5., R DS(ON) = mω @ GS = -. R DS(ON) = mω @ GS = -.5. Super high dee cell design for extremely low R DS(ON). High power and
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More informationTaiwan Goodark Technology Co.,Ltd TGD01P30
TGD P-Channel Enhancement Mode Power MOSFET Description The uses advanced trench technology and design to provide excellent R DS(ON) with low gate charge. It can be used in a wide variety of applications.
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Dual Enhancement Mode Field Effect Traistor (N and P Channel) CEM299 FETURES 2, 6., R DS(ON) = mω @ GS =.. R DS(ON) = mω @ GS = 2.. -2, -.8, R DS(ON) = mω @ GS = -.. R DS(ON) = 9mΩ @ GS = -2.. Super high
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DESCRIPTION The SPN4842 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
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More informationTaiwan Goodark Technology Co.,Ltd TGD0103M
TGD N-Channel Enhancement Mode Power MOSFET Description The uses advanced trench technology and design to provide excellent R DS(ON) with low gate charge. It can be used in a wide variety of applications.
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General Description This Power MOSFET is produced Features using Maple semi s Advanced Super-Junction technology. - 7.6A, 500V, R DS(on) typ. = 0.5Ω@ = 10 V This advanced technology has been especially
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DESCRIPTION The is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to
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