WFF5N60B Product Description Silicon N-Channel MOSFET
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1 Features Ultra-low Gate charge(typical 5nC) Fast Switching Capability 00%Avalanche Tested Maximum Junction Temperature Range(50 ) General Description This Power MOSFET is produced using Winsemi's advanced planar stripe,vdmos technology.this latest technology has been especially designed to minimize on-state resistance, have a high rugged avalanche \ characteristics.this devices is specially well suited for half bridge and full bridge resonant topology line a electronic lamp ballast, high efficiency switched mode power supplies, active power factor correction. G D S Absolute Maximum Ratings Symbol Parameter Value Units VDSS Drain Source Voltage 600 V ID Continuous Drain Current(@Tc=25 ) 4.5* A Continuous Drain Current(@Tc=00 ) 3.* A IDM Drain Current Pulsed (Note) 6* A VGS Gate to Source Voltage ±30 V EAS Single Pulsed Avalanche Energy (Note2) 240 mj EAR Repetitive Avalanche Energy (Note) 0 mj dv/dt Peak Diode Recovery dv /dt (Note3) 4.5 V/ns PD Total Power Dissipation(@Tc=25 ) 30 W Derating Factor above W/ TJ,Tstg Junction and Storage Temperature -55~50 TL Channel Temperature 300 *Drain current limited by junction temperature Thermal Characteristics Symbol Parameter Value Min Typ Max Units RQJC Thermal Resistance, Junction -to -Case /W RQJA Thermal Resistance, Junction-to -Ambient /W WINSEMI MICROELECTRONICS WINSEMI MICROELECTRONICS WINSEMI MICROELECTRONICS WINSEMI MICROELECTRONICS WINSEMI MICROELECTRONICS Copyright@Winsemi Microelectronics Co., Ltd., All right reserved. WT-F046-Rev.A Sep.203 0
2 Electrical Characteristics(Tc=25 ) Characteristics Symbol Test Condition Min Type Max Unit Gate leakage current IGSS VGS=±30V,VDS=0V - - ±00 na Gate-source breakdown voltage V(BR)GSS IG=±0 µa,vds=0v ± V Drain Cut -off current IDSS VDS=600V,VGS=0V µa VDS=480V,Tc= µa Breakdown voltage Temperature coefficient BVDSS/ TJ ID=250 µa,referenced to V/ Drain -source breakdown voltage V(BR)DSS ID=250 µa,vgs=0v V Gate threshold voltage VGS(th) VDS=VGS,ID=250 µa 2-4 V Drain -source ON resistance RDS(ON) VGS=0V,ID=2.25A Ω Forward Transconductance gfs VDS=50V,ID=2.25A S Input capacitance Ciss VDS=25V, Reverse transfer capacitance Crss VGS=0V, pf Output capacitance Coss f=mhz Turn-on Rise time tr VDD=300V, - 49 Switching time Turn-on delay time Turn-off Fall time Td(on) tf ID=4.5A RG=25Ω Turn-off delay time Td(off) (Note4,5) ns Total gate charge(gate-source VDD=480V, Qg plus gate-drain) Gate-source charge Qgs VGS=0V, ID=4.5A nc Gate-drain("miller") Charge Qgd (Note,5) Source-Drain Ratings and Characteristics(Ta=25 ) Characteristics Symbol Test Condition Min Type Max Unit Continuous drain reverse current IDR A Pulse drain reverse current IDRP A Forward voltage(diode) VDSF IDR=4.5A,VGS=0V V Reverse recovery time trr IDR=4.5A,VGS=0V, ns Reverse recovery charge Qrr didr /dt =00 A /µs µc Note.Repeativity rating :pulse width limited by junction temperature 2.L=25mH IAS=4.5A,VDD=50V,RG=25Ω,Starting TJ=25 3.ISD 4.5A,di/dt 200A/us,VDD<BVDSS,STARTING TJ=25 4.Pulse Test:Pulse Width 300us,Duty Cycle 2% 5. Essentially independent of operating temperature. This transistor is an electrostatic sensitive device Please handle with caution Tel : Fax : /8
3 0 T o p B o tto m VG S 5 V 0 V 8 V 7 V 6. 5 V 6 V 5. 5 V 5 V I D [A] 0 50 C I D [A] 0 [V ].250us pulse test 2.Tc=25 C Fig. On-Region characteristics 25 C V [V].250us pulse test 2.Tc=40 C Fig.2 Transfer Current characteristics G S R DS (on)[ Ω ] =0V I DR [A] 50 C 25 C =20V Note:T=25 C.250us pulse test 2. =0V I D[A] Fig.3 On-Resistance Variation vs Drain Current and Gate Voltage V [V] Fig.4 Body Diode Forward Voltage Variation with Source Current and Temperature S D 8 X Capacitance[ pf] 6 X X X 0 2 Ciss=Cgs+Cgd(Cds=shorted) Coss=Cds+Cgd Crss=Cgd V GS Gate source Voltage[V] =20V =300V =480V VD S Drain-Source Voltage[V] Fig.5 Capacitance Characteristics Qg Toltal Gate Charge[nC] Fig.6 Gate Charge Characteristics Tel : Fax : /8
4 BV DSS (Normalized) V =0V G S 2.I =250uA D B DS(on) (Normalized) V =0V G S 2.I =2.0A D T j [ C ] Fig.7 Breakdown Voltage Variation vs.temperature T j [ C ] Fig.8 On-Resistance Variation vs. Temperature Operation in This Area is Lim ited by R D S ( on) u s m s 0 m s 3 I D [A] 0 0 D C I D [A] Tc=25 C 2.T =25 J C 3.Single pulse V D S [V] Fig.9 Maximum Safe Operation Area Tc [ C ] Fig.0 Maximum Drain Current vs Case Temperature Z θjc (t),thermal Response D= single pulse *.Z θj C (t)=2.5 C/W Max. 2.Duty Factor,D=t/t2 3.T JM*T C=P DM* Z θj C (t) P D M t t t,square Wave Pulse Duration[sec] Fig. Transient Thermal Response Curve Tel : Fax : /8
5 2 V n F 5 0 K Ω n F Same type a s D U T 0 V Qg Q g s Q g d D U T 3 m A Ch a rg e Fig.2 Gate Test Circuit & Waveform R L 9 0 % V D D R G 0 V D U T 0 % t d(on) t r t d (o ff) t o n t o f f t f Fig.3 Resistive Switching Test Circuit & Waveform L E A S = 2 L I A S 2 B S B S - V D D I D B S I A S R G V D D ID ( t ) 0 V D U T ( t) V D D t p t p T i m e Fig.4 Unclamped Inductive Switching Test Circuit & Waveform Tel : Fax : /8
6 D U T I S D L Driver R G Sam e Type a s D U T V D D dv/dt controlled by RG I S D conteolled by pulse period VG S (Driver) D = Gate Pulse Width Gate Pulse Period 0 V I F M,Body Diode Forward Current IS D (DUT) di/dt IR M Body Diode Reverse Current VD S (DUT) Body Diode Recovery dv/dt VS D VD D Body Diode Forward Voltage Drop Fig.5 Peak Diode Recovery dv/dt Test Circuit & Waveform Tel : Fax : /8
7 TO-220F Package Dimension U n it:m m E F 符号 Symbol M I N M A X Q A P B D b c D E L2 B e 2.54T YPE F L L b C L Q ФP Q e e Q A Tel : Fax : /8
8 NOTE:.We strongly recommend customers check carefully on the trademark when buying our product, if there is any question, please don't be hesitate to contact us. 2.Please do not exceed the absolute maximum ratings of the device when circuit designing. 3.Winsemi Microelectronics Co., Ltd reserved the right to make changes in this specification sheet and is subject to change without prior notice. CONTACT: Winsemi Microelectronics Co., Ltd. ADD:Futian District, ShenZhen Tian An Cyber Tech Plaza two East Wing 002 Post Code : Tel : FAX : Web Site : Tel : Fax : /8
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N-channel 600 V, 0.037 Ω typ., 66 A MDmesh DM2 Power MOSFET in a TO-247 package Datasheet - production data Features Order code VDS RDS(on) max. ID PTOT STW70N60DM2 600 V 0.042 Ω 66 A 446 W TO-247 1 3
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DESCRIPTION The SPN4842 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
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PD-9726A RADIATION HARDENED LOGIC LEVEL POWER MOSFET SURFACE MOUNT (LCC-28) Product Summary Part Number Radiation Level RDS(on) ID IRHLQ7724 K Rads (Si).Ω 2.6A IRHLQ7324 3K Rads (Si).Ω 2.6A International
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400V N-Channel MOSFET Features RDS(ON) (Max 1.00Ω) @ VGS=10V Gate Charge : 18.0 nc (Typical) Improved dv/dt capability / Fast switching 100% EAS Tested BVDSS RDS(ON) MAX ID 400V 1.00Ω 6A TO-220F PKG General
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PD-9779B RADIATION HARDENED POWER MOSFET SURFACE MOUNT (SMD-.2) Product Summary IRHNM597 JANSR2N756U8 V, P-CHANNEL REF: MIL-PRF-95/749 5 TECHNOLOGY Part Number Radiation Level RDS(on) ID QPL Part Number
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DESCRIPTION The SPN180T10 is the N-Channel enhancement mode power field effect transistor which is produced using super high cell density DMOS trench technology. This high density process is especially
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DESCRIPTION The is the N-Channel enhancement mode power field effect transistor which is produced using super high cell density DMOS trench technology. This high density process is especially tailored
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