PD Storage Temperature Range Tstg 65 to +150 C Operating Junction Temperature TJ 200 C

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1 SEMICONDUCTOR TECHNICAL DATA Order this document by /D The RF MOSFET Line Designed for wideband large signal amplifier and oscillator applications up to MHz range, in single ended configuration. Guaranteed 8 Volt, 15 MHz Performance Output Power = 15 Watts Narrowband Gain = 1 db (Typ) Efficiency = % (Typical) Small Signal and Large Signal Characterization 1% Tested For Load Mismatch At All Phase Angles With :1 VSWR D Excellent Thermal Stability, Ideally Suited For Class A Operation Facilitates Manual Gain Control, ALC and G Modulation Techniques 15 W, to MHz N CHANNEL MOS BROADBAND RF POWER FET CASE 11 7, STYLE S MAXIMUM RATINGS Rating Symbol Value Unit Drain Source Voltage VDSS 5 Vdc Drain Gate Voltage (RGS = 1. MΩ) VDGR 5 Vdc Gate Source Voltage VGS ± Vdc Drain Current Continuous ID.5 Adc Total Device TC = 5 C Derate above 5 C PD 55.1 Storage Temperature Range Tstg 5 to +15 C Operating Junction Temperature TJ C THERMAL CHARACTERISTICS Watts W/ C Characteristic Symbol Max Unit Thermal Resistance, Junction to Case RθJC. C/W NOTE CAUTION MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. REV 7 MOTOROLA Motorola, Inc RF DEVICE DATA 1

2 ELECTRICAL CHARACTERISTICS (TC = 5 C unless otherwise noted.) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS (1) Drain Source Breakdown Voltage (VGS =, ID = 5. ma) V(BR)DSS 5 Vdc Zero Gate Voltage Drain Current (VDS = 8 V, VGS = ) Gate Source Leakage Current (VGS = V, VDS = ) ON CHARACTERISTICS (1) Gate Threshold Voltage (VDS = 1 V, ID = 5 ma) Forward Transconductance (VDS = 1 V, ID = 5 ma) DYNAMIC CHARACTERISTICS (1) Input Capacitance (VDS = 8 V, VGS =, f = 1. MHz) Output Capacitance (VDS = 8 V, VGS =, f = 1. MHz) Reverse Transfer Capacitance (VDS = 8 V, VGS =, f = 1. MHz) FUNCTIONAL CHARACTERISTICS Noise Figure (VDS = 8 Vdc, ID = 5 ma, f = 15 MHz) Common Source Power Gain (Figure 1) (VDD = 8 Vdc, Pout = 15 W, f = 15 MHz, IDQ = 5 ma) Drain Efficiency (Figure 1) (VDD = 8 Vdc, Pout = 15 W, f = 15 MHz, IDQ = 5 ma) IDSS. madc IGSS 1. µadc VGS(th) 1... Vdc gfs 5 mmhos Ciss pf Coss 7 pf Crss 5.5 pf NF 1. db Gps 1 1 db η 5 % Electrical Ruggedness (Figure 1) (VDD = 8 Vdc, Pout = 15 W, f = 15 MHz, IDQ = 5 ma, VSWR :1 at all Phase Angles) NOTES: 1. Each side measured separately. ψ No Degradation in Output Power

3 R C1 RFC C11 VDD = + 8 V BIAS ADJUST D1 C8 + C9 R R C7 RFC1 RF INPUT C1 L1 C R1 DUT L C C L C C5 RF OUTPUT C1, C Arco, pf or Equivalent C Arco, 8 pf or Equivalent C pf Mini Unelco or Equivalent C5 pf Mini Unelco or Equivalent C 8 pf, 1 Mils Chip C7.1 µf Ceramic C8 1 µf, V C9.1 µf Ceramic C1, C11 8 pf Feedthru D1 1N595A Motorola Zener L1 Turns,.9 ID, #18 AWG,.1 Long L Turns,. ID, #18 AWG,.1 Long L 1/ Turns,.9 ID, #18 AWG,.15 Long RFC1 Turns,. ID, # AWG Enamel Closewound RFC Ferroxcube VK 19/B R1 7 Ω, 1 W Thin Film R 1 kω, 1/ W R 1 Turns, 1 kω R 1.8 kω, 1/ W Board Material. G1, 1 oz. Cu Clad, Double Sided Figure MHz Test Circuit

4 TYPICAL CHARACTERISTICS 1 P out, OUTPUT POWER (WATTS) f = 1 MHz 15 MHz MHz 9 8 f = 1 MHz 7 5 MHz VDD = 8 V IDQ = 5 ma 1 P out, OUTPUT POWER (WATTS) 15 MHz VDD = 1.5 V IDQ = 5 ma 8 1 Pin, INPUT POWER (MILLWATTS) Figure. Output Power versus Input Power 8 1 Pin, INPUT POWER (MILLWATTS) Figure. Output Power versus Input Power Pout, OUTPUT POWER (WATTS) f = MHz IDQ = 5 ma VDD = 8 V VDD = 1.5 V Pout, OUTPUT POWER (WATTS) Pin = mw mw IDQ = 5 ma f = 1 MHz mw 1 Pin, INPUT POWER (WATTS) Figure. Output Power versus Input Power VDD, SUPPLY VOLTAGE (VOLTS) Figure 5. Output Power versus Supply Voltage Pout, OUTPUT POWER (WATTS) Pin = 9 mw IDQ = 5 ma f = 15 MHz mw mw Pout, OUTPUT POWER (WATTS) Pin = 1 W.7 W. W IDQ = 5 ma f = MHz VDD, SUPPLY VOLTAGE (VOLTS) Figure. Output Power versus Supply Voltage VDD, SUPPLY VOLTAGE (VOLTS) Figure 7. Output Power versus Supply Voltage

5 TYPICAL CHARACTERISTICS Pout, OUTPUT POWER (WATTS) IDQ = 5 ma f = MHz Pin = W W 1 W VDD, SUPPLY VOLTAGE (VOLTS) Figure 8. Output Power versus Supply Voltage Pout, OUTPUT POWER (WATTS) VDD = 8 V IDQ = 5 ma Pin = CONSTANT TYPICAL DEVICE SHOWN, VGS(th) = V MHz 15 MHz VGS, GATE SOURCE VOLTAGE (VOLTS) Figure 9. Output Power versus Gate Voltage ID, DRAIN CURRENT (MILLAMPS) TYPICAL DEVICE SHOWN, VGS(th) = V VDS = 1 V VDS, GATE SOURCE VOLTAGE (VOLTS) Figure 1. Drain Current versus Gate Voltage (Transfer Characteristics) VGS, GATE-SOURCE VOLTAGE (NORMALIZED) VDS = 8 V 5 ma ID = 75 ma 5 ma TC, CASE TEMPERATURE ( C) Figure 11. Gate Source Voltage versus Case Temperature 5 ma 1 1 C, CAPACITANCE (pf) 18 Coss Ciss Crss VGS = V f = 1 MHz ID, DRAIN CURRENT (AMPS) TC = 5 C VDS, DRAIN SOURCE VOLTAGE (VOLTS) Figure 1. Capacitance versus Drain Source Voltage VDS, DRAIN SOURCE VOLTAGE (VOLTS) Figure 1. DC Safe Operating Area 5

6 TYPICAL CHARACTERISTICS TYPICAL MHz PERFORMANCE Pout, OUTPUT POWER (WATTS) VDD = 8 V IDQ = 1 ma f = MHz Pout, OUTPUT POWER (WATTS) VDD = 8 V IDQ = 1 ma Pin = CONSTANT TYPICAL DEVICE SHOWN, VGS(th) = V f = MHz Pin, INPUT POWER (WATTS) Figure 1. Output Power versus Input Power 1 1 VGS, GATE SOURCE VOLTAGE (VOLTS) Figure 15. Output Power versus Gate Voltage

7 Zin 15 f = 1 MHz ZOL* 15 VDD = 8 V, IDQ = 5 ma, Pout = 15 W f MHz 1 15 Zin OHMS 7.5 j j7.5. j.9.9 j.18 7 Ω Shunt Resistor Gate to Ground f = 1 MHz VDD = 8 V, IDQ = 5 ma, Pout = 15 W f MHz 1 15 ZOL* OHMS 1.7 j j j8.9.8 j.17 ZOL* = Conjugate of the optimum load impedance into which the device operates at a given output power, voltage and frequency. Figure 1. Large Signal Series Equivalent Input Impedance, Zin Figure 17. Large Signal Series Equivalent Output Impedance, ZOL* 5 Zin & ZOL* are given from drain to drain and gate to gate respectively. 15 Zin ZOL* 5 f = MHz f = MHz f MHz VDD = 8 V, IDQ = 1 ma, Pout = W Zin Ohms 59. j 8 j.5.5 j..77 j5. j9.5. j.1 ZOL* Ohms.1 j8.5 7 j j1.5. j19 1 j j1. Feedback loops: 5 ohms in series with.1 µf Drain to gate, each side of push pull FET ZOL* = Conjugate of the optimum load impedance into which the device operates at a given output power, voltage and frequency. Figure 18. Input and Outut Impedance 7

8 f S11 S1 S1 S (MHz) S11 φ S1 φ S1 φ S φ Table 1. Common Source Scattering Parameters VDS = 8 V, ID =.5 A 8

9 +j1 +j5 +j5 +j1 +j15 f = 8 MHz +j5 +j j S f = 8 MHz 7 + j1 7 j5 S11 j5 j5 j15 j1 Figure 19. S11, Input Reflection Coefficient versus Frequency VDS = 8 V ID =.5 A Figure. S1, Reverse Transmission Coefficient versus Frequency VDS = 8 V ID =.5 A f = 8 MHz 15 1 S Figure 1. S1, Forward Transmission Coefficient versus Frequency VDS = 8 V ID =.5 A +j1 +j5 +j5 +j1 +j15 +j5 +j f = 8 MHz 15 j5 j1 7 j5 S j15 j5 j1 j5 Figure. S, Output Reflection Coefficient versus Frequency VDS = 8 V ID =.5 A 9

10 DESIGN CONSIDERATIONS The is an RF power N Channel enhancement mode field effect transistor (FET) designed especially for HF and VHF power amplifier applications. Motorola RF MOS FETs feature planar design for optimum manufacturability. Motorola Application Note AN11A, FETs in Theory and Practice, is suggested reading for those not familiar with the construction and characteristics of FETs. The major advantages of RF power FETs include high gain, low noise, simple bias systems, relative immunity from thermal runaway, and the ability to withstand severely mismatched loads without suffering damage. Power output can be varied over a wide range with a low power dc control signal, thus facilitating manual gain control, ALC and modulation. DC BIAS The is an enhancement mode FET and, therefore, does not conduct when drain voltage is applied without gate bias. A positive gate voltage causes drain current to flow (see Figure 1). RF power FETs require forward bias for optimum gain and power output. A Class AB condition with quiescent drain current (IDQ) in the 5 1 ma range is sufficient for many applications. For special requirements such as linear amplification, IDQ may have to be adjusted to optimize the critical parameters. The MOS gate is a dc open circuit. Since the gate bias circuit does not have to deliver any current to the FET, a simple resistive divider arrangement may sometimes suffice for this function. Special applications may require more elaborate gate bias systems. GAIN CONTROL Power output of the may be controlled from rated values down to the milliwatt region (> db reduction in power output with constant input power) by varying the dc gate voltage. This feature, not available in bipolar RF power devices, facilitates the incorporation of manual gain control, AGC/ALC and modulation schemes into system designs. A full range of power output control may require dc gate voltage excursions into the negative region. AMPLIFIER DESIGN Impedance matching networks similar to those used with bipolar transistors are suitable for. See Motorola Application Note AN71, Impedance Matching Networks Applied to RF Power Transistors. Both small signal scattering parameters and large signal impedance parameters are provided. Large signal impedances should be used for network designs wherever possible. While the s parameters will not produce an exact design solution for high power operation, they do yield a good first approximation. This is particularly useful at frequencies outside those presented in the large signal impedance plots. RF power FETs are triode devices and are therefore not unilateral. This, coupled with the very high gain, yields a device capable of self oscillation. Stability may be achieved using techniques such as drain loading, input shunt resistive loading, or feedback. S parameter stability analysis can provide useful information in the selection of loading and/or feedback to insure stable operation. The was characterized with a 7 ohm input shunt loading resistor. For further discussion of RF amplifier stability and the use of two port parameters in RF amplifier design, see Motorola Application Note AN15A. LOW NOISE OPERATION Input resistive loading will degrade noise performance, and noise figure may vary significantly with gate driving impedance. A low loss input matching network with its gate impedance optimized for lowest noise is recommended. 1

11 PACKAGE DIMENSIONS H Q J S 1 K A U M D E M R C B SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y1.5M, CONTROLLING DIMENSION: INCH. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D E H J K M 5 5 Q R S U STYLE : PIN 1. SOURCE. GATE. SOURCE. DRAIN CASE 11 7 ISSUE N 11

12 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; JAPAN: Motorola Japan Ltd.; SPD, Strategic Planning Office, 11, P.O. Box 55, Denver, Colorado or Nishi Gotanda, Shinagawa ku, Tokyo, Japan Customer Focus Center: Mfax : RMFAX@ .sps.mot.com TOUCHTONE 1 9 ASIA / PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, Motorola Fax Back System US & Canada ONLY , Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong HOME PAGE: 1 MOTOROLA RF DEVICE /D DATA

PD Characteristic Symbol Max Unit Thermal Resistance, Junction to Case RθJC 0.8 C/W

PD Characteristic Symbol Max Unit Thermal Resistance, Junction to Case RθJC 0.8 C/W SEMICONDUCTOR TECHNICAL DATA Order this document by MRF173/D The RF MOSFET Line N Channel Enhancement Mode MOSFETs Designed for broadband commercial and military applications up to 2 MHz frequency range.