N Channel Enhancement Mode Silicon Gate

Transcription

1 SEMICONDUCTOR TECHNICAL DATA Order this document by IRF4/D N Channel Enhancement Mode Silicon Gate This advanced TMOS power FET is designed to withstand high energy in the avalanche and commutation modes. This new energy efficient design also offers a drain to source diode with a fast recovery time. Designed for low voltage, high speed switching applications in power supplies, converters, and PWM motor controls. These devices are particularly well suited for bridge circuits where diode speed and commutating safe operating area are critical and offer additional safety margin against unexpected voltage transients. TMOS POWER FET 27 AMPERES 1 VOLTS RDS(on) =.7 OHMS Avalanche Energy Specified Source to Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode Diode is Characterized for Use in Bridge Circuits IDSS and VDS(on) Specified at Elevated Temperature G D S CASE 221A 9 TO-22AB MAXIMUM RATINGS (TC = 2 C unless otherwise noted) Rating Symbol Value Unit Drain to Source Voltage VDSS 1 Drain to Gate Voltage (RGS = 1. MΩ) VDGR 1 Gate to Source Voltage Continuous Gate to Source Voltage Non repetitive (tp 1 ms) VGS VGSM ±2 ±4 Vpk Drain Current Continuous Drain Current 1 C Drain Current Single Pulse (tp 1 s) ID ID IDM Adc Apk Total Power Dissipation Derate above 2 C PD Watts W/ C Operating and Storage Temperature Range TJ, Tstg to 1 C Single Pulse Drain to Source Avalanche Energy STARTING (VDD =, VGS = 1, PEAK IL = 27 Apk, L = 1. mh, RG = 2 ) EAS 36 mj Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient RθJC RθJA C/W Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 1 seconds TL 26 C This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. E FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. REV 3 Motorola, Inc. TMOS 1998 Power MOSFET Transistor Device Data 1

2 ELECTRICAL CHARACTERISTICS ( unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain to Source Breakdown Voltage (VGS =, ID =.2 madc) Temperature Coefficient (Positive) V(BR)DSS mv/ C Zero Gate Voltage Drain Current (VDS = 1, VGS = ) (VDS = 1, VGS =, TJ = 12 C) IDSS 1 1 Adc Gate Body Leakage Current (VGS = ±2, VDS = ) IGSS 1 nadc ON CHARACTERISTICS(1) Gate Threshold Voltage Cpk 2.(3) (VDS = VGS, ID = 2 µadc) Threshold Temperature Coefficient (Negative) VGS(th) mv/ C Static Drain to Source On Resistance Cpk 2.(3) (VGS = 1, ID = 1 Adc) RDS(on).47.7 Ohms Drain to Source On Voltage (VGS = 1, ID = 27 Adc) (VGS = 1, ID = 1 Adc, TJ = 12 C) VDS(on) Forward Transconductance (VDS = 1, ID = 1 Adc) gfs 6. 1 Mhos DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS(2) (VDS = 2, VGS =, f = 1. MHz) Ciss pf Coss 39 8 Crss 12 3 Turn On Delay Time td(on) ns Rise Time (VDD = 3, ID = 1 Adc, tr 6 Turn Off Delay Time VGS = 1, RG = 4.7 Ω) td(off) 26 8 Fall Time tf 19 3 Gate Charge QT 6 nc (See Figure 8) (VDS = 8, ID = 27 Adc, Q1 9. D VGS = 1 ) Q2 26 SOURCE DRAIN DIODE CHARACTERISTICS Forward On Voltage (IS = 27 Adc, VGS = ) (IS = 27 Adc, VGS =, TJ = 12 C) Q3 2 Reverse Recovery Time trr 11 ns VSD (IS = 27 Adc, VGS =, ta 1 dis/dt = 1 A/µs) tb 1 Reverse Recovery Stored Charge QRR.67 C 2.4 INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance (Measured from the contact screw on tab to center of die) (Measured from the drain lead.2 from package to center of die) Ld nh Internal Source Inductance (Measured from the source lead.2 from package to source bond pad) Ls 7. (1) Pulse Test: Pulse Width 3 µs, Duty Cycle 2%. (2) Switching characteristics are independent of operating junction temperature. (3) Reflects typical values. Max limit Typ Cpk # # 3 sigma 2 Motorola TMOS Power MOSFET Transistor Device Data

3 TYPICAL ELECTRICAL CHARACTERISTICS V VGS = 1 V 8 V 7 V 6 V V VDS, DRAIN TO SOURCE VOLTAGE (VOLTS) I D, DRAIN CURRENT (AMPS) VDS 1 V TJ = C 2 C 1 C VGS, GATE TO SOURCE VOLTAGE (VOLTS) Figure 1. On Region Characteristics Figure 2. Transfer Characteristics RDS(on), DRAIN TO SOURCE RESISTANCE (OHMS) VGS = 1 V TJ = 1 C 2 C C Figure 3. On Resistance versus Drain Current and Temperature R DS(on), DRAIN TO SOURCE RESISTANCE (OHMS) VGS = 1 V 1 V Figure 4. On Resistance versus Drain Current and Gate Voltage RDS(on), DRAIN TO SOURCE RESISTANCE (NORMALIZED) VGS = 1 V ID = 1 A TJ, JUNCTION TEMPERATURE ( C) 1 I DSS, LEAKAGE (na) 1 VGS = V TJ = 12 C 1 C VDS, DRAIN TO SOURCE VOLTAGE (VOLTS) Figure. On Resistance Variation with Temperature Figure 6. Drain to Source Leakage Current versus Voltage Motorola TMOS Power MOSFET Transistor Device Data 3

4 TYPICAL ELECTRICAL CHARACTERISTICS C, CAPACITANCE (pf) 4 VDS = V VGS = V 4 Ciss Crss 2 Ciss 1 1 Coss Crss VGS VDS GATE TO SOURCE OR DRAIN TO SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation V GS, GATE TO SOURCE VOLTAGE (VOLTS) Q1 QT Q ID = 27 A Q3 8 VDS QG, TOTAL GATE CHARGE (nc) VGS Figure 8. Gate to Source and Drain to Source Voltage versus Total Charge V DS, DRAIN TO SOURCE VOLTAGE (VOLTS) t, TIME (ns) ID = 1 A VDD = 3 V VGS = 1 V tr tf td(off) td(on) I S, SOURCE CURRENT (AMPS) VGS = V RG, GATE RESISTANCE (OHMS) VSD, SOURCE TO DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 1. Diode Forward Voltage versus Current VGS = 2 V SINGLE PULSE TC = 2 C 1 s 1. ms 1 ms 1 s VDS, DRAIN TO SOURCE VOLTAGE (VOLTS) Figure 11. Maximum Rated Forward Biased Safe Operating Area dc RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 1 E AS, SINGLE PULSE DRAIN TO SOURCE AVALANCHE ENERGY (mj) ID = 27 A TJ, STARTING JUNCTION TEMPERATURE ( C) Figure 12. Maximum Avalanche Energy versus Starting Junction Temperature 4 Motorola TMOS Power MOSFET Transistor Device Data

5 1. D =. Rthjl(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE SINGLE PULSE.1 P(pk) t1 t 2 DUTY CYCLE, D = t1/t2 RθJC(t) = r(t) RθJC RθJC = 1.67 C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) TC = P(pk) RθJC(t).1 1.E 1.E 4 1.E 3 1.E 2 1.E 1 1.E+ t, TIME (seconds) Figure 13. Thermal Response Motorola TMOS Power MOSFET Transistor Device Data

6 PACKAGE DIMENSIONS H Q Z L V G B N D A K F T U S R J C T SEATING PLANE CASE 221A 9 (TO 22AB) ISSUE Z NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.M, CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G H J K L N Q R S T U V Z Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 141, P.O. Box 4, Denver, Colorado or Nishi Gotanda, Shagawa ku, Tokyo, Japan Customer Focus Center: Mfax : RMFAX@ .sps.mot.com TOUCHTONE ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, Motorola Fax Back System US & Canada ONLY Ting Kok Road, Tai Po, N.T., Hong Kong HOME PAGE: 6 IRF4/D Motorola TMOS Power MOSFET Transistor Device Data