EECS 247 Analog-Digital Interface Integrated Circuits 2005

Transcription

1 EES 47 Analog-Digital Interface Integrated ircuits 5 Instructor: Haideh Khorramabadi UB Department of Electrical Engineering and omputer Sciences EES 47 Lecture 1: Introduction 5 H.K. Page 1 Administrative ourse web page: All handouts are available on the web Office hours for Haideh Khorramabadi Tues./Thurs. 485 ory Hall haidehk@eecs.berkeley.edu Homework is posted on the course website and is due on Thursdays Midterm exam: 1//5 EES 47 Lecture 1: Introduction 5 H.K. Page

2 Analog-Digital Interface ircuits Analog Output Analog World Analog Input Analog/Digital Interface Digital Processor Digital/Analog Interface Naturally occurring signals are analog Need Analog/Digital & Digital/Analog interface circuits Question: Why not process the signal with analog circuits only & thus eliminate need for A/D & D/A? EES 47 Lecture 1: Introduction 5 H.K. Page 3 MOSFET Maximum f t versus Time 1GHz 1GHz f t.18u.1u.13u.35u.5u.6u.8u 1GHz 6u 3u u 1.5u For MOS (V GS - V th =.5V ) *Ref: Paul R. Gray UB EE9 course 95 International Technology Roadmap for Semiconductors, 1u Year EES 47 Lecture 1: Introduction 5 H.K. Page 4

3 Digital Signal Processing haracteristics Direct benefit from the down scaling of VLSI technology Not sensitive to analog noise Enhanced functionality & flexibility Amenable to automated design & test Arbitrary precision Provides inexpensive storage capability EES 47 Lecture 1: Introduction 5 H.K. Page 5 Analog Signal Processing haracteristics Has not fully benefited from the down scaling of VLSI technology Supply voltages scale down accordingly Reduced voltage swings Reduced voltage swings requires lowering of the circuit noise to keep a constant dynamic range Higher power dissipation and chip area Sensitive to analog noise Not amenable to automated design Extra precision comes at a high price Availability of inexpensive digital capabilities on-chip enables automatic adjustments to compensate for analog circuit impairments Rapid progress in DSP has imposed higher demands on analog/digital interface circuitry Plenty of room for innovations! EES 47 Lecture 1: Introduction 5 H.K. Page 6

4 ost/function omparison DSP & Analog Digital circuitry: Fully benefited from MOS device scaling ost/function decreases by ~9% each year ost/function 3X in 1 years * Analog circuitry: Not fully benefited from MOS scaling Device scaling mandates drop in supply voltages threaten analog feasibility ost/function for analog ckt almost constant or increase Rapid shift of functions from analog to digital signal processing & hence need for A/D & D/A interface circuitry *Ref: International Technology Roadmap for Semiconductors, EES 47 Lecture 1: Introduction 5 H.K. Page 7 Example: Digital Audio Goal-Lossless archival and transmission of audio signals ircuit functions: Preprocessing Amplification Anti-alias filtering A/D onversion Resolution 16Bits Sig. bandwidth 41kHz DSP Storage Processing (e.g. recognition) D/A onversion Postprocessing Smoothing filter Variable gain amplification Analog Input Analog Preprocessing A/D onversion DSP D/A onversion Analog Postprocessing Analog Output EES 47 Lecture 1: Introduction 5 H.K. Page 8

5 Example: Typical Dual Mode ell Phone ontains in integrated form: 4 Rx filters 4 Tx filters 4 Rx ADs 4 Tx DAs 3 Auxiliary ADs 8 Auxiliary DAs Total: Filters 8 ADs 7 DAs 1 Dual Standard, I/Q Audio, Tx/Rx power control, Battery charge control, display,... EES 47 Lecture 1: Introduction 5 H.K. Page 9 Areas Utilizing Analog/Digital Interface ircuitry ommunications Wireline communications Telephone related (DSL, ISDN, ODE) Television circuitry (able modems, TV tuners ) Ethernet (Gigabit, 1/1BaseT ) Wireless ellular telephone (DMA, Analog, GSM.) Wireless LAN (Blue tooth, 8.11a/b/g..) Radio (analog & digital), Television omputing & ontrol Storage media (disk drives, digital tape) Imagers & displays Instrumentation Test equipment Physical sensors & actuators onsumer Electronics Audio (D, DAT) Automotive control, appliances, toys EES 47 Lecture 1: Introduction 5 H.K. Page 1

6 UB Analog ourses EES EES 47 Filters, ADs, DAs, some system level Signal processing fundamentals Macro-models, large systems, some transistor level, constraints such as finite gain, supply voltage, noise, dynamic range considered AD Tools Matlab, SPIE EES 4 Transistor level, building blocks such as opamps, buffers, comparator. Device and circuit fundamentals AD Tools SPIE EES 4 RF amplification, mixing Oscillators Exotic technology devices Nonlinear circuits EES 47 Lecture 1: Introduction 5 H.K. Page 11 Material overed in EE47 Filters ontinuous-time filters Biquads & ladder type filters Opamp-R, Opamp-MOSFET-, gm- filters Automatic frequency tuning Switched capacitor (S) filters Data onverters D/A converter architectures A/D converter Nyquist rate AD- Flash, Pipeline ADs,. Oversampled converters Self-calibration techniques Systems utilizing analog/digital interfaces Wireline communication systems- ISDN, XDSL Wireless communication systems- Wireless LAN, ellular telephone, Disk drive electronics Fiber-optics systems EES 47 Lecture 1: Introduction 5 H.K. Page 1

7 Introduction to Filters Filtering Frequency-selective signal processing It s the most common type of signal processing Examples: Extraction of desired signal from many (radio) Separating signal and noise Amplifier bandwidth limitations H( jω) H( jω) Ideal Low-Pass Brick Wall Filter ω More Practical Filter ω EES 47 Lecture 1: Introduction 5 H.K. Page 13 Simplest Filter First-Order R Filter (LPF1) Steady-state frequency response: V out(s) 1 H(s) = = V s in(s) 1+ ωo 1 with ωo = = π 1kHz R EES 47 Lecture 1: Introduction 5 H.K. Page 14

8 Poles and Zeros H( s) = 1 s 1 + ω o s-plane (pzmap): jω Pole: Zero: p = ω z o p=-ω o σ H( s) 1 1 = = ω 1 + j ω ω 1 + o ω o EES 47 Lecture 1: Introduction 5 H.K. Page 15 H( s = jω) ω= = 1 H( s = jω) = 1/ ω= ω H( s = jω) = Asymptotes: - db/dec magnitude rolloff - 9degrees phase shift per decades Filter Frequency Response ω Bode Plot Phase (deg) Magnitude (db) Question: can we really get 1dB attenuation at 1GHz? dB! Frequency [Hz] EES 47 Lecture 1: Introduction 5 H.K. Page 16

9 First-Order Low-Pass R Filter Including Parasitics (LPF) H srp s = Pole : p = R ( ) ( + ) 1 P R + sr( + P ) 1 Zero : z = R P EES 47 Lecture 1: Introduction 5 H.K. Page 17 Filter Frequency Response H( jω) ω= = 1 P H( jω) ω = + P = 1 3 P = 6dB Phase (deg) Magnitude (db) Frequency [Hz] Beware of other parasitics not included in this model EES 47 Lecture 1: Introduction 5 H.K. Page 18

10 Dynamic Range & Electronic Noise Dynamic range is defined as the ratio of maximum possible signal handled by a circuit to the minimum useful signal Maximum signal handling capability usually limited by circuit non-linearity & maximum possible voltage swings which in turn is a function of supply voltage Minimum signal handling capability is normally determined by electronic noise Amplifier noise due to device thermal and flicker noise Resistor thermal noise Dynamic range in analog ckts has direct implications for power dissipation EES 47 Lecture 1: Introduction 5 H.K. Page 19 Analog Dynamic Range Once the poles and zeroes of the analog filter transfer function are defined then special attention must be paid to the actual implementation Of the infinitely many ways to build a filter with a given transfer function, each of those ways has a different output noise! As an example noise and dynamic range for the 1 st order lowpass filter will be derived EES 47 Lecture 1: Introduction 5 H.K. Page

11 First Order Filter Noise apacitors are noiseless Resistors have thermal noise This noise is uniformly distributed from dc to infinity Frequencyindependent noise is called white noise v IN R v OUT EES 47 Lecture 1: Introduction 5 H.K. Page 1 Resistor Noise Resistor noise characteristics A mean value of zero A mean-squared value v IN R v OUT v n = 4k T R f B r ohms Volts measurement bandwidth (Hz) absolute temperature ( K) Boltzmann s constant = 1.38e-3 J/ K EES 47 Lecture 1: Introduction 5 H.K. Page

12 Resistor Noise Resistor rms noise voltage in a 1Hz band centered at 1kHz is the same as resistor rms noise in a 1Hz band centered at 1GHz v IN R v OUT Resistor noise spectral density, N, is the rms noise per Hz of bandwidth: N v f n = = 4 k T R B r EES 47 Lecture 1: Introduction 5 H.K. Page 3 Good numbers to memorize: Resistor Noise N for a 1kW resistor at room temperature is 4nV/ Hz Scaling R, A 1MΩ resistor gives 4nV/ Hz A 5Ω resistor gives.9nv/ Hz Or, remember v IN R v OUT k B T r = 4x1-1 J (T r = 17 o ) Or, remember k B T r /q = 6mV (q = 1.6x1-19 ) EES 47 Lecture 1: Introduction 5 H.K. Page 4

13 First Order Filter Noise Short circuit the input to ground. Resistor noise gives the filter a non-zero output when v IN = In this simple example, both the input signal and the resistor noise obviously have the same transfer functions to the output Since noise has random phase, we can use any polarity convention for a noise source (but we have to use it consistently) v IN - e + R v OUT EES 47 Lecture 1: Introduction 5 H.K. Page 5 First Order Filter Noise What is the thermal noise of the R filter? Let s ask SPIE! Netlist: *Noise from R LPF vin vin ac 1V r1 vin vout 8kOhm c1 vout 1nF.ac dec 1 1Hz 1GHz.noise V(vout) vin.end v IN R=8kW - + e =1nF v OUT EES 47 Lecture 1: Introduction 5 H.K. Page 6

14 LPF1 Output Noise Density Noise Spectral Density (nv/ Hz) 1 khz corner 1 N = 4kBTr R 1 nv = 8 4 Hz nv = Hz [Hz] EES 47 Lecture 1: Introduction 5 H.K. Page 7 Total Noise Total noise is what the display on a volt-meter connected to v o would show! Total noise is found by integrating the noise power spectral density with in the frequency band of interest Note that noise is integrated in the mean-squared domain, because noise in a bandwidth df around frequency f 1 is uncorrelated with noise in a bandwidth df around frequency f Powers of uncorrelated random variables add Squared transfer functions appear in the mean-squared integral f v v o = n H( j ω ) df f1 v 4k TRH( jf) o = π df B *Ref: Analysis & Design of Analog Integrated ircuits, Gray, Hurst, Lewis, Meyer- hapter 11 EES 47 Lecture 1: Introduction 5 H.K. Page 8

15 Total Noise o v = 4k TRH(π jf) df = B 4k 1 BTR 1+ π jfr v kt B o = This interesting and somewhat counter intuitive result means that even though resistors provide the noise sources, total noise is determined by noiseless capacitors! df For a given capacitance, as resistance goes up, the increase in noise density is balanced by a decrease in noise bandwidth EES 47 Lecture 1: Introduction 5 H.K. Page 9 kt/ Noise kt/ noise is a fundamental analog circuit limitation The rms noise voltage of the simplest possible (first order) filter is k B T/ For 1pF capacitor, k B T/ = 64 µv-rms (at 98 K) 1pF gives µv-rms The noise of a more complex & higher order filter is given by: α x k B T/ where α depends on implementation and features such as filter order EES 47 Lecture 1: Introduction 5 H.K. Page 3

16 Noise Spectral Density (nv/ Hz) Integrated Noise ( mvrms) Low Pass Filter Total Output Noise (LPF1) 1 1 mvrms [Hz] EES 47 Lecture 1: Introduction 5 H.K. Page 31 LPF1 Output Noise Note that the integrated noise essentially stops growing above 1kHz for this khz lowpass filter Beware of faulty intuition which might tempt you to believe that an 8Ω, 1pF filter has lower integrated noise compared to our 8Ω, 1pF filter EES 47 Lecture 1: Introduction 5 H.K. Page 3

17 LPF1 Output Noise Noise Spectral Density (nv/ Hz) Integrated Noise ( mvrms) 1 8W, 1pF 8W, 1pF [Hz] EES 47 Lecture 1: Introduction 5 H.K. Page 33 Analog ircuit Dynamic Range Maximum voltage swing for analog circuits can at most be equal to power supply voltage V DD (normally is smaller) Assuming a sinusoid signal ( 1 V V max rms) = DD Noise for a filter: k T V ( ) B n rms = α V max ( rms) V DR.. = = DD [V/V] V n ( rms) 8α k B T Dynamic range in db is: = log 1 V DD + 75 [db] with in [pf] α EES 47 Lecture 1: Introduction 5 H.K. Page 34

18 Analog ircuit Dynamic Range For integrated circuits built in modern MOS processes, VDD < 3V and < 1pF (a = 1) D.R. < 14 db For P board circuits built with old-fashioned 3V opamps and discrete capacitors of < 1nF D.R. < 14dB A 36dB advantage! EES 47 Lecture 1: Introduction 5 H.K. Page 35 Dynamic Range versus Number of Bits Number of bits and db are related: DR.. = ( N ) [db] N number of bits see quantization noise, later in the course Hence 14 db 17 Bits 14 db 3 Bits EES 47 Lecture 1: Introduction 5 H.K. Page 36

19 Dynamic Range versus Power Dissipation Each extra bit corresponds to 6dB Increasing dynamic range by one bit 6dB less noise decrease in noise power by 4! This translates into 4x larger capacitors To drive these at the same speed, G m must increase 4x Power is proportional to G m (for fixed supply and V dsat ) In analog circuits with performance limited by thermal noise, 1 extra bit costs 4x power E.g. 16Bit AD at mw 17Bit AD at 8mW Do not overdesign the dynamic range of analog circuits! EES 47 Lecture 1: Introduction 5 H.K. Page 37 Noise Summary Thermal noise is a fundamental property of (electronic) circuits Noise is closely related to apacitor size In higher order filters, noise is proportional to, filter order, Q, and depends on implementation Operational amplifiers can contribute significant levels of extra noise to overall filter noise Reducing noise in most analog circuits costs in terms of power dissipation and chip area EES 47 Lecture 1: Introduction 5 H.K. Page 38