EE247 Lecture 27 Today:

Size: px
Start display at page:

Download "EE247 Lecture 27 Today:"

Transcription

1 EE247 Lecture 27 Today: ΣΔ Modulator (continued) Examples of systems utilizing analog-digital interface circuitry Acknowledgements EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 1 Oversampled Converters Cont d Higher order ΣΔ modulators Single-loop single-quantizer modulators with multi-order filtering in the forward path Example: 5 th order ΣΔ Modeling Noise shaping Complex loop filters Stability Voltage scaling, input range scaling Tones, Dither, kt/c noise Interference via V ref Effect of component nonlinearities on ΣΔ performance EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 2

2 Recap Dither successfully removes in-band tones that would corrupt the signal The high-frequency tones in the quantization noise spectrum will be removed by the digital filter following the modulator What if some of these strong tones are demodulated to the base-band prior to digital filtering? Why would this happen? Vref Interference EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 3 Modulation via DAC V ref y(t) DAC v(t) ( ) yt= D =± 1 ref out V = 2.5V + 1mV f /2 square wave ( ) ( ) vt = yt V ref s EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 4

3 Modulation via DAC D OUT spectrum V ref spectrum interferer convolution yields sum of red and green, mirrored tones and noise appear in band 0 f s /2 f s EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 5 V ref Interference via Modulation Output Spectrum [dbwn] dB (1 db/db) 0V 1μV 1mV Key Point: In high resolution ΣΔ modulators Vref interference via modulation can significantly limit the maximum dynamic range Frequency [khz] EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 6

4 V ref Interference via Modulation Output Spectrum [dbwn] V 1e-006V 0.001V Frequency [Hz] x 10 4 Output Spectrum [dbwn] V 1e-006V 0.001V Frequency [Hz] x 10 6 Symmetry of the spectra at f s /2 and DC confirm that this is modulation EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 7 V ref Spurious Tone Velocity vs. Native Tone Velocity Output Spectrum [dbwn] V in V ref 0.6kHz/mV = 6mV / 12mV 0.006V DC = 2.5V DC 0.012V & 1mV f s /2 40dB shift for readability Aliased -150 tone Frequency [khz] Native tone velocity 1.2kHz/mV Aliased tone velocity 0.6kHz/mV EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 8

5 V ref Interference via Modulation Simulations performed to verify the effect of the DAC reference contamination via output signal interference particularly in the vicinity of f s /2 Interference modulates the high-frequency tones Since the high frequency tones are strong, a small amount (1μV) of interference suffice to create audible base-band tones Stronger interference (1mV) not only aliases spurious tones but elevate noise floor by aliasing high frequency quantization noise Amplitude of modulated tones is proportional to interference The velocity of modulated tones is half that of the native tones Such differences help debugging of silicon How clean does the reference have to be? EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 9 V ref Interference Output Spectrum [dbwn] / Int. Noise [dbv] Output Spectrum (1μV interference on V ref ) Integrated Noise (30 averages) Tone dominates noise floor w/o thermal noise Frequency [khz] EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 10

6 Summary Our stage 2 model can drive almost all capacitor sizing decisions Gain scaling kt/c noise Dither Dither quite effective in the elimination of native in-band tones Extremely clean & well-isolated V ref is required for high-dynamic range applications e.g. digital audio Next we will add relevant component imperfections: Effect of component nonlinearities on ΣΔ performance EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 11 Modeling ΣΔ Nonlinearities Many component nonlinearities contribute errors Important to identify the ones which incur significant errors and analyze those only Unnecessarily complex models reduce the chance to find relevant problems, and perhaps, solutions As with all nonidealities, model one at a time Expect errors from the 2 nd integrator to be reduced by the gain of the 1 st integrator Errors further downstream are even less significant EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 12

7 Effect of Component Non-Linearity b1 b2 X K1 z z -1-1 K2 z 1 - z -1-1 K3 z 1 - z -1-1 K4 z -1 K5 z 1 - z 1 - z a1 a2 a3 a4 a5 Q DAC Gain g Comparator Y 1 st Integrator nonlinearity most significant impact on ΣΔ linearity/noise performance EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 13 1 st Integrator φ 1D C IN φ 2 V IN φ 2 φ 1 V REF φ 2 φ 1 C R1 C R2 φ 1 v CM φ 2 D φ 1 v CM φ 2 D C FB Key non-linear component effects to be analyzed: C IN Since not enclosed in feedback loop high impact Opamp closed-loop transfer characteristic C FB not quite obviousshould analyze φ 2 φ 1 v CM V 1OUT Switch charge injection V REF v CM EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 14

8 Capacitor Voltage Coefficient Ideal capacitor Q = CV Practical capacitor (1 st order model) ( ) Q = C V V with Q( V ) = C ( 1+ αv + K)V o Typical voltage coefficients Poly-poly capacitors ~20 ppm/v Metal-metal capacitors 1 10 ppm/v EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 15 C IN Voltage Coefficient Charge conservation dictates: (V CM =0, C R1 =C R2 =C R ): 1OUT ( ) = 1OUT ( ) V k V k integration CIN C + V IN 2 IN ( k 1) + α VIN ( k 1) CFB C FB converter input C D R VREF C FB 1-bit feedback EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 16

9 C IN Voltage Coefficient Output Spectrum [dbfs] / Int. Noise [dbv] Output Spectrum Integrated Noise Frequency [khz] V in = V FS = 1V Spectrum scaled for V FS 0dB (window lowers peak) Noise integral excludes DC, fundamental α = 10 ppm/v 2 nd harmonic at 105dB dominates noise! Let s characterize it EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 17 C IN Voltage Coefficient Output Spectrum [dbfs] dB α =10 ppm/v α =1 ppm/v 2 nd harmonic increases 1dB per 1dB increase of α Frequency [khz] EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 18

10 Effect of Circuit Non-Idealities In principle, the digital filter removes out-of-band tones Except their distortion components falling in the baseband, caused by nonlinearities in the modulator loop filter Except components that are mixed down to baseband due to noise in the DAC reference Nonlinearities in the 1 st integrator amplifier are important Other source of nonlinearity Feedback capacitor non-linearity Switch induced distortion Including those in the model is left as an exercise Effect of 3 rd order non-linearities good exercise! Maintaining extremely high levels of linearity in H(z) is the most significant transistor-level design challenge of high resolution ΣΔ modulators EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 19 Summary Oversampled ADCs Noise shaping utilized to reduce baseband quantization noise power Reduced precision requirement for analog building blocks compared to Nyquist rate converters Relaxed transition band requirements for analog antialiasing filters Utilizes low cost, low power digital filtering Speed is traded for resolution EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 20

11 Material Covered in EE247 Filters Continuous-time filters Biquads & ladder type filters Opamp-RC, Opamp-MOSFET-C, gm-c filters Automatic frequency tuning Switched capacitor (SC) filters Data Converters D/A converter architectures A/D converter Nyquist rate ADC- Flash, Interpolating & Folding, Pipeline ADCs,. Self-calibration techniques Oversampled converters EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 21 Systems Including Analog-Digital Interface Circuitry (Not Included in Final Exam) Wireline communications Telephone related (DSL, ISDN, CODEC) Television circuitry (Cable modems, TV tuners ) Ethernet (Gigabit, 10/100BaseT ) Wireless Cellular telephone (CDMA, Analog, GSM.) Wireless LAN (Blue tooth, a/b/g..) Radio (analog & digital), Television Disk drives Fiber-optic systems EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 22

12 E.E. Circuit Course vs. Frequency Range 500kHz IF Band RF Band 10GHz 455kHz 10.7MHz 80MHz 100MHz AM Radio FM Radio Cellular Phone DC Baseband 10MHz EE240, EE247 EE242 EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 23 Wireline Communications Telephone Based EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 24

13 Data Transmission Over Existing Twisted-Pair Phone Lines Central Office Customer Backbone Digital Network Xmitter Receiver Twisted Pair 3 to 5km Xmitter Receiver POTS Data transmitted over existing phone lines covering distances close to 3.5miles Voice-band MODEMs ISDN HDSL, SDSL, ADSL EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 25 Data Transmission Over Twisted-Pair Phone Lines ISDN (U-Interface) Transceiver Central Office Customer Backbone Digital Network Xmitter Receiver Twisted Pair 3 to 5km Xmitter Receiver POTS Full duplex transmission (RX & TX signals sent simultaneously) 160kbit/sec baseband data (80kHz signal bandwidth) Standardized line code 2B1Q (4 level code 3:1:-1:-3) Max. desired loop coverage 18kft (~36dB signal attenuation) Final required BER (bit-error-rate) 10-7 (min. SNDR=27dB) EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 26

14 Analog Front-End Transmit Pulse Shape Standard mandates a pulse mask Ensure min. high-frequency content on the line to avoid spurious coupling into other lines EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 27 Central Office ISDN (U-Interface) Transceiver Echo Problem Customer Xmitter Xmitter Receiver Receiver Transformer coupling to line For a perfectly matched system no leakage of TX signal into RX path Unfortunately, system has poor matching + complicating factor of bridgedtaps Bridged Tap Problem Open Line EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 28

15 Central Office ISDN (U-Interface) Transceiver Echo Problem Customer Xmitter Xmitter Receiver Receiver System full duplex transmission RX & TX signals sent simultaneous (& at the same frequency band) Leakage of TX signal to RX path (echo) Worst case echo could be 30dB higher compared to the received signal!! EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 29 ISDN (U-Interface) Transceiver Echo Cancellation Echo cancellation performed in the digital domain Typically echo cancellation performed by transversal adaptive digital filter Any non-linearity incurred by the analog circuitry makes echo canceller significantly more complex Desirable to have high linearity analog circuitry (75dB range) EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 30

16 Simplified Transceiver Block Diagram CMA Control, maintenance & access unit DFE Decision feedback equalizer DEC Decimation filter REC Reconstruction filter LEC & NEC Linear/non-linear echo-canceller Ref: H. Khorramabadi, et. al"an ANSI standard ISDN transceiver chip set, " IEEE International Solid-State Circuits Conference, vol. XXXII, pp , February 1989 EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 31 Analog Front-End 2b S.C. DAC 2 nd order Butterworth S.C. Filter Class A/B Line Driver 13bit Double-Loop To avoid stringent requirements for nonlinear echo canceller: high linearity analog circuitry needed (~ 75dB) Peak signal frequency 80kHz EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 32

17 Chip Photo EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 33 Data Transmission Over Twisted-Pair Phone Lines DSL (Digital Subscriber Loop) Central Office Customer Backbone Digital Network Xmitter Receiver Twisted Pair 3 to 5km Xmitter Receiver POTS HDSL &SDSL more like higher frequencies Full duplex transmission with RX & TX signals on the same frequency band EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 34

18 Data Transmission Over Twisted-Pair Phone Lines ADSL (Digital Subscriber Loop) Central Office Customer Backbone Digital Network Xmitter Receiver Xmitter Receiver POTS In USA mostly ADSL FDM (frequency division multiplex) Signal from CO to customer on a different band compared to customer to CO Echo cancellation can be performed by simple filtering Data rates up to 8Mbps (much higher compared to ISDN) EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 35 ADSL Signal Characteristics Main difference compared to ISDN: TX & RX signals on different frequency bands Downstream (fast, from CO to customer) 138kHz to 1.1MHz Upstream (slow, from customer to CO) 30kHz to 138kHz Echo cancellation much easier More severe signal attenuation at high frequencies (1MHz DSL v.s. 80kHz ISDN) EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 36

19 Typical ADSL Analog Front-End Central Office Customer Premise ADC 16/14b with 14bit linearity, pipeline with auto. 4.4Ms/s DAC 16/14b with 14bit linearity, S.C. with auto. calibration On-chip filters 3 rd to 4 th order LPF with f c 1.1MHz for downstream and 138kHz upstream (typically continuous-time type filters with on-chip frequency tuning) Ref: D.S. Langford, et al, A BiCMOS Analog Front-End Circuit for an FDM-Based ADSL System, IEEE Journal of Solid State Circuits, Vol. 33, No. 9, pp , Dec EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 37 Typical ADSL Analog Front-End Note: Band selection filters are off-chip due to stringent noise requirements (3nV/rtHz) Discrete LC type Line driver on a separate bipolar chip to achieve required high output signal levels with high power efficiency EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 38

20 Wireless Communication Circuits EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 39 Wireless Circuits Differ from wired comm. circuits Includes RF circuitry+if circuitry+baseband circuits (three different frequency ranges) Signal scenarios in wireless receivers more challenging Requirement for received signal BER in the order of 10-3 (min. SNR~9dB) EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 40

21 Typical Cellular Phone Block Diagram RF Amp Image Reject Filter IF Filter 90 ο A/D Duplexer PA AGC Frequency Synthesizer AGC 90 ο A/D D/A Digital Signal Processor (DSP) AGC D/A EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 41 Superheterodyne Receiver RF Amp Image Reject Filter f 2 -f 1 f 2 + f 1 f c = f 2 -f 1 AGC f 1 Frequency Synthesizer f 2 f 2 -f 1 f 2 + f 1 One or more intermediate frequency (IF) Periodic signal at a frequency equal to the desired RX signal + or IF frequency is provided by a Local Oscillator RX signal is frequency shifted to a fixed frequency (IF filter center frequency) EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 42

22 RF Superheterodyne Receiver Example: CDMA Receiver RF Amp Image Reject Filter fc =85.38MHz BW=1.25MHz 870M 880MHz RX Band 893.3MHz AGC MHz Frequency Synthesizer 85.38MHZ AGC Received frequency is mixed down to a fixed IF frequency and then filtered with a bandpass filter EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 43 Why Image Reject Filter? RF Amp f 2 -f 1 f 3 f 2 f 2 + f 1 f IF = f 2 -f 1 f1 f 2 f 3 f IF f IF f 2 Frequency Synthesizer f 2 -f 1 f 2 + f 1 Any the image frequency of the RX signal with respect to Osc. frequency will fall on the desired RX signal and cause impairment EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 44

23 Why Image Reject Filter? RF Amp Image Reject Filter f 1 f 3 f osc -f 1 f IF = f osc -f 1 f1 f osc f 3 f IF f IF f osc Frequency Synthesizer Image reject filter attenuate signals out of the RX band Typically, image reject filters are ceramic or LC type filters EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 45 Quadrature Downconversion A/D RF Amp AGC cosω C t sinω C t In-phase & Quadrature Channel Select Filters -f IF 0 f IF A/D In systems with phase or freq. modulation, since signal is not symmetric around f IF, directly converting down to baseband corrupts the sidebands Quadrature downconversion overcomes this problem EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 46

24 Effect of Adjacent Channels Relative Signal Amplitude [db] 1st Adjacent Channel Desired Channel f RX f n1 2nd Adjacent Channel f n2 RF Amp Relative Signal Amplitude [db] RF Amp f n1 2f n1 f n2 f n2 2f n2 f n1 Adjacent channels can be as much as 60dB higher compared to the desired RX signal! Linearity of stages prior and including channel selection filters extremely important EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 47 Effect of Adjacent Channels Due to existence of large unwanted signals & limited dynamic range for the front-end circuitry: Can not amplify the signal up front due to linearity issues Need to allocate amplification/filtering numbers to RX blocks carefully Can only amplify when unwanted signals are filtered adequately System design critical with respect to tradeoffs affecting: Gain Linearity Power dissipation Chip area EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 48

25 Wireless Communications Linearity Most critical contributor to non-linearity in wireless communications circuits 3 rd order intermod.: Two forms of linearity measurements: 1dB compression point Useful for the cases where the desired received channel is strong 3 rd order intercept point Good measure for when interferers much larger compared to the desired channel EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 49 Wireless Communications Measure of Linearity 1dB Compression Point 1dB Output Power (dbm) 20log( α Vin) 1 Vout = α Vin + α Vin + α Vin + Input Power (dbm) P 1 db EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 50

26 Wireless Communications Measure of Linearity Third Order Intercept Point ω 1 ω 2 ω ω1 ω 2 ω 2ω 1 ω 2 2ω 2 ω Vout = α1vin + α2vin + α3vin rd IM 3 = 1st 3α3 2 25α5 4 = Vin + Vin α1 8 α1 = 1@ IP3 Typically: IIP 3 P 1dB = 9.6 db OIP3 Output Power (dbm) 20log( α Vin) Most common measure of linearity for wireless circuits: OIP3 & IIP3, Third order output/input intercept point 1 Fundamental 3 rd order IM Input Power (dbm) log α3vin 4 IIP3 EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 51 Homodyne (Direct to Baseband) Receivers RF Amp AGC 90 ο A/D A/D f IF =0 f 1 f osc = f 1 Frequency Synthesizer No intermediate frequency, signal mixed down to baseband Almost all of the filtering performed at baseband Higher levels of integration possible Issue to be aware of: Requirements for the baseband filters extremely stringent Since the local oscillator frequency is exactly at the same freq. as the RX signal freq. can cause major DC offsets & drive the receiver front-end into non-linear region EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 52

27 Example: Wireless LAN b & Bluetooth Ref: H. Darabi, et al, A Dual Mode b/Bluetooth Radio in 0.35um CMOS, IEEE ISSCC, 2003 pp EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 53 Digital IF Receiver (IF sampling) RF Amp AGC A/D cosω C t Digital Multiplier sinω C t Digital LPF Digital Sinewave Generator Digital Multiplier Digital LPF IF signal is converted to digital most of signal processing performed in the digital domain Performance requirement for ADC extremely demanding in terms of noise, linearity, and dynamic range! With advancements of ADCs could be the architecture of choice in the future EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 54

28 Typical Wireless Transmitter Frequency Synthesizer PA 90 ο D/A D S P AGC D/A Transmit signal shipped from DSP to the analog front-end in the form of I& Q signals Signal converted to analog form by D/A Lowpass filter provides pulse shaping In-phase & Quad. Components combined and then mixed up to RF Power amplifier amplifies and provides the low-impedance output EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 55 Analog Filters in Super-Heterodyne Wireless Transceivers RF Amp Image Reject Filter IF Filter 90 ο A/D Duplexer PA AGC Frequency Synthesizer AGC 90 ο A/D D/A Digital Signal Processor (DSP) AGC D/A Filters Function Type RF Filter Image Rejection Ceramic or LC IF Filter Channel selection SAW Base-band Filters Channel Selection Integrated Cont.-Time & Anti-aliasing for ADC or S.C. EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 56

29 Example: Dual Mode CDMA (IS95)& Analog Cellular Phone EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 57 Example: Dual Mode CDMA (IS95)& Analog Cellular Phone Baseband analog circuitry includes: CDMA 4bit flash type ADC clock rate 10MHz 8bit segmented TX DAC clock rate 10MHz (shared with FM) 7 th order elliptic RX lowpass filter corner freq. 650kHz 3 rd order chebyshev TX lowpass filter corner freq. 650kHz FM (analog) 8bit successive approximation ADCs clock rate 360kHz 5 th order chebyshev RX lowpass filter corner frequency 14kHz 3 rd order butterworth TX lowpass filter corner frequency 27kHz EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 58

30 Summary Examples of systems utilizing challenging analog to digital interface circuitry- in the area of wireline & wireless systems discussed Analog circuits still remain the interface connecting the digital world to the real world! EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 59 Acknowledgements The course notes are based on numerous sources including: Prof. P.R. Gray s EE290 course Prof. B. Boser s EE247 course notes Prof. B. Murmann s Nyquist ADC notes Fall 2004 EE247 class feedback Last but not least, Fall 2005 EE247 class The instructor would like to thank the class of 2005 for their enthusiastic & active participation! EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 60

Administrative. Questions can also be asked via . EECS 247- Lecture 26 Bandpass Oversampled ADCs- Systems 2009 Page 1.

Administrative. Questions can also be asked via  . EECS 247- Lecture 26 Bandpass Oversampled ADCs- Systems 2009 Page 1. Administrative Project : Discussions & report submission on Frid. Dec. 4 th (make appointment via sign-up sheet) Student presentations Dec. 3 rd & Dec. 8 th Office hours @ 567 Cory : Tues. Dec. 8 th, 4

More information

Tones. EECS 247 Lecture 21: Oversampled ADC Implementation 2002 B. Boser 1. 1/512 1/16-1/64 b1. 1/10 1 1/4 1/4 1/8 k1z -1 1-z -1 I1. k2z -1.

Tones. EECS 247 Lecture 21: Oversampled ADC Implementation 2002 B. Boser 1. 1/512 1/16-1/64 b1. 1/10 1 1/4 1/4 1/8 k1z -1 1-z -1 I1. k2z -1. Tones 5 th order Σ modulator DC inputs Tones Dither kt/c noise EECS 47 Lecture : Oversampled ADC Implementation B. Boser 5 th Order Modulator /5 /6-/64 b b b b X / /4 /4 /8 kz - -z - I kz - -z - I k3z

More information

EE247 Lecture 26. EE247 Lecture 26

EE247 Lecture 26. EE247 Lecture 26 EE247 Lecture 26 Administrative Final exam: Date: Tues. Dec. 13 th Time: 12:3pm-3:3pm Location: 285 Cory Office hours this week: Tues: 2:3p to 3:3p Wed: 1:3p to 2:3p (extra) Thurs: 2:3p to 3:3p Closed

More information

Summary Last Lecture

Summary Last Lecture Interleaved ADCs EE47 Lecture 4 Oversampled ADCs Why oversampling? Pulse-count modulation Sigma-delta modulation 1-Bit quantization Quantization error (noise) spectrum SQNR analysis Limit cycle oscillations

More information

The Case for Oversampling

The Case for Oversampling EE47 Lecture 4 Oversampled ADCs Why oversampling? Pulse-count modulation Sigma-delta modulation 1-Bit quantization Quantization error (noise) spectrum SQNR analysis Limit cycle oscillations nd order ΣΔ

More information

Receiver Design. Prof. Tzong-Lin Wu EMC Laboratory Department of Electrical Engineering National Taiwan University 2011/2/21

Receiver Design. Prof. Tzong-Lin Wu EMC Laboratory Department of Electrical Engineering National Taiwan University 2011/2/21 Receiver Design Prof. Tzong-Lin Wu EMC Laboratory Department of Electrical Engineering National Taiwan University 2011/2/21 MW & RF Design / Prof. T. -L. Wu 1 The receiver mush be very sensitive to -110dBm

More information

Radio Receiver Architectures and Analysis

Radio Receiver Architectures and Analysis Radio Receiver Architectures and Analysis Robert Wilson December 6, 01 Abstract This article discusses some common receiver architectures and analyzes some of the impairments that apply to each. 1 Contents

More information

EE247 Lecture 25. Oversampled ADCs (continued)

EE247 Lecture 25. Oversampled ADCs (continued) EE247 Lecture 25 Oversampled ADCs (continued) Higher order ΣΔ modulators Last lecture Cascaded ΣΔ modulators (MASH) (continued) Single-loop single-quantizer modulators with multi-order filtering in the

More information

Receiver Architecture

Receiver Architecture Receiver Architecture Receiver basics Channel selection why not at RF? BPF first or LNA first? Direct digitization of RF signal Receiver architectures Sub-sampling receiver noise problem Heterodyne receiver

More information

EE247 Lecture 26. This lecture is taped on Wed. Nov. 28 th due to conflict of regular class hours with a meeting

EE247 Lecture 26. This lecture is taped on Wed. Nov. 28 th due to conflict of regular class hours with a meeting EE47 Lecture 6 This lecture is taped on Wed. Nov. 8 th due to conflict of regular class hours with a meeting Any questions regarding this lecture could be discussed during regular office hours or in class

More information

Summary Last Lecture

Summary Last Lecture EE47 Lecture 5 Pipelined ADCs (continued) How many bits per stage? Algorithmic ADCs utilizing pipeline structure Advanced background calibration techniques Oversampled ADCs Why oversampling? Pulse-count

More information

Mansour Keramat. * No part may be reproduced without permission from the author. 1- Application of Data Converters. Contents

Mansour Keramat. * No part may be reproduced without permission from the author. 1- Application of Data Converters. Contents Mansour Keramat Analog and Mixed Signal Laboratory Electrical & Computer Eng. Dept. University of Connecticut Storrs, CT 06269 E-mail: keramat@engr.uconn.edu URL: http://www.engr.uconn.edu/~keramat * No

More information

TSEK38 Radio Frequency Transceiver Design: Project work B

TSEK38 Radio Frequency Transceiver Design: Project work B TSEK38 Project Work: Task specification A 1(15) TSEK38 Radio Frequency Transceiver Design: Project work B Course home page: Course responsible: http://www.isy.liu.se/en/edu/kurs/tsek38/ Ted Johansson (ted.johansson@liu.se)

More information

RF/IF Terminology and Specs

RF/IF Terminology and Specs RF/IF Terminology and Specs Contributors: Brad Brannon John Greichen Leo McHugh Eamon Nash Eberhard Brunner 1 Terminology LNA - Low-Noise Amplifier. A specialized amplifier to boost the very small received

More information

ISSCC 2003 / SESSION 20 / WIRELESS LOCAL AREA NETWORKING / PAPER 20.5

ISSCC 2003 / SESSION 20 / WIRELESS LOCAL AREA NETWORKING / PAPER 20.5 ISSCC 2003 / SESSION 20 / WIRELESS LOCAL AREA NETWORKING / PAPER 20.5 20.5 A 2.4GHz CMOS Transceiver and Baseband Processor Chipset for 802.11b Wireless LAN Application George Chien, Weishi Feng, Yungping

More information

Analog-to-Digital Converters

Analog-to-Digital Converters EE47 Lecture 3 Oversampled ADCs Why oversampling? Pulse-count modulation Sigma-delta modulation 1-Bit quantization Quantization error (noise) spectrum SQNR analysis Limit cycle oscillations nd order ΣΔ

More information

Introduction to Receivers

Introduction to Receivers Introduction to Receivers Purpose: translate RF signals to baseband Shift frequency Amplify Filter Demodulate Why is this a challenge? Interference Large dynamic range required Many receivers must be capable

More information

RADIO RECEIVERS ECE 3103 WIRELESS COMMUNICATION SYSTEMS

RADIO RECEIVERS ECE 3103 WIRELESS COMMUNICATION SYSTEMS RADIO RECEIVERS ECE 3103 WIRELESS COMMUNICATION SYSTEMS FUNCTIONS OF A RADIO RECEIVER The main functions of a radio receiver are: 1. To intercept the RF signal by using the receiver antenna 2. Select the

More information

TSEK02: Radio Electronics Lecture 8: RX Nonlinearity Issues, Demodulation. Ted Johansson, EKS, ISY

TSEK02: Radio Electronics Lecture 8: RX Nonlinearity Issues, Demodulation. Ted Johansson, EKS, ISY TSEK02: Radio Electronics Lecture 8: RX Nonlinearity Issues, Demodulation Ted Johansson, EKS, ISY RX Nonlinearity Issues: 2.2, 2.4 Demodulation: not in the book 2 RX nonlinearities System Nonlinearity

More information

Research and Development Activities in RF and Analog IC Design. RFIC Building Blocks. Single-Chip Transceiver Systems (I) Howard Luong

Research and Development Activities in RF and Analog IC Design. RFIC Building Blocks. Single-Chip Transceiver Systems (I) Howard Luong Research and Development Activities in RF and Analog IC Design Howard Luong Analog Research Laboratory Department of Electrical and Electronic Engineering Hong Kong University of Science and Technology

More information

EE247 Lecture 24. EE247 Lecture 24

EE247 Lecture 24. EE247 Lecture 24 EE247 Lecture 24 Administrative EE247 Final exam: Date: Wed. Dec. 15 th Time: -12:30pm-3:30pm- Location: 289 Cory Closed book/course notes No calculators/cell phones/pdas/computers Bring one 8x11 paper

More information

TSEK02: Radio Electronics Lecture 8: RX Nonlinearity Issues, Demodulation. Ted Johansson, EKS, ISY

TSEK02: Radio Electronics Lecture 8: RX Nonlinearity Issues, Demodulation. Ted Johansson, EKS, ISY TSEK02: Radio Electronics Lecture 8: RX Nonlinearity Issues, Demodulation Ted Johansson, EKS, ISY 2 RX Nonlinearity Issues, Demodulation RX nonlinearities (parts of 2.2) System Nonlinearity Sensitivity

More information

APPLICATION NOTE 3942 Optimize the Buffer Amplifier/ADC Connection

APPLICATION NOTE 3942 Optimize the Buffer Amplifier/ADC Connection Maxim > Design Support > Technical Documents > Application Notes > Communications Circuits > APP 3942 Maxim > Design Support > Technical Documents > Application Notes > High-Speed Interconnect > APP 3942

More information

Session 3. CMOS RF IC Design Principles

Session 3. CMOS RF IC Design Principles Session 3 CMOS RF IC Design Principles Session Delivered by: D. Varun 1 Session Topics Standards RF wireless communications Multi standard RF transceivers RF front end architectures Frequency down conversion

More information

ELT Receiver Architectures and Signal Processing Exam Requirements and Model Questions 2018

ELT Receiver Architectures and Signal Processing Exam Requirements and Model Questions 2018 TUT/ICE 1 ELT-44006 Receiver Architectures and Signal Processing Exam Requirements and Model Questions 2018 General idea of these Model Questions is to highlight the central knowledge expected to be known

More information

EE247 Lecture 26. EE247 Lecture 26

EE247 Lecture 26. EE247 Lecture 26 EE247 Lecture 26 Administrative Project submission: Project reports due Dec. 5th Please make an appointment with the instructor for a 15minute meeting on Monday Dec. 8 th Prepare to give a 3 to 7 minute

More information

EE247 Lecture 26. EE247 Lecture 26

EE247 Lecture 26. EE247 Lecture 26 EE247 Lecture 26 Administrative EE247 Final exam: Date: Mon. Dec. 18 th Time: 12:30pm-3:30pm Location: 241 Cory Hall Extra office hours: Thurs. Dec. 14 th, 10:30am-12pm Closed book/course notes No calculators/cell

More information

An All CMOS, 2.4 GHz, Fully Adaptive, Scalable, Frequency Hopped Transceiver

An All CMOS, 2.4 GHz, Fully Adaptive, Scalable, Frequency Hopped Transceiver An All CMOS, 2.4 GHz, Fully Adaptive, Scalable, Frequency Hopped Transceiver Farbod Behbahani John Leete Alexandre Kral Shahrzad Tadjpour Karapet Khanoyan Paul J. Chang Hooman Darabi Maryam Rofougaran

More information

ADI 2006 RF Seminar. Chapter II RF/IF Components and Specifications for Receivers

ADI 2006 RF Seminar. Chapter II RF/IF Components and Specifications for Receivers ADI 2006 RF Seminar Chapter II RF/IF Components and Specifications for Receivers 1 RF/IF Components and Specifications for Receivers Fixed Gain and Variable Gain Amplifiers IQ Demodulators Analog-to-Digital

More information

RF Receiver Hardware Design

RF Receiver Hardware Design RF Receiver Hardware Design Bill Sward bsward@rtlogic.com February 18, 2011 Topics Customer Requirements Communication link environment Performance Parameters/Metrics Frequency Conversion Architectures

More information

EE247 Lecture 22. Figures of merit (FOM) and trends for ADCs How to use/not use FOM. EECS 247 Lecture 22: Data Converters 2004 H. K.

EE247 Lecture 22. Figures of merit (FOM) and trends for ADCs How to use/not use FOM. EECS 247 Lecture 22: Data Converters 2004 H. K. EE247 Lecture 22 Pipelined ADCs Combining the bits Stage implementation Circuits Noise budgeting Figures of merit (FOM) and trends for ADCs How to use/not use FOM Oversampled ADCs EECS 247 Lecture 22:

More information

TSEK38: Radio Frequency Transceiver Design Lecture 3: Superheterodyne TRX design

TSEK38: Radio Frequency Transceiver Design Lecture 3: Superheterodyne TRX design TSEK38: Radio Frequency Transceiver Design Lecture 3: Superheterodyne TRX design Ted Johansson, ISY ted.johansson@liu.se 2 Outline of lecture 3 Introduction RF TRX architectures (3) Superheterodyne architecture

More information

A 1.9GHz Single-Chip CMOS PHS Cellphone

A 1.9GHz Single-Chip CMOS PHS Cellphone A 1.9GHz Single-Chip CMOS PHS Cellphone IEEE JSSC, Vol. 41, No.12, December 2006 William Si, Srenik Mehta, Hirad Samavati, Manolis Terrovitis, Michael Mack, Keith Onodera, Steve Jen, Susan Luschas, Justin

More information

RF Integrated Circuits

RF Integrated Circuits Introduction and Motivation RF Integrated Circuits The recent explosion in the radio frequency (RF) and wireless market has caught the semiconductor industry by surprise. The increasing demand for affordable

More information

Fundamentals of Data Converters. DAVID KRESS Director of Technical Marketing

Fundamentals of Data Converters. DAVID KRESS Director of Technical Marketing Fundamentals of Data Converters DAVID KRESS Director of Technical Marketing 9/14/2016 Analog to Electronic Signal Processing Sensor (INPUT) Amp Converter Digital Processor Actuator (OUTPUT) Amp Converter

More information

Radioelectronics RF CMOS Transceiver Design

Radioelectronics RF CMOS Transceiver Design Radioelectronics RF CMOS Transceiver Design http://www.ek.isy.liu.se/ courses/tsek26/ Jerzy Dąbrowski Division of Electronic Devices Department of Electrical Engineering (ISY) Linköping University e-mail:

More information

FYS3240 PC-based instrumentation and microcontrollers. Signal sampling. Spring 2015 Lecture #5

FYS3240 PC-based instrumentation and microcontrollers. Signal sampling. Spring 2015 Lecture #5 FYS3240 PC-based instrumentation and microcontrollers Signal sampling Spring 2015 Lecture #5 Bekkeng, 29.1.2015 Content Aliasing Nyquist (Sampling) ADC Filtering Oversampling Triggering Analog Signal Information

More information

Advanced AD/DA converters. ΔΣ DACs. Overview. Motivations. System overview. Why ΔΣ DACs

Advanced AD/DA converters. ΔΣ DACs. Overview. Motivations. System overview. Why ΔΣ DACs Advanced AD/DA converters Overview Why ΔΣ DACs ΔΣ DACs Architectures for ΔΣ DACs filters Smoothing filters Pietro Andreani Dept. of Electrical and Information Technology Lund University, Sweden Advanced

More information

EECS 247 Analog-Digital Interface Integrated Circuits 2005

EECS 247 Analog-Digital Interface Integrated Circuits 2005 EES 47 Analog-Digital Interface Integrated ircuits 5 Instructor: Haideh Khorramabadi UB Department of Electrical Engineering and omputer Sciences EES 47 Lecture 1: Introduction 5 H.K. Page 1 Administrative

More information

Pipeline vs. Sigma Delta ADC for Communications Applications

Pipeline vs. Sigma Delta ADC for Communications Applications Pipeline vs. Sigma Delta ADC for Communications Applications Noel O Riordan, Mixed-Signal IP Group, S3 Semiconductors noel.oriordan@s3group.com Introduction The Analog-to-Digital Converter (ADC) is a key

More information

Communication Channels

Communication Channels Communication Channels wires (PCB trace or conductor on IC) optical fiber (attenuation 4dB/km) broadcast TV (50 kw transmit) voice telephone line (under -9 dbm or 110 µw) walkie-talkie: 500 mw, 467 MHz

More information

FYS3240 PC-based instrumentation and microcontrollers. Signal sampling. Spring 2017 Lecture #5

FYS3240 PC-based instrumentation and microcontrollers. Signal sampling. Spring 2017 Lecture #5 FYS3240 PC-based instrumentation and microcontrollers Signal sampling Spring 2017 Lecture #5 Bekkeng, 30.01.2017 Content Aliasing Sampling Analog to Digital Conversion (ADC) Filtering Oversampling Triggering

More information

1 Introduction to Highly Integrated and Tunable RF Receiver Front Ends

1 Introduction to Highly Integrated and Tunable RF Receiver Front Ends 1 Introduction to Highly Integrated and Tunable RF Receiver Front Ends 1.1 Introduction With the ever-increasing demand for instant access to data over wideband communication channels, the quest for a

More information

Lecture 1, Introduction and Background

Lecture 1, Introduction and Background EE 338L CMOS Analog Integrated Circuit Design Lecture 1, Introduction and Background With the advances of VLSI (very large scale integration) technology, digital signal processing is proliferating and

More information

Outline. Communications Engineering 1

Outline. Communications Engineering 1 Outline Introduction Signal, random variable, random process and spectra Analog modulation Analog to digital conversion Digital transmission through baseband channels Signal space representation Optimal

More information

CMOS RFIC Design for Direct Conversion Receivers. Zhaofeng ZHANG Supervisor: Dr. Jack Lau

CMOS RFIC Design for Direct Conversion Receivers. Zhaofeng ZHANG Supervisor: Dr. Jack Lau CMOS RFIC Design for Direct Conversion Receivers Zhaofeng ZHANG Supervisor: Dr. Jack Lau Outline of Presentation Background Introduction Thesis Contributions Design Issues and Solutions A Direct Conversion

More information

EE247 Lecture 27. EE247 Lecture 27

EE247 Lecture 27. EE247 Lecture 27 EE247 Lecture 27 Administrative EE247 Final exam: Date: Wed. Dec. 19 th Time: 12:30pm-3:30pm Location: 70 Evans Hall Extra office hours: Thurs. Dec. 13 th, 10:am2pm Closed course notes/books No calculators/cell

More information

4- Single Side Band (SSB)

4- Single Side Band (SSB) 4- Single Side Band (SSB) It can be shown that: s(t) S.S.B = m(t) cos ω c t ± m h (t) sin ω c t -: USB ; +: LSB m(t) X m(t) cos ω c t -π/ cos ω c t -π/ + s S.S.B m h (t) X m h (t) ± sin ω c t 1 Tone Modulation:

More information

THE BASICS OF RADIO SYSTEM DESIGN

THE BASICS OF RADIO SYSTEM DESIGN THE BASICS OF RADIO SYSTEM DESIGN Mark Hunter * Abstract This paper is intended to give an overview of the design of radio transceivers to the engineer new to the field. It is shown how the requirements

More information

Analog and Telecommunication Electronics

Analog and Telecommunication Electronics Politecnico di Torino - ICT School Analog and Telecommunication Electronics E1 - Filters type and design» Filter taxonomy and parameters» Design flow and tools» FilterCAD example» Basic II order cells

More information

Wideband Receiver for Communications Receiver or Spectrum Analysis Usage: A Comparison of Superheterodyne to Quadrature Down Conversion

Wideband Receiver for Communications Receiver or Spectrum Analysis Usage: A Comparison of Superheterodyne to Quadrature Down Conversion A Comparison of Superheterodyne to Quadrature Down Conversion Tony Manicone, Vanteon Corporation There are many different system architectures which can be used in the design of High Frequency wideband

More information

Advantages of Analog Representation. Varies continuously, like the property being measured. Represents continuous values. See Figure 12.

Advantages of Analog Representation. Varies continuously, like the property being measured. Represents continuous values. See Figure 12. Analog Signals Signals that vary continuously throughout a defined range. Representative of many physical quantities, such as temperature and velocity. Usually a voltage or current level. Digital Signals

More information

Radio Research Directions. Behzad Razavi Communication Circuits Laboratory Electrical Engineering Department University of California, Los Angeles

Radio Research Directions. Behzad Razavi Communication Circuits Laboratory Electrical Engineering Department University of California, Los Angeles Radio Research Directions Behzad Razavi Communication Circuits Laboratory Electrical Engineering Department University of California, Los Angeles Outline Introduction Millimeter-Wave Transceivers - Applications

More information

EECS 247 Analog-Digital Interface Integrated Circuits Lecture 1: Introduction

EECS 247 Analog-Digital Interface Integrated Circuits Lecture 1: Introduction EECS 247 Analog-Digital Interface Integrated Circuits 2008 Instructor: Haideh Khorramabadi UC Berkeley Department of Electrical Engineering and Computer Sciences Lecture 1: Introduction EECS 247 Lecture

More information

Speech, music, images, and video are examples of analog signals. Each of these signals is characterized by its bandwidth, dynamic range, and the

Speech, music, images, and video are examples of analog signals. Each of these signals is characterized by its bandwidth, dynamic range, and the Speech, music, images, and video are examples of analog signals. Each of these signals is characterized by its bandwidth, dynamic range, and the nature of the signal. For instance, in the case of audio

More information

ADI 2006 RF Seminar. Chapter VI A Detailed Look at Wireless Signal Chain Architectures

ADI 2006 RF Seminar. Chapter VI A Detailed Look at Wireless Signal Chain Architectures DI 2006 R Seminar Chapter VI Detailed Look at Wireless Chain rchitectures 1 Receiver rchitectures Receivers are designed to detect and demodulate the desired signal and remove unwanted blockers Receiver

More information

Differential Amplifiers

Differential Amplifiers Differential Amplifiers Benefits of Differential Signal Processing The Benefits Become Apparent when Trying to get the Most Speed and/or Resolution out of a Design Avoid Grounding/Return Noise Problems

More information

The Physical Layer Outline

The Physical Layer Outline The Physical Layer Outline Theoretical Basis for Data Communications Digital Modulation and Multiplexing Guided Transmission Media (copper and fiber) Public Switched Telephone Network and DSLbased Broadband

More information

Subminiature, Low power DACs Address High Channel Density Transmitter Systems

Subminiature, Low power DACs Address High Channel Density Transmitter Systems Subminiature, Low power DACs Address High Channel Density Transmitter Systems By: Analog Devices, Inc. (ADI) Daniel E. Fague, Applications Engineering Manager, High Speed Digital to Analog Converters Group

More information

ELEN 701 RF & Microwave Systems Engineering. Lecture 2 September 27, 2006 Dr. Michael Thorburn Santa Clara University

ELEN 701 RF & Microwave Systems Engineering. Lecture 2 September 27, 2006 Dr. Michael Thorburn Santa Clara University ELEN 701 RF & Microwave Systems Engineering Lecture 2 September 27, 2006 Dr. Michael Thorburn Santa Clara University Lecture 2 Radio Architecture and Design Considerations, Part I Architecture Superheterodyne

More information

INTRODUCTION TO TRANSCEIVER DESIGN ECE3103 ADVANCED TELECOMMUNICATION SYSTEMS

INTRODUCTION TO TRANSCEIVER DESIGN ECE3103 ADVANCED TELECOMMUNICATION SYSTEMS INTRODUCTION TO TRANSCEIVER DESIGN ECE3103 ADVANCED TELECOMMUNICATION SYSTEMS FUNCTIONS OF A TRANSMITTER The basic functions of a transmitter are: a) up-conversion: move signal to desired RF carrier frequency.

More information

Lecture 15: Introduction to Mixers

Lecture 15: Introduction to Mixers EECS 142 Lecture 15: Introduction to Mixers Prof. Ali M. Niknejad University of California, Berkeley Copyright c 2005 by Ali M. Niknejad A. M. Niknejad University of California, Berkeley EECS 142 Lecture

More information

National Instruments Flex II ADC Technology The Flexible Resolution Technology inside the NI PXI-5922 Digitizer

National Instruments Flex II ADC Technology The Flexible Resolution Technology inside the NI PXI-5922 Digitizer National Instruments Flex II ADC Technology The Flexible Resolution Technology inside the NI PXI-5922 Digitizer Kaustubh Wagle and Niels Knudsen National Instruments, Austin, TX Abstract Single-bit delta-sigma

More information

6.976 High Speed Communication Circuits and Systems Lecture 20 Performance Measures of Wireless Communication

6.976 High Speed Communication Circuits and Systems Lecture 20 Performance Measures of Wireless Communication 6.976 High Speed Communication Circuits and Systems Lecture 20 Performance Measures of Wireless Communication Michael Perrott Massachusetts Institute of Technology Copyright 2003 by Michael H. Perrott

More information

2.4 A/D Converter Survey Linearity

2.4 A/D Converter Survey Linearity 2.4 A/D Converter Survey 21 mum and minimum power spectral density (PSD) levels. In the case of a single-channel receiver, this implies the gain control range of the VGA, while in a multi-channel receiver

More information

RFID Systems: Radio Architecture

RFID Systems: Radio Architecture RFID Systems: Radio Architecture 1 A discussion of radio architecture and RFID. What are the critical pieces? Familiarity with how radio and especially RFID radios are designed will allow you to make correct

More information

Analog and Telecommunication Electronics

Analog and Telecommunication Electronics Politecnico di Torino - ICT School Analog and Telecommunication Electronics E1 - Filters type and design» Filter taxonomy and parameters» Design flow and tools» FilterCAD example» Basic II order cells

More information

Keywords: GPS, receiver, GPS receiver, MAX2769, 2769, 1575MHz, Integrated GPS Receiver, Global Positioning System

Keywords: GPS, receiver, GPS receiver, MAX2769, 2769, 1575MHz, Integrated GPS Receiver, Global Positioning System Maxim > Design Support > Technical Documents > User Guides > APP 3910 Keywords: GPS, receiver, GPS receiver, MAX2769, 2769, 1575MHz, Integrated GPS Receiver, Global Positioning System USER GUIDE 3910 User's

More information

Low-Power Decimation Filter Design for Multi-Standard Transceiver Applications

Low-Power Decimation Filter Design for Multi-Standard Transceiver Applications i Low-Power Decimation Filter Design for Multi-Standard Transceiver Applications by Carol J. Barrett Master of Science in Electrical Engineering University of California, Berkeley Professor Paul R. Gray,

More information

CHAPTER - 6 PIN DIODE CONTROL CIRCUITS FOR WIRELESS COMMUNICATIONS SYSTEMS

CHAPTER - 6 PIN DIODE CONTROL CIRCUITS FOR WIRELESS COMMUNICATIONS SYSTEMS CHAPTER - 6 PIN DIODE CONTROL CIRCUITS FOR WIRELESS COMMUNICATIONS SYSTEMS 2 NOTES 3 INTRODUCTION PIN DIODE CONTROL CIRCUITS FOR WIRELESS COMMUNICATIONS SYSTEMS Chapter 6 discusses PIN Control Circuits

More information

Fully integrated UHF RFID mobile reader with power amplifiers using System-in-Package (SiP)

Fully integrated UHF RFID mobile reader with power amplifiers using System-in-Package (SiP) Fully integrated UHF RFID mobile reader with power amplifiers using System-in-Package (SiP) Hyemin Yang 1, Jongmoon Kim 2, Franklin Bien 3, and Jongsoo Lee 1a) 1 School of Information and Communications,

More information

Co-existence. DECT/CAT-iq vs. other wireless technologies from a HW perspective

Co-existence. DECT/CAT-iq vs. other wireless technologies from a HW perspective Co-existence DECT/CAT-iq vs. other wireless technologies from a HW perspective Abstract: This White Paper addresses three different co-existence issues (blocking, sideband interference, and inter-modulation)

More information

Cascaded Noise-Shaping Modulators for Oversampled Data Conversion

Cascaded Noise-Shaping Modulators for Oversampled Data Conversion Cascaded Noise-Shaping Modulators for Oversampled Data Conversion Bruce A. Wooley Stanford University B. Wooley, Stanford, 2004 1 Outline Oversampling modulators for A/D conversion Cascaded noise-shaping

More information

UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences

UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences Final Exam EECS 247 H. Khorramabadi Tues., Dec. 14, 2010 FALL 2010 Name: SID: Total number of

More information

Telecommunication Electronics

Telecommunication Electronics Politecnico di Torino ICT School Telecommunication Electronics C5 - Special A/D converters» Logarithmic conversion» Approximation, A and µ laws» Differential converters» Oversampling, noise shaping Logarithmic

More information

Electronics A/D and D/A converters

Electronics A/D and D/A converters Electronics A/D and D/A converters Prof. Márta Rencz, Gábor Takács, Dr. György Bognár, Dr. Péter G. Szabó BME DED December 1, 2014 1 / 26 Introduction The world is analog, signal processing nowadays is

More information

A DSP IMPLEMENTED DIGITAL FM MULTIPLEXING SYSTEM

A DSP IMPLEMENTED DIGITAL FM MULTIPLEXING SYSTEM A DSP IMPLEMENTED DIGITAL FM MULTIPLEXING SYSTEM Item Type text; Proceedings Authors Rosenthal, Glenn K. Publisher International Foundation for Telemetering Journal International Telemetering Conference

More information

Using High Speed Differential Amplifiers to Drive Analog to Digital Converters

Using High Speed Differential Amplifiers to Drive Analog to Digital Converters Using High Speed Differential Amplifiers to Drive Analog to Digital Converters Selecting The Best Differential Amplifier To Drive An Analog To Digital Converter The right high speed differential amplifier

More information

A 1MHz-64MHz Active RC TI-LPF with Variable Gain for SDR Receiver in 65-nm CMOS

A 1MHz-64MHz Active RC TI-LPF with Variable Gain for SDR Receiver in 65-nm CMOS 2017 5th International Conference on Computer, Automation and Power Electronics (CAPE 2017) A 1MHz-64MHz Active RC TI-LPF with Variable Gain for SDR Receiver in 65-nm CMOS Chaoxuan Zhang1, a, *, Xunping

More information

UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering And Computer Sciences MULTIFREQUENCY CELL IMPEDENCE MEASUREMENT

UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering And Computer Sciences MULTIFREQUENCY CELL IMPEDENCE MEASUREMENT UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering And Computer Sciences MULTIFREQUENCY CELL IMPEDENCE MEASUREMENT EE247 Term Project Eddie Ng Mounir Bohsali Professor

More information

Problems from the 3 rd edition

Problems from the 3 rd edition (2.1-1) Find the energies of the signals: a) sin t, 0 t π b) sin t, 0 t π c) 2 sin t, 0 t π d) sin (t-2π), 2π t 4π Problems from the 3 rd edition Comment on the effect on energy of sign change, time shifting

More information

ISSCC 2003 / SESSION 20 / WIRELESS LOCAL AREA NETWORKING / PAPER 20.2

ISSCC 2003 / SESSION 20 / WIRELESS LOCAL AREA NETWORKING / PAPER 20.2 ISSCC 2003 / SESSION 20 / WIRELESS LOCAL AREA NETWORKING / PAPER 20.2 20.2 A Digitally Calibrated 5.15-5.825GHz Transceiver for 802.11a Wireless LANs in 0.18µm CMOS I. Bouras 1, S. Bouras 1, T. Georgantas

More information

LOW SAMPLING RATE OPERATION FOR BURR-BROWN

LOW SAMPLING RATE OPERATION FOR BURR-BROWN LOW SAMPLING RATE OPERATION FOR BURR-BROWN TM AUDIO DATA CONVERTERS AND CODECS By Robert Martin and Hajime Kawai PURPOSE This application bulletin describes the operation and performance of Burr-Brown

More information

How to turn an ADC into a DAC: A 110dB THD, 18mW DAC using sampling of the output and feedback to reduce distortion

How to turn an ADC into a DAC: A 110dB THD, 18mW DAC using sampling of the output and feedback to reduce distortion How to turn an ADC into a DAC: A 110dB THD, 18mW DAC using sampling of the output and feedback to reduce distortion Axel Thomsen, Design Manager Silicon Laboratories Inc. Austin, TX 1 Why this talk? A

More information

GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION JULY-2012 SCHEME OF VALUATION

GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION JULY-2012 SCHEME OF VALUATION GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION JULY-0 SCHEME OF VALUATION Subject Code: 40 Subject: PART - A 0. Which region of the transistor

More information

ISSCC 2006 / SESSION 33 / MOBILE TV / 33.4

ISSCC 2006 / SESSION 33 / MOBILE TV / 33.4 33.4 A Dual-Channel Direct-Conversion CMOS Receiver for Mobile Multimedia Broadcasting Vincenzo Peluso, Yang Xu, Peter Gazzerro, Yiwu Tang, Li Liu, Zhenbiao Li, Wei Xiong, Charles Persico Qualcomm, San

More information

Analog and Telecommunication Electronics

Analog and Telecommunication Electronics Politecnico di Torino Electronic Eng. Master Degree Analog and Telecommunication Electronics D6 - High speed A/D converters» Spectral performance analysis» Undersampling techniques» Sampling jitter» Interleaving

More information

Oversampling Converters

Oversampling Converters Oversampling Converters Behzad Razavi Electrical Engineering Department University of California, Los Angeles Outline Basic Concepts First- and Second-Order Loops Effect of Circuit Nonidealities Cascaded

More information

Low Distortion Mixer AD831

Low Distortion Mixer AD831 a FEATURES Doubly-Balanced Mixer Low Distortion +2 dbm Third Order Intercept (IP3) + dbm 1 db Compression Point Low LO Drive Required: dbm Bandwidth MHz RF and LO Input Bandwidths 2 MHz Differential Current

More information

Introduction to Surface Acoustic Wave (SAW) Devices

Introduction to Surface Acoustic Wave (SAW) Devices May 31, 2018 Introduction to Surface Acoustic Wave (SAW) Devices Part 7: Basics of RF Circuits Ken-ya Hashimoto Chiba University k.hashimoto@ieee.org http://www.te.chiba-u.jp/~ken Contents Noise Figure

More information

Analog and RF circuit techniques in nanometer CMOS

Analog and RF circuit techniques in nanometer CMOS Analog and RF circuit techniques in nanometer CMOS Bram Nauta University of Twente The Netherlands http://icd.ewi.utwente.nl b.nauta@utwente.nl UNIVERSITY OF TWENTE. Outline Introduction Balun-LNA-Mixer

More information

9 Hints for Making Better Measurements Using RF Signal Generators. Application Note 1390

9 Hints for Making Better Measurements Using RF Signal Generators. Application Note 1390 9 Hints for Making Better Measurements Using RF Signal Generators Application Note 1390 Signal sources provide precise, highly stable test signals for a variety of component and system test applications.

More information

Reconfigurable 6 GHz Vector Signal Transceiver with I/Q Interface

Reconfigurable 6 GHz Vector Signal Transceiver with I/Q Interface SPECIFICATIONS PXIe-5645 Reconfigurable 6 GHz Vector Signal Transceiver with I/Q Interface Contents Definitions...2 Conditions... 3 Frequency...4 Frequency Settling Time... 4 Internal Frequency Reference...

More information

A 25MS/s 14b 200mW Σ Modulator in 0.18µm CMOS

A 25MS/s 14b 200mW Σ Modulator in 0.18µm CMOS UT Mixed-Signal/RF Integrated Circuits Seminar Series A 25MS/s 14b 200mW Σ Modulator in 0.18µm CMOS Pio Balmelli April 19 th, Austin TX 2 Outline VDSL specifications Σ A/D converter features Broadband

More information

EE247 Lecture 11. Example: Switched-capacitor filters in CODEC integrated circuits. Switched-capacitor filter design summary

EE247 Lecture 11. Example: Switched-capacitor filters in CODEC integrated circuits. Switched-capacitor filter design summary EE47 Lecture 11 Filters (continued) Example: Switched-capacitor filters in CODEC integrated circuits Switched-capacitor filter design summary Comparison of various filter topologies New Topic: Data Converters

More information

Twelve voice signals, each band-limited to 3 khz, are frequency -multiplexed using 1 khz guard bands between channels and between the main carrier

Twelve voice signals, each band-limited to 3 khz, are frequency -multiplexed using 1 khz guard bands between channels and between the main carrier Twelve voice signals, each band-limited to 3 khz, are frequency -multiplexed using 1 khz guard bands between channels and between the main carrier and the first channel. The modulation of the main carrier

More information

INTRODUCTION TO COMMUNICATION SYSTEMS AND TRANSMISSION MEDIA

INTRODUCTION TO COMMUNICATION SYSTEMS AND TRANSMISSION MEDIA COMM.ENG INTRODUCTION TO COMMUNICATION SYSTEMS AND TRANSMISSION MEDIA 9/9/2017 LECTURES 1 Objectives To give a background on Communication system components and channels (media) A distinction between analogue

More information

Optimizing the Performance of Very Wideband Direct Conversion Receivers

Optimizing the Performance of Very Wideband Direct Conversion Receivers Optimizing the Performance of Very Wideband Direct Conversion Receivers Design Note 1027 John Myers, Michiel Kouwenhoven, James Wong, Vladimir Dvorkin Introduction Zero-IF receivers are not new; they have

More information

EECS 242: Receiver Architectures

EECS 242: Receiver Architectures : Receiver Architectures Outline Complex baseband equivalent of a bandpass signal Double-conversion single-quadrature (Superheterodyne) Direct-conversion (Single-conversion single-quad, homodyne, zero-)

More information

Technician License Course Chapter 3 Types of Radios and Radio Circuits. Module 7

Technician License Course Chapter 3 Types of Radios and Radio Circuits. Module 7 Technician License Course Chapter 3 Types of Radios and Radio Circuits Module 7 Radio Block Diagrams Radio Circuits can be shown as functional blocks connected together. Knowing the description of common

More information