EE247 Lecture 11. Switched-Capacitor Filters (continued) Effect of non-idealities Bilinear switched-capacitor filters Filter design summary

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1 EE247 Lecture 11 Switched-Capacitor Filters (continued) Effect of non-idealities Bilinear switched-capacitor filters Filter design summary Comparison of various filter topologies Data Converters EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 1 Summary Last Lecture Switched-capacitor filter design considerations DDI & LDI Integrator characteristics Bottom-plate LDI integrator overcomes parasitic sensitivity issues Continuous-time and complex conjugate terminations Use of T-networks to implement high capacitor ratios Switched-capacitor filters utilizing double sampling technique Effect of non-idealities Opamp finite gain Opamp finite bandwidth (this lecture) Finite slew rate of the opamp (this lecture) EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 2

2 Vi+ Vi- f1 f 2 Effect of Opamp Non-Idealities Finite Opamp Bandwidth C I - C s Vo + Unity-gain-freq. Input/Output z-transform = f t V o f 2 settling error T=1/f s time Opamp does not slew (will be revisited) Opamp has only one pole exponential settling Ref: K.Martin, A. Sedra, Effect of the OPamp Finite Gain & Bandwidth on the Performance of Switched- Capacitor Filters," IEEE Trans. Circuits Syst., vol. CAS-28, no. 8, pp , Aug EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 3 Vi+ Assumption- Vi- f1 f 2 Effect of Opamp Non-Idealities Finite Opamp Bandwidth C I - C s Vo + Unity-gain-freq. Input/Output z-transform = f t V o f 2 settling error T=1/f s time k k CI 1 H actual (Z) H 1 e e Z ideal(z) + CI + Cs where k = π CI ft CI + Cs fs ft Opamp unity gain frequency, fs Clock frequency Ref: K.Martin, A. Sedra, Effect of the OPamp Finite Gain & Bandwidth on the Performance of Switched- Capacitor Filters," IEEE Trans. Circuits Syst., vol. CAS-28, no. 8, pp , Aug EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 4

3 Effect of Opamp Finite Bandwidth on Filter Magnitude Response Τ non-ideal / Τ ideal (db) Magnitude deviation due to finite opamp unity-gainfrequency Active RC f c /f s =1/32 f c /f s =1/12 Example: 2 nd order bandpass with Q=25 Ref: f c /f t K.Martin, A. Sedra, Effect of the OPamp Finite Gain & Bandwidth on the Performance of Switched- Capacitor Filters," IEEE Trans. Circuits Syst., vol. CAS-28, no. 8, pp , Aug EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 5 2- f c /f s =1/32 f c /f t ~0.022 f t >45f c Effect of Opamp Finite Bandwidth on Filter Magnitude Response Τ non-ideal / Τ ideal (db) Example: For 1dB magnitude response deviation: 1- f c /f s =1/12 Active RC f c /f t ~0.04 f t >25f c f c /f s =1/32 f c /f s =1/12 3- Cont.-Time f c /f t ~1/700 f t >700f c fc /f t EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 6

4 Effect of Opamp Finite Bandwidth Maximum Achievable Q Max. allowable biquad Q for peak gain change <10% Oversampling Ratio C.T. filters f c /f t Ref: K.Martin, A. Sedra, Effect of the Opamp Finite Gain & Bandwidth on the Performance of SwitchedCapacitor Filters," IEEE Trans. Circuits Syst., vol. CAS-28, no. 8, pp , Aug EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 7 Example: For Q of 40 required Max. allowable biquad Q for peak gain change <10% 1- f c /f s =1/32 f c /f t ~0.02 f t >50f c 2- f c /f s =1/12 f c /f t ~0.035 f t >28f c 3- f c /f s =1/6 f c /f t ~0.05 f t >20f c Effect of Opamp Finite Bandwidth Maximum Achievable Q C.T. filters f c /f t Ref: K.Martin, A. Sedra, Effect of the Opamp Finite Gain & Bandwidth on the Performance of SwitchedCapacitor Filters," IEEE Trans. Circuits Syst., vol. CAS-28, no. 8, pp , Aug EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 8

5 Effect of Opamp Finite Bandwidth on Filter Critical Frequency ω c /ω c Critical frequency deviation due to finite opamp unity-gainfrequency Active RC f c /f s =1/32 f c /f s =1/12 Example: 2 nd order filter f c /f t Ref: K.Martin, A. Sedra, Effect of the OPamp Finite Gain & Bandwidth on the Performance of Switched- Capacitor Filters," IEEE Trans. Circuits Syst., vol. CAS-28, no. 8, pp , Aug EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 9 Effect of Opamp Finite Bandwidth on Filter Critical Frequency Example: For maximum critical frequency shift of <1% 1- f c /f s =1/32 f c /f t ~0.028 f t >36f c 2- f c /f s =1/12 f c /f t ~0.046 f t >22f c ω c /ω c Active RC f c /f s =1/32 f c /f s =1/12 3- Active RC f c /f t ~0.008 f t >125f c C.T. filters f c /f t Ref: K.Martin, A. Sedra, Effect of the Opamp Finite Gain & Bandwidth on the Performance of SwitchedCapacitor Filters," IEEE Trans. Circuits Syst., vol. CAS-28, no. 8, pp , Aug EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 10

6 Double-Sampled Fully Differential 6 th Order S.C. All-Pole Bandpass Filter -Cont. time termination (Q) implementation -Folded-Cascode opamp with f u = 100MHz used -Center freq. 3.1MHz, filter Q=55 -Clock freq MHz effective oversampling ratio Measured dynamic range 46dB (IM3=1%) Ref: B.S. Song, P.R. Gray "Switched-Capacitor High-Q Bandpass Filters for IF Applications," IEEE Journal of Solid State Circuits, Vol. 21, No. 6, pp , Dec EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 11 Sources of Distortion in Switched- Capacitor Filters Distortion induced by finite slew rate of the opamp Opamp output/input transfer function nonlinearity Distortion incurred by finite setting time of the opamp Capacitor non-linearity Distortion due to switch clock feed-through and charge injection EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 12

7 What is Slewing? Vin C s f C I Vo f 2 C I V o C L C s Vi- Vi+ Iss Assume opamp is of a simple differential-pair class A transconductance type EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 13 What is Slewing? I o I ss/2 Slope ~ g m V o V max V in I o -I ss/2 Vi- Vi+ Class A amplifiers where the maximum output current is limited to Iss: Iss V in <+-V max V in >+-V max I o =g m V in I o =I max Class A amplifier input stage EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 14

8 What is Slewing? I o I ss/2 Slope ~ g m C I V o C L V max V in f 2 I o -I ss/2 C s Vi- Vi+ Iss If at the rising edge of f 2 : V cs > V max Output current constant I o =Iss/2 Slewing After Vcs is discharged enough to have V cs < V max Linear settling EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 15 Distortion Induced by Opamp Finite Slew Rate EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 16

9 Ideal Switched-Capacitor Integrator Output Waveform Vin f 1 C s - + C I Vo Clock f 1 f 2 Vin C I Vin C s f Vo Vcs Vo f 2 High Charge transferred from Cs to CI EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 17 Slew Limited Switched-Capacitor Integrator Output Settling Clock f 1 f 2 Vo-ideal Vo-real Slewing Linear Settling Slewing Linear Settling EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 18

10 Distortion Induced by Finite Slew Rate of the Opamp Ref: K.L. Lee, Low Distortion Switched-Capacitor Filters," U. C. Berkeley, Department of Electrical Engineering, Ph.D. Thesis, Feb (ERL Memorandum No. UCB/ERL M86/12). EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 19 Distortion Induced by Opamp Finite Slew Rate Error due to exponential settling changes linearly with signal amplitude Error due to slew-limited settling changes non-linearly with signal amplitude (doubling signal amplitude X4 error) For high-linearity need to have either high slew rate or non-slewing opamp ω ( o s ) T 2 V 8 o sin HD 2 k = ST r s π k ( k 2 4 ) 2 8( ots o sin ω V 2 ) HD3 = ST r s 15 π Ref: K.L. Lee, Low Distortion Switched-Capacitor Filters," U. C. Berkeley, Department of Electrical Engineering, Ph.D. Thesis, Feb (ERL Memorandum No. UCB/ERL M86/12). EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 20

11 Example: Slew Related Harmonic Distortion ω ( o s ) T V 8 o sin HD 2 3 = ST r s 15π 2 Switched-capacitor filter with 4kHz bandwidth, f s =128kHz, S r =1V/µsec, V o =3V Ref: K.L. Lee, Low Distortion Switched-Capacitor Filters," U. C. Berkeley, Department of Electrical Engineering, Ph.D. Thesis, Feb (ERL Memorandum No. UCB/ERL M86/12). EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 21 Distortion Induced by Opamp Finite Slew Rate Example HD3 [db] V o =1V f / f s =1/32 V o =2V f / f s =1/12 V o =1V V o =2V (Slew-rate / f s ) [V] EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 22

12 Distortion Induced by Finite Slew Rate of the Opamp Note that for a high order switched capacitor filter only the last stage slewing will affect the output linearity (as long as the previous stages settle to the required accuracy) Can reduce slew limited linearity by using an amplifier with a higher slew rate only for the last stage Can reduce slew limited linearity by using class A/B amplifiers Even though the output/input characteristics is non-linear the significantly higher slew rate compared to class A amplifiers helps improve slew rate induced distortion In cases where the output is sampled by another sampled data circuit (e.g. an ADC or a S/H) no issue with the slewing of the output as long as the output settles to the required accuracy & is sampled at the right time EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 23 More Realistic Switched-Capacitor Circuit Slew Scenario C I C I Vin C s f 2 - C L C s f 2 C L + Vo t=0+ Vo At the instant C s connects to input of opamp (t=0+) Opamp not yet active at t=0+ due to finite opamp delay Feedforward path from input to output generates a voltage spike at the output spike magnitude function of C I, C L, C s Spike increases slewing period Eventually, opamp becomes active & starts slewing EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 24

13 More Realistic SC Slew Scenario Vo-ideal Vo-real Vo-real Including t=0+ spike Slewing Linear Settling Slewing Linear Settling Spike generated at t=0+ Slewing Linear Settling Slewing Ref: R. Castello, Low Voltage, Low Power Switched-Capacitor Signal Processing Techniques," U. C. Berkeley, Department of Electrical Engineering, Ph.D. Thesis, Aug. 84 (ERL Memorandum No. UCB/ERL M84/67). EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 25 Sources of Noise in Switched- Capacitor Filters Opamp Noise Thermal noise 1/f (flicker) noise Thermal noise associated with the switching process (kt/c) Same as continuous-time filters Precaution regarding aliasing of noise required EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 26

14 Bilinear integrator Other z domain Integrators Example: Bilinear ( ) = ( ) + ( ) + ( ) vo nt vo nt T k vi nt vi nt T z Vo( z) k 1 z = + Vi( z) Vo ( z) 1 + z H( z) = = k V ( z) 1 z i 1 1 EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 27 Bilinear Integrator -Not implemented by standard SC integrators -Synthesis: Biquads: direct coefficient comparison Example: Bilinear S.C. integrator: Cs 1 Z 1 H(Z) = + CI 1 Z 1 Cs 1e j ωt = + CI jωt 1 e Cs 1 ωt = s CI jωts tan ωts 2 Ideal Integrator Magnitude Error No Phase Error! For signals at frequency <<sampling freq. Magnitude error negligible Ref: R. Gregorian, G. Temes, Analog CMOS Integrated Circuits," Wiley, 1986, pp 277. EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 28

15 LDI : Bilinear LDI & Bilinear Transformation Frequency Warping 1 Z 1/2 T = s 1 1 s 1Z 2 jsin ωts 2 s 2 jsin ωts Ts Z 1 1e j ωt T + = + s 1 1 j T s 1 Z 1 e = ω 2 jtan ωts 2 s 2 jtan ωts Ts 2 EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 29 Other z domain Integrators Example: Bilinear Frequency translation 1 s s= 2π jf RC = HSC ( z) 2 z= e π jfsct Bilinear LDI fs f tan SC frc = π π fs f RC fs = π π sin f f SC s EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 30

16 Bilinear Transform f sc /f s f RC /f s f RC f s = π π tan f f SC Entire jω axis maps onto the unit circle Mapping is nonlinear (tan distortion) prewarp specifications of RC prototype Matlab filter design automates this (see, e.g. bilinear) s EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 31 Bilinear & LDI Transformation Frequency Warping As long as f<<f s error negligible EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 32

17 Bilinear Bandpass f s = 100kHz f c = f s /8 Q = 10 zero at f s / Pole-Zero Map Imag Axis Matlab: z^ H(z) = z^ z Real Axis EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 33 Martin-Sedra Biquad K4 CA = 1.125pF phi1 phi1 Periodic AC Analysis PAC1 log sweep from 1k to 50k (300 steps) phi2 phi2 CLK1 fs = 100kHz K6 CA = 151.2fF CA = 1pF CB = 1pF Vi K1 CA = 0F phi1 phi1-1m K5 CB = 500fF phi1 phi2-1m Vo phi2 phi2 phi2 phi1 V1 ac = 1V K2 CA = 151.2fF K3 CB = 37.8fF Vo V ( z) ( z) i 2 K3z + = 2 z + ( 2K3 + K1K5 + K2K5) z + ( K3 K2K5) ( 2 + K K + K K ) z + ( 1 K K ) Ref: K. Martin and A. S. Sedra, Strays-insensitive switchedcapacitor filters based on the bilinear z transform, Electron. Lett., vol. 19, pp , June EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 34

18 Magnitude Response Magnitude [db] Frequency [Hz] x 10 5 EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 35 LDI vs Bilinear Transform LDI transform: Realized by standard switched-capacitor integrators Some high frequency zeros may get lost Simple filter synthesis: Replace RC integrators with SC integrators Ensure clock phases chosen so that all integrators loops LDI type Bilinear transform Not implemented by standard SC integrators Synthesis: Biquads: direct coefficient comparison Ladders: see R. B. Datar and A. S. Sedra, Exact design of strays-insensitive switched capacitor high-pass ladder filters, Electron. Lett., vol. 19, no 29, pp , Nov EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 36

19 Switched-Capacitor Filter Application Example: Voice-Band Codec (Coder-Decoder) Chip f s = 1024kHz f s = 128kHz f s = 8kHz f s = 8kHz f s = 128kHz f s = 8kHz f s = 128kHz f s = 128kHz Ref: D. Senderowicz et. al, A Family of Differential NMOS Analog Circuits for PCM Codec Filter Chip, IEEE Journal of Solid-State Circuits, Vol.-SC-17, No. 6, pp , Dec EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 37 CODEC Transmit Path Lowpass Filter Frequency Response 0 Note: f s =128kHz Magnitude (db) Frequency (Hz) EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 38

20 CODEC Transmit Path Highpass Filter 0 Magnitude (db) Frequency (Hz) Note: f s =8kHz EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 39 CODEC Transmit Path Filter Overall Frequency Response 0 Magnitude (db) Frequency (Hz) Low Q bandpass (Q<1) filter shape Implemented with lowpass followed by highpass EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 40

21 CODEC Transmit Path Clocking Scheme First filter (1 st order RC type) performs anti-aliasing for the next S.C. biquad The first 2 stage filters form 3 rd order elliptic with corner 32kHz Anti-aliasing for the next lowpass filter The stages prior to the high-pass perform anti-aliasing for highpass Notice gradual lowering of clock frequency Ease of anti-aliasing EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 41 SC Filter Summary Pole and zero frequencies proportional to Sampling frequency f s Capacitor ratios High accuracy and stability in response Long time constants realizable without large R, C Compatible with transconductance amplifiers Reduced circuit complexity, power dissipation Amplifier bandwidth requirements less stringent compared to CT filters (low frequencies only) Issue: Sampled-data filters require anti-aliasing prefiltering EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 42

22 Switched-Capacitor Filters versus Continuous- Time Filter Limitations Considering overall effects: Opamp finite unitygain-bandwidth Opamp settling issues Opamp finite slew rate Clock feedthru Switch+ sampling cap. finite timeconstant Magnitude Error 5-10MHz Cont. Time Filter S.C. Filter Filter bandwidth Assuming constant opamp f u Limited switched-capacitor filter performance frequency range EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 43 Summary Filter Performance versus Filter Topology Opamp-RC Max. Usable Bandwidth ~10MHz SNDR 60-90dB Freq. tolerance w/o tuning % Freq. tolerance + tuning 1-5% Opamp- MOSFET-C ~ 5MHz 40-60dB % 1-5% Opamp- MOSFET-RC ~ 5MHz 50-90dB % 1-5% Gm-C ~ 100MHz 40-70dB % 1-5% Switched Capacitor ~ 10MHz 40-90dB <<1% _ EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 44

23 Data Converters EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 45 Material Covered in EE247 Filters Continuous-time filters Biquads & ladder type filters Opamp-RC, Opamp-MOSFET-C, gm-c filters Automatic frequency tuning Switched capacitor (SC) filters Data Converters D/A converter architectures A/D converter Nyquist rate ADC- Flash, Pipeline ADCs,. Oversampled converters Self-calibration techniques Systems utilizing analog/digital interfaces Wireline communication systems- ISDN, XDSL Wireless communication systems- Wireless LAN, Cellular telephone, Disk drive electronics Fiber-optics systems EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 46

24 Data Converter Topics Basic Operation of Data Converters Uniform sampling and reconstruction Uniform amplitude quantization Characterization and Testing Common ADC/DAC Architectures Selected Topics in Converter Design Practical Implementations Desensitization to Analog Circuit Non-Idealities Figures of Merit and Performance Trends EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 47 Suggested Reference Texts R. v. d. Plassche, CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters, 2nd ed., Kluwer, B. Razavi, Data Conversion System Design, IEEE Press, S. Norsworthy et al (eds), Delta-Sigma Data Converters, IEEE Press, Extensive treatment of oversampled converters including stability, tones, bandpass converters. J. G. Proakis, D. G. Manolakis, Digital Signal Processing, Prentice Hall, EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 48

25 Converter Applications EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 49 Example: Typical Cell Phone Contains in integrated form: 4 Rx filters 4 Tx filters 4 Rx ADCs 4 Tx DACs 3 Auxiliary ADCs 8 Auxiliary DACs Total: Filters 8 ADCs 7 DACs 12 Dual Standard, I/Q Audio, Tx/Rx power control, Battery charge control, display,... EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 50

26 Data Converter Basics Analog Input DSP is wonderful, but... Real world signals are analog: Continuous time Continuous amplitude DSP can only process: Discrete time Discrete amplitude Need for data conversion from analog to digital and digital to analog Analog Preprocessing A/D Conversion DSP D/A Conversion Analog Postprocessing Analog Output Filters? ? Filters EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 51 A/D & D/A Conversion A/D Conversion D/A Conversion EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 52

27 Data Converters Stand alone data converters Used in variety of systems Example: Analog Devices AD bit/ 65Ms/s ADC- Applications: Ultrasound equipment IF sampling in wireless receivers Hand-held scopemeters Low cost digital oscilloscopes EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 53 Data Converters Embedded data converters Cost, reliability, and performance integration of data conversion interfaces along with DSPs Main issues Feasibility of integrating sensitive analog functions in a technology optimized for digital performance Down scaling of supply voltage Interference & spurious signal pick-up from on-chip digital circuitry Portable applications dictate low power consumption EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 54

28 D/A Converter Transfer Characteristics For an ideal digital-to-analog converter with uniform, binary digital encoding & a unipolar output range from 0 to V FS N bi N N i V0 = VFS = bi 2,bi 0 or 1 i = i= 12 i= 1 wheren = #of bits VFS = fullscaleoutput = stepsize VFS = N 2 Note:V0( bi= 1,alli) = VFS 1 = VFS 1 N 2 MSB LSB b1 b2 b3 bn.. D/A Example:N = 3 V 0 V0 = ( b1.2 + b2.2 + b3.2 ) EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 55 Ideal DAC introduces no error! One-toone mapping from input to output Ideal D/A Transfer Characteristic V FS V FS /2 Analog Output Ideal Response Step Height (1LSB= ) V FS / Digital Input Code EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 56

29 A/D Converter Transfer Characteristic For an ideal analog-to-digital converter with uniform, binary digital encoding & a unipolar input range for 0 to V FS wherem = #of bits VFS = fullscaleoutput = stepsize VFS = m 2 MSB LSB b1 b2 b3 bm.. A/D V in Note:D( bi= 1,alli) VFS 1 VFS 1 m 2 EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 57 Ideal ADC introduces error Ideal A/D Transfer Characteristic (+-1/2 ) = V FS /2 m m= # of bits Digital Output This error is called ``quantization error`` LSB D 2D 3D 4D 5D 6D 7D Analog input EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 58

30 Data Converter Performance Metrics Data Converters are typically characterized by static, time-domain, & frequency domain performance metrics : Static Monotonicity Offset Gain error Differential nonlinearity (DNL) Integral nonlinearity (INL) Dynamic Delay, settling time Aperture uncertainty Distortion- harmonic content Signal-to-noise ratio (SNR), Signal-to-(noise+distortion) ratio (SNDR) Idle channel noise Dynamic range & spurious-free dynamic range (SFDR) EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 59 What is a discrete time signal? A signal that changes only at discrete time instances? A continous time signal multiplied with a train of infinitely narrow unit pulses? A vector whose element indices correspond to discrete instances in time? All of the above? [ ] time EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 60

31 Discrete Time Signals A sequence of numbers (or vector) with discrete index time instants Intermediate signal values not defined (not the same as equal to zero!) Mathematically convenient, non-physical We will use the term "sampled data" for related signals that occur in real, physical interface circuits EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 61 Typical Sampling Process CT SD DT Continuous Time Sampled Data (e.g. T/H signal) time Physical Signals Clock Discrete Time "Memory Content" EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 62

32 Uniform Sampling y(kt)=y(k) t= 1T 2T 3T 4T 5T 6T... k= Samples spaced T seconds in time Sampling Period T Sampling Frequency f s =1/T Problem: Multiple continuous time signals can yield exactly the same discrete time signal (aliasing) EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 63 Summary Data Converters ADC/DACs need to sample/reconstruct to convert from continuous time to discrete time signals and back We distinguish between purely mathematical discrete time signals and "sampled data signals" that carry information in actual circuits Question: How do we ensure that sampling/reconstruction preserves information EECS 247 Lecture 11: SC Filters/ DACs 2005 H. K. Page 64

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