System on a Chip. Prof. Dr. Michael Kraft
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1 System on a Chip Prof. Dr. Michael Kraft
2 Lecture 5: Data Conversion ADC Background/Theory Examples
3 Background Physical systems are typically analogue To apply digital signal processing, the analogue signal has to be converted to a digital signal Analogue signals are analogue in amplitude and time Digital signals are discrete in amplitude and time A/D conversion: Step 1: sample the analogue signal (to make the signal time discrete) Step 2: Digitising (to make the signal amplitude discrete) Many A/D conversion methods exist; trade-off between bandwidth, accuracy, circuit complexity, cost, power consumption, etc.
4 Ideal Sampling Sampling: generation of an ordered number sequence by taking values of x(t) at specific instants of time Mathematical representation: analogue signal is multiplied by an impulse comb
5 Ideal Sampl. Frequency Domain Example: triangular X(w) No information loss w M <w s /2 Information loss w M >w s /2 Assume that x(t) is bandlimited; i.e. X(w) = 0 for w > w m If the highest frequency in X(w) is smaller than half the sampling frequency (the Nyquist frequency), the spectrum of x s (t) is identical to that of x(t), but repeated with a period of w s. Consequently, no information is lost (Shannon s Theorem) Otherwise the spectra overlap and information is lost
6 Real Sampl. Frequency Domain p(t) x s (t) In practice, an impulse comb is not possible, it is approximated by a square with width t p(t) is a string of rectangles
7 Real Sampl. Frequency Domain In this case the width t is equal to 1/f s, which is the case for a sample and hold that usually precedes an A/D converter. Using squares instead of an impulse comb has the effect that the original spectrum magnitude is multiplied by sin(pf/f s )/(pf/f s ) This results in an amplitude reduction of the original spectrum. For Nyquist sampling the reduction is -3.92dB if a sample and hold is used Oversampling can be used to alleviate the problem. If the signal is oversampled by 4 times the Nyquist rate (w s = 8w M ), the reduction drops to -0.22dB
8 Aliasing Input signal component at w M -w s -w s /2 w s /2 w s w s -w M w M Folded (aliased) signal at w s - w M Sampling at w s If there is frequency component in the input signal above the Nyquist frequency at w M it will fold back into the baseband at ws - w M - this is called aliasing To prevent aliasing a A/D converter is usually preceded by an anti-aliasing filter, which is a low pass filter with a cut-off frequency of w s /2
9 Digitising q/2 V in The sampling did not result in any information loss (in an ideal world), but the digitising will since only a limited number of bits is used to represent the analogue amplitude signal This error manifests itself as noise and can be treated as white noise in many cases The maximum quantisation error is ±q/2
10 Terminology The number of quantisation levels for a N bit converter is 2 N The resolution is given by V FS /(2 N -1); (V FS : full scale voltage). This is equivalent to the smallest increment level (or step size) q. MSB: Most significant bit: weighting of 2-1 V FS LSB: Least significant bit: weighting of 2 -N V FS Maximum output = (1-2 -N ) V FS Oversampling ratio: OSR=f s /2f m Monotonicity: a monotonic converter is one in which the output never decreases as the input increases. For A/D converters this equivalent to saying that it does not have any missing codes.
11 Example Example: An analogue signal in the range 0 to +10V is to be converted to an 8-bit digital signal. What is the resolution: What is the digital representation of an input signal of 6V and of 6.2V? What is the error made for the quantisation of 6.2V in absolute terms and as a percent of the input? As a percent of full scale? What is the max. quantisation error?
12 Quantisation Noise P(e) -q/2 q/2 e Assume the quantisation noise is uniformly distributed, the mean square value of the error can be calculated: e q / 2 2 q qns q / q e de q e 12 RMS - 12 For a high number of bits the error is uncorrelated to the input signal (N>5). In the frequency domain the error appears as white over the Nyquist range. This noise limits the S/N ratio of the digital system analogous to thermal noise in an analogue system.
13 Signal to Quantisation Noise Ratio The peak value of a full scale sine wave (that is one whose peak to peak amplitude spans the whole range of the ADC) is given by: 2 N q/2. The RMS of the sinewave is hence: V RMS =2 N-1 q/ 2 The signal to quantisation noise ratio (SQNR) is given by: N q / SQNR 2 q / 12 For a high number of bits the error is uncorrelated to the input signal (N>5). In the frequency domain the error appears as white over the Nyquist range. This noise limits the S/N ratio of the digital system analogous to thermal noise in an analogue system. N
14 Oversampling The previous calculation assume that the input signal is sampled at the Nyquist rate The power spectral density of white quantisation noise is given by: E 2 (f)=e 2 RMS 2/f s f m fm erms The noise power is given by: n E ( f ) df e (2 0 RMS ) f 0 s OSR SQNR is then: 2 N - 1 q OSR SQNR 2 q 12 OSR N or in db: SQNR = (6.02 N log( OSR))dB Thus doubling of the oversampling ratio only increases the SQNR by appr. 3dB or half a bit.
15 Sample & Hold T s v in v in v out t C v out t t usually: t << T s (for mathematical analysis t = 0) v out often buffered before subjected to the A/D converter T s
16 A/D Converter Types Specifications: Number of bits (typical 8 20) Sampling rate (typical 50Hz to 100MHz) Relative Accuracy: Deviation of the output from a straight line drawn through zero and full scale Integral non-linearity or linearity Differential linearity: Measure of step size variation. Ideally each step is 1 bit but in practice step sizes can vary significantly Usually converters are designed so that they have a linearity better than ½ bit (if this were not the case then the LSB is meaningless) Monotonicity: No missing codes (i.e > 1011) Signal to Noise Ratio (same as Dynamic Range)
17 Errors Offset error Linearity error 1LSB scale error Non-linearity 1LSB differential non-linearity Non-monoticity (implies a differential non-linearity of more than 1LSB) Errors originate from component tolerances, temp. sensitivity, noise in the electric circuit, etc
18 Offset and Gain Error Offset error is defined as the deviation of the voltage produced for the code from ½ V LSB. E OFF V V LSB 1 V 2 LSB Gain error is defined as the difference at the full scale value between the ideal and actual curve when the offset error has been removed. It is given in units of LSB. E gain V V N VLSB VLSB 2
19 Integral/Differential Nonlinearity Error For an ideal A/D converter each transition value is precisely 1 LSB apart. Differential nonlinearity (DNL) is defined as the variation in step sizes away from 1 LSB (after gain and offset errors have been removed). After both the offset and gain errors have been removed, the integral nonlinearity (INL) is defined to be the deviation from the straight line. Two straight lines can be used: endpoints of the converter s transfer characteristics or a best fit. In the literature INL is either used to describe the maximum deviation from the straight line or the deviation from the straight line for each digital word. 19
20 Example An analogue signal 0..10V is to be digitised with an quantisation error less than 1% of full scale. How many bits are required? How many bits are required if the range is extended to 10V (for the same resolution)? What is the resolution and quantisation error?
21 Flash Converter Example: 3 bit flash converter requires 2 N -1 comparators and 2 N resistors fastest converter; conversion can be performed in one clock cycle high circuit complexity accuracy depends on resistor matching and comparator performance (practical up to 8Bits) v in R R R R R R R R v ref Logic a 2 a 1 a 0
22 Counting (Feedback) Converter v in T s + Up/Down Counter - a 0 a 1 a 2 a n-1 Reset Data Valid v comp DAC easy to implement conversion speed depends on difference to previous sample slow for fast varying signals, fast for slowly varying signals ( oversample) tracking or counting A/D converter
23 Half-Flash Converter hybrid solution: good compromise between speed and circuit complexity use separate flash converter for higher bits and lower bits e.g. for 8 bits: comparators needed instead of 2 8 = 256.
24 Dual Slope ADC C S 2 v in S 1 R - - v ref + v 1 + Reset Start/Stop Control Logic high resolution (up to 14 bits) ADC s independent of exact values of R and C implementation in CMOS relatively slow T s Counter a 0 a 1 a 2 a n-1
25 Sigma-Delta Modulators (SDM) A/D Converters 1st order modulator Typical waveform: pulse density modulation extremely high resolution (up to 20 bits) ADC s only one reference signal is required oversampling is required; f s >> f nyquist difficult to analyse use simulation in many commercial devices (CD players, mobile phones, etc) suitable for VSLI implementation
26 One Bit Quantiser N Q + 1 Multibit quantiser 1bit quantiser A one bit quantiser is always linear since the gain is arbitrary. The quantiser can be modelled by a (quantisation) noise source and a gain of 1
27 Int. output clock First Order SDM 1 Waveforms for zero input x First order modulators can be easily simulated and analysed However, they only provide first order noise shaping For zero input we get alternating 1 s and 0 s at the output with a frequency of f s /2. The average of this bitstream is 0. If the input is positive, there will be more 1 s than zero, the average over a number of clock pulses is then a measure of the input.
28 1st Order SDM Noiseshaping Signal Transfer Function Noise Transfer Function Bode Diagrams Bode Diagrams 0 From: U(1) 0 From: U(1) Phase (deg); Magnitude (db) To: Y(1) Phase (deg); Magnitude (db) To: Y(1) Frequency (rad/sec) Frequency (rad/sec) Signal Transfer Function: STF=1/(s+1) Low pass filtered Noise Transfer Function: NTF=s/(s+1) High pass filtered, thus the noise is attenuated at lower frequencies in the signal band (Noise shaping).
29 1st Order SDM Noiseshaping Noise spectral density is shaped as shown above. Clearly feedback around the quantiser reduces the noise spectral density at low frequency but increases at high frequencies. Above example is plotted for OSR = 16.
30 Second Order SDM If better noise shaping is required a second order modulator can be used. A second order modulator can be analysed in exactly the same way as a first order modulator. NTF: (1-z -1 ) 2 ; STF: z-1 Noise Power Spectral Density: N q2 (f)=32e 2 RMST s sin 4 (wt s /2) RMS Noise in the signal band: f B 2 2 p n 0 0 N q ( f ) df e RMS 5 OSR -5/ 2
31 Second Order SDM Second order discrete SD-Modulator Sine Wave Sum1 1 1-z -1 Integrator 4 Sum2 z -1 1-z -1 Integrator 3 Comparator Compare Phase S/H Sample and Hold1 bitstr To Workspace13 Bitstream 12:34 Digital Clock t To Workspace4 Simulink simulation model Discrete second order model
32 4th order SDM; basic architecture Higher Order SDM 4 th order SDM Interpolative architecture
33 Example A second order modulator with a one bit quantiser (quantisation levels +1 and 1) is clocked at 1MHz. It is used to convert audio signals with a bandwidth of 40kHz. Calculate: - the oversampling ratio - The signal to quantisation noise ratio (SQNR) assuming a full scale sinewave at the input. - How much does the SQNR improve if the sampling frequency is increased to 2MHz?
34 D/A Background Convert a digital number into an analogue voltage Analogue signals are typically required for actuating a physical system (e.g. loudspeaker, moving coil meter, etc) Weight of each increases by factor of 2: V out = (a 1 /2 1 +a 2 / a n /2 n ) V ref a 1 : MSB; a n : LSB Many D/A conversion methods exist, trade-off between bandwidth, accuracy, circuit complexity.
35 Binary Weighted Resistors v ref R 2R 4R 2 (N-1) R a 1 a 2 a 3 a n R/2 v out = -v ref (a 1 /2 1 +a 2 / n /a n ) - + v out For n large: resistor value spread is huge on-resistance of switches does matter
36 R-2R Ladder Network v ref R R R 2R 2R 2R 2R 2R R a 1 a 2 a 3 a n v out = -v ref (a 1 /2 1 +a 2 / n /a n ) - + v out on-resistance of switches does matter resistor value spread is much smaller accuracy depends on absolute resistance values Dr Michael Kraft Noise and Data Conversion 36
37 Practical R-2R Ladder Network + - use BJT to produce binary weighted currents
38 Current Switch use MOST to reduce base current error
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