Development of a Push-pull Converter for Fuel Cell Applications

Size: px

Start display at page:

Download "Development of a Push-pull Converter for Fuel Cell Applications"

Russell Collins
6 years ago
Views:

1 Developmen of a Pushpull onverer for Fuel ell Applicaions.K. Kuyula, J.F. Janse van Rensburg Telkom enre of Excellence Insiue of Applied Elecronics Vaal Universiy of Technology, Privae Bag X021 Andries Pogieer Blvd., Vanderbijlpark, 1900 ell: , Telephone Number: (016) chrisiank@vu.ac.za, hannesvr@vu.ac.za Absrac Fuel cells have he advanage ha hey can be used remoe elecommunicaion sies wih no grid conneciviy as he majoriy of elecommunicaion equipmen operaes from a D volage supply. However, a fuel cell s oupu power is highly unregulaed resulg a drasic drop he oupu volage wih creasg load. Therefore, various D D converer opologies wih a wide range of pu volages can be used o regulae he fuel cell volage o a required D load. This paper presens he design and developmen of a pushpull converer wih a wide volage pu he 40 W range. The aim of his DD converer is o conver he V generaed by a commercial proon exchange membrane fuel cell o a 13.8 V used o supply porable elecommunicaion equipmen. The prelimary resuls of he experimenal measuremens of he prooype design are presened. Index Terms Pushpull converer, fuel cell. I. INODUTI The obsacles for egrag fuel cells (Fs) wih modern elecronics are he low oupu volage of he cell combed wih is sabiliy over he range of elecrical loadg. Significan cell volage variaion durg a no load period has also been observed. Thus, power condiiong circuiry o accommodae cell o cell consisencies and loaddriven oupu volage variaion is a criical componen of any F sysem [1]. A D D converer wih a wide range of pu volages is herefore required o regulae he F volage [2]. There are muliple opologies of swiched mode D D converer followed by D A verer proposed so far. A convenional F nework has a swiched mode D D converer o limi he size and cos of he sysem followed by an verer [3]. Recen comprehensive sudies have shown ha powerelecronics, which erfaces direcly o he F sacks, has a significan impac on he longerm durabiliy and reliable energy efficiency of he F. Energy conversion efficiency for F is of significan imporance. Today, he efficiencies of powerelecronics conversion echnology have exceeded 90 %; however, under severe cos consras, mos of hese echnologies are no economically viable. As such, achievg high powerconversion efficiency a significanly low cos for he viabiliy of F power sysems is a daung challenge [4]. D D converer design for F is slighly differen from convenional converers, as he elecric characerisics of he converer should mach ha of he F. This is paricularly imporan for hree reasons [5]: The pu side curren/volage ripple of he D D converer should be mimum, so as o reduce he ripple curren/volage of he F; When he F is workg under load curren pulses, he D D converer mus apply a suiable sraegy o adjus he oupu power of he F, so as o ensure highefficiency and reliable operaion; and The D D converer should be able o adjus he power disribuion. These reasons consiue he crierion for his research. A sepdown converer is proposed which will corporae a proon exchange membrane (PEM) F sack as he D power source wih a load of 40 W. Figure 1 shows a block diagram of a 40 W D D regulaor usg a pulse widh modulaed (PWM) pushpull power converer. I consiss of an Elecromagneic Inerference (EMI) filer which proecs he source from he swichg harmonics of he pu curren. The laer is fed o a PWM pushpull converer power sage which ransforms he unregulaed pu D o an A square wave a he oupu of he pushpull ransformer o lessen he volage level. This A square wave volage is recified and filered usg a wo sage filer o oba a regulaed D componen. The oupu volage is sampled and compared wih a consan reference volage (Vref). The error volage is hen amplified and compensaed for sable operaion of he converer before beg applied o a pulse widh modulaor (PWM). The PWM oupu is used o generae ou of phase pulses which are processed dual drive circui o provide isolaion. Aferward hese pulses are amplified o drive he gaes of power swichg MOSFETs. In his way, he converer oupu volage is regulaed a he desired level. Figure1 onverer sysem block diagram

2 The pushpull opology was chosen for he D D converer for he followg reasons [6]: The oupu mus be isolaed. This feaure is made possible by he ransformer; The oupu volage can be made eiher higher or lower dependg on he urns raio of he high frequency (HF) ransformer; The ransformer is relaively small; The opology uses relaively low power devices; and This opology reduces he oupu ripple by doublg he curren ripple frequency o he oupu filer. Anoher decidg facor is he simpliciy of he swichg. Only one swich is urned on a a ime. This resuls img issues becomg less criical. II. PUSHPU VERTER OPERATI AND ANAYSIS The circui arrangemen for a push pull D D converer is shown Figure 2. This converer opology produces pulses of opposie polariy on he primary and he secondary wdgs of he ransformer by swichg ransisors Q 1 and Q 2. The diodes on he secondary wdgs recify he pulse waveform before applyg hem o he pu of he lowpass filer () [7]. Diode D 1 is forwarded biased, D 2 is reverse biased, and assumg a consan oupu volage, he volage across he ducor () is a consan, resulg a learly creasg curren he ducor. In he erval when Q 1 is closed, he change curren he ducor is given by: i Ns V Vo Np DT closed = Mode 2: Figure 4 shows he sequence when boh swiches are open. The curren each of he primary wdgs is zero. The curren he filer ducor () mus maa conuiy, resulg boh D 1 and D 2 becomg forward biased. The ducor curren divides evenly beween he ransformer s secondary wdgs. V D MODE 2 V x V (2) DT < < T/2 Figure 4 Mode 2 wih boh and open The volage across each secondary wdg is zero, and v = v V = V (3) x o o Figure 2 Basic pushpull converer opology Accordg o Har [7], he pushpull converer circui is analysed wih one swich on and wih boh swiches off. Mahemaical expressions for he four modes of operaion over one swichg cycle are as follows: Mode 1: As depiced Figure 3, durg his mode, Q 1 closes and esablishes he volage across he primary wdg P 1, hus: v V p1 D = V V p1 P1 Figure 3 Mode 1 Q 1 closed MODE 1 0 < < DT (1) where v x = 0 Mode 3: As illusraed Figure 5, Q 2 is closed and he volage esablished across he primary wdg P 2 is v = V (4) p2 Diode D 2 is forward biased while D 1 is reverse biased. The curren he ducor creases learly while Q 2 is closed, and Equaion 2 applies. D V V p2 MODE 3 Figure 5 Mode 3 wih Q 2 closed and Q 1 open P2 Mode 4: Figure 6 aga illusraes ha boh swiches are off. This mode is idenical o mode 2. T/2 < < T/2 DT

VD Figure 6 Mode 4 wih boh swiches are open The modes described earlier resul he followg seady sae heoreical waveforms as shown Figure 7 for he pushpull converer operag conuous conducion mode.

3 VD Figure 6 Mode 4 wih boh swiches are open The modes described earlier resul he followg seady sae heoreical waveforms as shown Figure 7 for he pushpull converer operag conuous conducion mode. MODE 1 MODE 2 MODE 3 MODE 4 MODE 4 T/2 DT < < T V V x improve qualiy, have spurred many effors o use he compuer he design cycle [9]. This approach has been applied for he prooype design. Power Sage Designer Tool TM, a sofware package from Texas Insrumens, was used for he design of he power sage. ommonly used swichmode power supplies can be designed usg his ool. I is a useful ool order o visualise volage and curren waveforms side criical componens of he converer, such as he MOSFET swiches, HF ransformer, power diodes and ducor. Figure 8 shows a screensho of he Power Sage Designer Tool TM. Regardg he HF ransformer and he oupu ducor, he ransformer s primary and secondary ducance, urns raio and oupu ducance were obaed from Power Sage Designer Tool TM and were used for buildg he magneic componens. VGS () VGS () VDS () VDS () IDS () IDS () T/2 2 V V I pk 2 V V I pk & dra source volages (ransformer primary volages) Gae source volage Gae source volage & dra source currens IR1 () & currens IR2 () Vx I Iou DT T/2 DTT/2 T Figure 7 Waveforms of a pushpull converer on Recified secondary volage V (Ns/Np) I Oupu ducor curren Figure 8 Power Sage Designer Tool TM screensho Figure 9 (a) and (b) illusrae some of he volage and curren waveforms obaed usg his sofware. This is significan because Power Sage Designer Tool TM is useful for furher analysis of he waveforms of he converer s componens especially a mimum, average and maximum pu volage. III. DESIGN ASPETS OF THE VERTER Based on he analysis he previous secion, he specificaions se for he design are as follows: Inpu volage range: V Oupu volage: 13.8 V Oupu curren: 3 A Oupu power: 40 W Swichg frequency: 50 khz A. ompuer Aided Design of he Pushpull onverer ompuer aided design of power elecronic converer sysems have become dispensable before pracical hardware implemenaion is done [8]. The need o furher reduce design ime and effor, as well as reduce cos and (a)

High Frequency Pushpull Transformer Designg magneic componens form he backbone of a good swichg power supply.

4 V DS For MOSFET swiches = 2V (5) where V DS is he dra source volage. I D 1.2 Pou = (6) V (m) where I D is he dra curren. Based on hese equaions, he IRF540N MOSFETs from Inernaional Recifier was chosen. (b) Figure 9 a) MOSFET dra volage of 44 V wih a f 22 V, b) Oupu ducor curren of 3.12 A wih a f 22 V. B. High Frequency Pushpull Transformer Designg magneic componens form he backbone of a good swichg power supply. Their proper elecrical and physical design have a large effec on he reliable operaion of every swichg power supply [10]. Furhermore, he design of magneic componens ake considerable ime as here are many decisions o be made: core maerial, core shape and ype of conducor, o menion a few [11]. A specific mehod was followed for he design of he HF ransformer [12]. The design corporaes a N87 MnZn ferrie core maerial while he core shape is he EPOS ETD 49. I comprises a cener ap primary wdg and a secondary cener ap wdg. The primary and secondary are each divided o wo 3urn wdgs and he ransformer s urns raio is 1:1. The primary was wound usg copper foil order o achieve good couplg and mimize leakage ducance and sk effec ha is prevalen cyldrical copper conducors. The layer sequencg Figure 10 shows how he layers have been arranged he HF pushpull ransformer. When erleavg wdgs a pushpull circui wih wo primary layers and wo secondary layers, he simulaneously conducg half primary and secondary should be adjacen o each oher. This reduces eddy curren losses [13]. V R For he recifiers = 2 V (7) ou where V R is he D reverse volage. I F = I (8) ou where I F is forward curren. The resuls of hese equaions were used o selec he 30P50 schoky recifier diodes which are readily available. D. onrol Sage The conrol scheme is buil around a PWM I U3825 from Texas Insrumens which drives he gaes of he wo MOSFET swiches. The U3825 chip maas he regulaed oupu volage. As depiced figure 11, curren mode conrol has been implemened o regulae he converer oupu. The PWM I generaes low and high MOSFET drive signals ha are varied o give an oupu of 13.8 V. This volage is sampled o he I, which compares his volage wih is own ernal reference. If he error is posiive, hen he oupu ps of he conrol I are shudown, herefore providg overvolage proecion for he load. If he error is negaive, he duy cycle is adjused o give he desired oupu volage [14]. Figure 10 Pushpull ransformer layer sequencg. Selecion of Power Swiches and Recifiers As for oher opologies, volage and curren sresses power swiches and recifiers of he pushpull converer can be prediced [10]. These esimaes have abou a 90 % percen confidence facor. The equaions used o deerme he sresses are he followg: Figure 11 oncep of curren mode conrol The pu curren is also moniored and is equivalen volage is fed o he curren limi p of he conrol I. If he curren exceeds he se curren limi, he oupu ps of he conrol I are shudown providg shorcircui proecion as well.

5 IV. EXPERIMENTA RESUTS The 40 W converer was consruced on a bread board and esed o evaluae is performance. The pushpull converer prooype consiss of an EMI filer, wo paralleled IRF540N MOSFETs, he HF ransformer, recifyg circui and oupu filer. Figure 12 shows he converer under es. Figure 14 shows he gae volages of each MOSFET as well as he dead ime which exiss beween hem. Pushpull onverer under Tes EMI filer U3825 PWM I Recifier oupu filer 50 khz HF Transformer Figure 12 Pushpull converer buil laboraory Gae Drive ircui MOSFET Swiches Figure 14 and MOSFET gae volages The op race Figure 15 represens he volage across one half of he primary wdgs of he ransformer and he lower one he volage across he oher half. The efficiency of he converer for differen load currens has been deermed and ploed Figure 13. The overall esimaed efficiency of a pushpull converer has been around 72 % [10]. The highes efficiency a his sage of he developmen has been 63% a an pu volage of 28 V which is he nomal operag volage of he commercial PEM F ended o be used conjuncion wih his prooype. Figure 15 Transformer primary waveforms or dra source volages of and Figure 16 shows he curren waveforms MOSFET, which is he same for. Figure 13 Plo of curren vs efficiency of he pushpull converer Oher resuls are shown below showg he volages and currens a a mimum pu volage of 22 V and a curren of 1.8 A. The oupu volage was 13.8 V wih an oupu curren of 1.6 A. alculag he efficiency: P = V I = 22 V 1.8 A = 39.6 W (9) Pou = Vou Iou = 13.8 V 1.6 A = 22 W (10) The efficiency is Pou 22 W η = = = 0.55 = 55% (11) P 39.6 W Figure 16 urren carried by each swich As he HF ransformer has a urns raio of 1:1, he amoun of volage presen a he primary is he same on he secondary. Figure 17 presens his recified volage.

However, for furher improvemen, he converer will be buil on a proper PB board o negae parasiic effecs affecg he prooype which is currenly buil on breadboard.

6 However, for furher improvemen, he converer will be buil on a proper PB board o negae parasiic effecs affecg he prooype which is currenly buil on breadboard. Furher design consideraions will clude efficien energy managemen and conrol of he power flows he various sysem componens. This is a key po for converer performance. Figure 17 Volage a he oupu of he recifier circui Fally, Figure 18 and 19 presen respecively he measured oupu curren and volage. These measuremens show ha he converer produces a regulaed 13.8 V D from an pu volage of 22 V. Figure 18 Pushpull converer oupu curren Figure 19 Pushpull converer oupu volage V. USI The design and prelimary developmen of a pushpull converer wih he aim of converg V D volages from a commercial PEM F o 13.8 V was presened. The experimenal resuls confirm he expeced oucome. The highes efficiency of he converer is around 63 % (See Figure 12). Fuel cells need o be egraed wih sorage elemens such as supercapaciors and baeries order o accommodae rapid changes load demand. This requires addiional converer sysems order o erface he various power sources wih each oher and wih he load. VI. AKNOWEDGEMENT This research was made possible by Telkom SA d, M TE, TFM and THRIP. VII. REFERENES [1] N. M. Sammes, Fuel cell echnology reachg owards commercializaion. ondon: Sprger, [2] M. H. Todorovic,. Palma, and P. N. Enjei, "Design of a wide pu range DD converer wih a robus power conrol scheme suiable for fuel cell power conversion," IEEE Transacions on Indusrial Elecronics, vol. 55, pp , Mar [3] A. hakrabory, "Advancemens power elecronics and drives erface wih growg renewable energy resources," Renewable and Susaable Energy Reviews, vol. 15, pp , [4] S. Basu, Recen rends Fuel ell Science and Technology. New Delhi: Sprger, [5] X. HaiPg, W. XuHui, and K. i, "High power DD converer and fuel cell disribued generaion sysem," Indusry Applicaions onference, h IAS Annual Meeg. onference Record of he 2004 IEEE, 2004, pp vol.2. [6] P. R. K. hey, Swichmode power supply design: TAB Books Inc, [7] D. W. Har, Power elecronics. New York: McGrawHill, [8] M. Dawande, V. Donescu, Z. Yao, and V. Rajagopalan, "Recen advances simulaion of power elecronics converer sysems," Sadhana, vol. 22, pp , [9] S. Kelkar and W. Moussa, "AD ools for elecric design and simulaion of pushpull opology power processors," Souhern Tier Technical onference, 1988, Proceedgs of he 1988 IEEE, 1988, pp [10] M. Brown, Power Supply ookbook, 2nd ed. ed. Boson: Newnes, [11] R. enk, praical design of Power supplies. New Jersey: John Wiley & sons c., [12] W. G. Hurley, "Opimizg core and wdg design high frequency ransformers," Power Elecronics ongress, Technical Proceedgs. IEP '96., V IEEE Inernaional, 1996, pp [13] A. I. Pressman, K. Billgs, and T. Morey, Swichg Power Supply Design, 3rd ed. ed. New York: McGrawHill, [14] M. P. Sayani, R. V. Whie, D. G. Nason, and W. A. Taylor, "Isolaed feedback for offle swichg power supplies wih primaryside conrol," Applied Power Elecronics onference and Exposiion, APE '88. onference Proceedgs 1988., Third Annual IEEE, 1988, pp hrisian K. Kuyula received his BTech degree Elecrical Engeerg 2006 from Vaal Universiy of Technology. He is currenly sudyg owards his MTech degree a he same siuion. His research eress clude power elecronics, fuel cells and oher alernaive energy sources.

Investigation and Simulation Model Results of High Density Wireless Power Harvesting and Transfer Method

Investigation and Simulation Model Results of High Density Wireless Power Harvesting and Transfer Method Invesigaion and Simulaion Model Resuls of High Densiy Wireless Power Harvesing and Transfer Mehod Jaber A. Abu Qahouq, Senior Member, IEEE, and Zhigang Dang The Universiy of Alabama Deparmen of Elecrical