Bootstrap Gate Driver and Output Filter of An SC-based Multilevel Inverter for Aircraft APU

Transcription

1 Asian Power Elecronics Journal, Vol. 9, No. 2, Dec. 215 Boosrap Gae Driver and Oupu Filer o An C-based Mulilevel Inverer or Aircra APU Yuanmao YE,K.W.Eric CHENG, N.C. Cheung Power Elecronics Research Cenre, Deparmen o Elecrical Engineering, The Hong Kong Polyechnic Universiy, Hong Kong yuanmao.ye@connec.polyu.hk, eeecheng@polyu.edu.hk, norber.cheung@polyu.edu.hk Absrac The objecive o his paper is o propose a gae drive circui and an oupu iler o a swiched-capacior based mulilevel inverer or aircra APU. Wih he boosrap mehodology, only one volage source is required o power he gae driver o all swiches used in he mulilevel inverer. Wih he LC iler, his inverer is capable o providing a pure sinusoidal oupu volage waveorm. Finally, he perormance o he proposed mulilevel inverer is evaluaed wih simulaion resuls and experimenal resuls o an eleven-level prooype inverer. Keywords Mulilevel inverer, swiched-capacior, boosrap capacior driver, sinusoidal PWM. I. INTRODUCTION Aircras requires an auxiliary power uni (APU) o produce high requency alernaing curren, usually 4 Hz. To obain an oupu waveorm as much as sinusoidal shape, mulilevel inverer echnique has been an alernaive o convenional 2-level inverer. I is well known ha he more he levels o an inverer, he more near sinusoidal is oupu volage is. I also means he more power semiconducors and volage sources or capaciors are required. Consequenly, one o he key echnologies or mulilevel inverers is o use less componens and simpler srucures o obain he more levels o oupu volages. The convenional mulilevel inverers can be divided ino hree caegories [1]: neural-poin-clamped [2], lying capaciors [3], and he H-bridge cascade [4]. One o heir common drawbacks is ha an excessive number o power semiconducor swiches and capacior sources employed ha leads o he complex srucure and higher power loss. In he lieraure [5], a novel mulilevel inverer is presened or high requency applicaions. I is made up o a novel DC-DC mulilevel converer and an H-bridge as shown in Fig.1. The key poin o his inverer is he DC- DC conversion secion which consiss o muliple swiched-capacior (C) cells. Each cell employs only one capacior, one acive swich and wo diodes. The number o n-1 C cells can compose an n-level DC-DC converer. They are conneced o an H-bridge, a (2n+1)-level inverer can be easily derived. The srucure is very simple and ewer componens are required. In order o promoe his novel mulilevel inverer or indusrial applicaions, a simple gae drive circui is developed by using boosrap echnique in his paper. I means ha only one power supply is required o power he gae drive circui or all swiches employed in his inverer. This design philosophy conribues he small size and coseeciveness o he inverer. Fig.1: The mulilevel inverer presened in [5] To develop a pure sinusoidal oupu volage waveorm, an LC iler is added on he oupu erminal o his mulilevel inverer in his paper. Boh simulaion and experimenal resuls o a seven-level inverer prooype are provided o evaluae he perormance o he inverer. Fig.2: The seven-level opology o he mulilevel inverer II. CIRCUIT DECRIPTION AND TATE ANALYI 1. Circui Descripion Fig.2 shows he opology o proposed inverer in seven levels. I is composed o a hree-level DC-DC converer, a ull bridge and an oupu low-pass iler. As menioned beore, he key poin o he seven-level inverer is he secion o DC-DC converer which consiss o hree acive swiches Q, Q 1 and Q 2, hree diodes D 1, D 2 and D 2, and wo capaciors C 1 and C 2. Wih dieren conrol sraegies or he hree acive swiches, he DC-DC conversion secion is capable o convering he inpu volage V in in dieren levels, including 3V in, 2V in and V in. Like many oher mulilevel inverers aoremenioned, he proposed 36

2 inverer also includes an inverer bridge which employs our acive swiches 1~ 4, and an oupu LC iler used or ilering higher harmonics. 2. aes analysis As menioned beore, wih dieren conrol sraegies, he circui secion o mulilevel DC-DC converer o he proposed inverer is capable o convering he inpu volage V in in dieren levels. For he seven-level inverer as shown in Fig.2, here are hree levels ha can be produced by he mulilevel converer secion, including he levels o V in, 2V in and 3V in. Wih he combinaion o he operaion o he inverer bridge, he inverer can provide seven levels o volage: 3V in, 2V in, V in,, -V in, -2V in and - 3V in. a. he zero level oupu b. he level o Vin oupu c. he level o 2Vin oupu Yuanmao YE e. al: Boosrap Gae Driver and Oupu is ormed by V in, D 2, C 2, D 2 and Q, and C 2 is also charged by V in. In his case, when he swich 1 is urned ON and oher swiches in he H-bridge mainains he OFF sae as shown in Fig.3a, he oupu bus volage v bus is equal o. Bu i he swich 4 is urned ON as well as shown in Fig.3b, he bus volage will change o V in. O course, when he swich 2 is urned ON, and 1 and 4 mainain OFF sae, anoher level and V in could be produced by being OFF or ON o 3. In he DC-DC conversion secion, when he swich Q 1 is urned ON and oher swiches are OFF, he capacior C 1 is conneced in series wih inpu power V in hrough Q 1 and D 2 and he DC-DC converer secion oupu he volage level o V in+v C1. Assuming he capaciance o C 1 is large enough, he 2V in level can be produced by being ON o 1, 4 and OFF o 2 and 3 as shown in Fig.3c. imilarly, when 1 and 4 are urned OFF and 2, 3 are urned ON, he level o -2V in can be produced as he bus volage v bus. When Q 1 and Q 2 are urned ON simulaneously while Q being OFF, capaciors C 1, C 2 and inpu source V in are conneced in series by swiches Q 1 and Q 2. Under he condiion o he values o C 1 and C 2 are boh large enough, he level o 3V in can be oupu by he DC-DC converer secion. In his case, i he swiches 1 and 4 are urned ON and 2 and 3 being OFF, he bus volage v bus is equal o 3V in as shown in Fig.3d. Wih similar mehod, he level o -3V in can be produced by urning swiches 1 and 4 OFF, and 2 and 3 ON. According he above analysis, he working saes combinaion o he seven-level version o he proposed inverer is concluded as shown in Tab.1. I can be seen rom Tab.1 ha here are eigh working saes or he inverer corresponding o seven volage levels, including wo zero level saes. In each sae, a maximum o only our swiches are in conducion. And when he inverer operaes alernaively in wo adjacen saes, here is only one or wo swiches saes needed o be changed. TABLE I Working saes combinaion o he seven-level inverer No. o Bus volage wiching saes saes vbus Q Q1 Q Vin Vin Vin Vin Vin Vin d. he level o 3Vin oupu Fig.3: Working saes or he proposed inverer peciically, when he swich Q is urned ON and Q 1 and Q 2 being OFF, V in, D 1, C 1 and Q orm a closed loop and C 1 is charged by inpu power V in. And anoher closed loop 3. Modulaion Mehod There are many modulaion mehods o conrol a mulilevel inverer, such as classic carrier-based sinusoidal PWM (PWM) mehod [6]. In his secion, PWM is also inroduced o modulae he mulilevel inverer, as ollows. For he seven-level inverer, here are six carrier signals e 1~e 6 and a modulaed sinusoidal signal e needed, as shown in Fig.4a which is he modulaion logic circui or he proposed seven-level inverer. Fig.4b shows he corresponding modulaion waveorms, in which A C is he 37

3 Asian Power Elecronics Journal, Vol. 9, No. 2, Dec. 215 ampliude o he carrier signals. I deining he symbol A as he ampliude o he modulaed sinusoidal signal, he modulaion index M can be deined as 2A 1) A C M (1) ( N where N is he number o he levels and i is odd. For he proposed seven-level inverer, N=7. desired oupu sinusoidal volage hereore can be derived as (3). N 1 vo MVin sin (3) 2 III. GATE DRIVER AND OUTPUT FILTER 1. Gae driver or he proposed inverer For mulilevel inverers, a large number o acive swiching elemens are required and he drive circui is needed or each swich. In his respec, he cos and complexiy o he gae driver depends on he number o acive swiches required or he mulilevel inverer. For he proposed inverer, alhough he number o acive swiches employed is much lesser han convenional mulilevel inverer, is gae drive circui is sill a very imporan issue. Boosrap capacior driver (BCD) is a maure gae drive echnique and has radiionally been applied in various bridge circuis [7]. Based on he special srucure o he proposed inverer, BCD echnique is also inroduced o drive he all acive swiches. 3A C e 6 2A C e 5 A C e 4 e 3 -A C e 2-2A C e 1-3A C v GQ v GQ1 v GQ2 v G1 v G2 v G3 v G4 a. modulaion logic circui e In he proposed opology which consiss o a ull bridge and a mulilevel DC-DC converer, he gae drivers or he ull bridge is very simple and is no elaboraed in he ex. For he DC-DC conversion secion, acive swiches Q 1 o Q n are acually conneced in series wih Q hough diodes D 1 o D n respecively. And Q can be urned ON jus aer all oher swiches Q 1 o Q n being OFF. The volage or he gae driver o Q hereore can be supplied direcly by he signal power V gae. And he volage sources or he gae drivers o Q 1 o Q n could be implemened by using a boosrap capacior or each swich as shown in Fig.5. Take he diver circui o Q 1, BCD-1 as an example, when swich Q is urned ON while Q 1 being OFF, he capacior C B1 is charged by he signal power V gae hough D 11, D 1 and Q, he energy is sored in C B1 and is volage is evenually equal o V gae. When Q is urned OFF, swich Q 1 could be conrolled by is rigger signal v GQ1 and volage as well as power are supplied by he capacior C B1. For oher swiches Q i (i=2, 3,, n), he gae drivers BCD-i are oally he same as BCD-1. The gae diver or he oal inverer is hereore very simple and only one signal power V gae is required. v bus b. modulaion waveorms Fig.4: Modulaion mehod or he proposed seven-level inverer And he requency modulaion raio can also be deined as P / (2) where C and C are he angular requencies o he carrier signal and modulaed signal respecively. And he Fig.5: Gae driver or he proposed inverer 2. Oupu iler design or he proposed inverer 38

4 Comparing wih 2-level inverer, he oupu perormance o he mulilevel inverers is more saisacory in he erms o harmonics. The oupu ilers hereore are easier o be designed. Usually, he mulilevel inverers only need o employ an LC low-pass oupu iler wih reasonable parameers o provide saisacory oupu sinusoidal volage. The deailed design mehods o LC iler or PWM inverers have been inroduced in [8], [9] and he echnique is very maure, ha is mainly based he consideraions o reacive power and oupu volage harmonics. imply, he design seps o a LC iler or PWM inverers can be summarized as ollows. 1). o deermine he iler cu-o requency ω reerring o he carrier signals requency ω C and he modulaed signal requency ω, i.e. 1 (4) LC and (5) C Yuanmao YE e. al: Boosrap Gae Driver and Oupu imulaion resuls indicae ha he mulilevel inverer is capable o generaing a pure sinusoidal oupu volage waveorm v O and his is beneied rom he boosrap gae driver circui and he LC iler developed in his paper. a. he carrier signals e1~e6 and he modulaed signal e 2). o deermine he inducance o he iler according o he principle o minimum reacive power. For he pure resisance load, he reacive power Q LC caused by he LC iler could be approximaely expressed as Q LC IO L ( ) U (6) 2 4 O L 3 where U O and I O are he rms values o he oupu volage and load curren respecively. The minimum reacive power is obained when Q LC L. The value o he inducor L hereore can be calculaed by L U I 1 ( ) O 2 (7) O 3). calculae he capaciance o he iler according he value o inducance L and he cu-o requency, i.e. 1 C (8) 2 L b. swiching conrol signals IV. IMULATION EXPERIMENTAL VERIFICATION 1. imulaion Resuls To veriy he easibiliy o he proposed gae driver and he LC oupu iler developed or he mulilevel inverer o Fig.1, a simulaion model is buil based on he sevenlevel opology, he mulicarrier PWM echnique and he gae driver srucure as shown in Figs. 2, 4a and 5 respecively. Fig.6 shows he simulaed resuls and he simulaion parameers are chosen as ollowing: he dc inpu volage V in is 24V; he capaciances o C 1 and C 2 boh are 1μF; he carrier signals requency and he modulaed signal requency are 4kHz and 4Hz respecively; he modulaion index M is.96 and he load resisance is 22Ω; he signal power V gae is 15V and he boosrap capacior is 1μF; he oupu iler inducance L and capaciance C are 85μH and 2.2μF respecively. c. oupu volage waveorms Fig.6: imulaion resuls o he seven-level oupu 2. Experimenal Resuls A prooype o he seven-level version o he proposed inverer is developed o evaluae he perormance o he proposed opology in he generaion o a desired oupu 39

5 Asian Power Elecronics Journal, Vol. 9, No. 2, Dec. 215 volage waveorm. The basic parameers are he same as ha used or simulaion and he swiches are seleced as ollowing: 1~ 4 and Q are MOFETs IRFB419PBF; Q 1 and Q 2 are MOFETs IRFI54A; MBR11 are used as he diodes D 1, D 2 and D 2. The modulaion index M is sill.96. The experimenal resuls are shown in Fig.7. As shown in Fig.7a, he oupu volage waveorms are basically he same as he simulaion resuls aoremenioned excep or he ampliude, which is slighly lower han he heoreical value he simulaion resul because he volage drops o he swiching devices. Fig.7b shows he requency specrum o he bus volage v bus. I can be seen ha he lower order harmonics are small bu he higher harmonics canno be negleced, especially hose closed o he carrier signals requency. This issue is easily solved by he oupu LC iler as shown in Figs.7c and 7d, which show he requency specrum o he oupu volage v O. a. CH1: vbus; CH2: vo; CH3: io d. requency specrum o vo (~1.5kHz) Fig.7: Experimenal resuls o he seven-level inverer IV. CONCLUION In his paper, a simple gae drive circui and an oupu iler are developed or he mulilevel inverer presened in [5]. Wih his boosrap gae driver, only one volage source is required o power he drive circui o all swiches employed in his inverer. This makes i has he advanages o small size and cos-eeciveness. Wih he LC iler, his inverer is capable o providing a pure sinusoidal oupu volage waveorm. And i is very suiable or aircra APUs. imulaion and experimenal resuls indicae he gae driver and he LC iler inroduced in his paper provide a very well soluion o promoe he indusrial applicaions o he mulilevel inverer. ACKNOWLEDGMENT The auhors graeul acknowledge he inancial suppor o Innovaion and Technology Fund o Hong Kong ITC and JL Ecopro Tech. Ld under he projec number UIM b. requency specrum o vbus (~125kHz) c. requency specrum o vo (~125kHz) REFERENCE [1] J. Rodriguez, J.. Lai, and F. Z. Peng, Mulilevel inverers: Asurvey o opologies, conrol, and applicaions, IEEE Transacion on Indusrial Elecronics, vol.49, no.4, pp , Dec. 22. [2] J. Rodriguez,. Berne, P.K. eimer, and I.E. Lizama, A survey on neural-poin-clamped inverers, IEEE Transacion on Indusrial Elecronics, vol.57, no.7, pp , Jul. 21. [3] M. F. Escalane, J. -C. Vannier and A. Arzande, Flying capacior mulilevel inverers and DTC moor drive applicaions, IEEE Trans. Ind. Elecron., vol. 49, no. 4, pp , Aug. 22. [4] M. Malinowski, K. Gopakumar, J. Rodriguez, M. A. Pe rez, A urvey on Cascaded Mulilevel Inverers, IEEE Trans. Ind. Elecron., vol. 57, no. 7, pp , Jul. 21. [5] Yuanmao Ye, K.W.E. Cheng, Juneng Liu, and Kai Ding, A ep- Up wiched-capacior Mulilevel Inverer wih el Volage Balancing, IEEE Trans. Ind. Elecron., vol. 61, no. 12, pp , Dec [6] Mwinyiwiwa B., Wolanski Z., Yiqiang Chen, Boon-Teck Ooi, "Mulimodular mulilevel converers wih inpu/oupu lineariy," IEEE Transacions on Indusry Applicaions, vol.33, no.5, pp , ep./oc [7] Graczkowski J.J., Ne K.L., Kou X., A Low-Cos Gae Driver Design Using Boosrap Capaciors or Mulilevel MOFET Inverers, CE/IEEE 5h Inernaional Power Elecronics and Moion Conrol Conerence, Aug. 26. [8] oo-hong Kim, Yoon-Ho Kim, Kang-Moon eo, ang-eok Bang, Kwang-eob Kim, Harmonic analysis and oupu iler design o NPC muli-level inverers, 37h IEEE Power Elecronics pecialiss Conerence, June 26. [9] Hyosung Kim and eung-ki ul, "A Novel Filer Design or Oupu LC Filers o PWM Inverers", Journal o Power Elecronics, vol.11, no.1, pp.74-81, Jan. 211.