Design Considerations and Performance Evaluation of Single-Stage TAIPEI Rectifier for HVDC Distribution Applications

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1 Design Consideraions and Performance Evaluaion of Single-Sage TAIPEI Recifier for HVDC Disribuion Applicaions Yungaek Jang, Milan M. Jovanović, and Juan M. Ruiz Power Elecronics Laboraory Dela Producs Corporaion P.O. Box 12173, 5101 Davis Drive Research Triangle Park, NC 27709, USA Absrac Design consideraions and performance evaluaions of a hree-phase, four-swich, single-sage, isolaed zero-volage-swiching (ZVS) recifier are presened. The circui is obained by inegraing he hree-phase, wo-swich, ZVS, disconinuous-curren-mode (DCM), boos power-facorcorrecion (PFC) recifier, named for shor he TAIPEI recifier, wih he ZVS full-bridge (FB) phase-shif dc/dc converer. The performance was evaluaed on a hree-phase 2.7-kW prooype designed for HVDC disribuion applicaions wih he line-oline volage range from 180 V RMS o 264 V RMS and wih a ighly regulaed variable dc oupu volage from 200 V o 300 V. The prooype operaes wih ZVS over he enire inpu-volage and load-curren range and achieves less han 5% inpu-curren THD wih he efficiency in he 95% range. I. INTRODUCTION The HVDC disribuion ha has been proposed more han a decade ago is emerging as one of he mos promising approaches o improve energy efficiency of daa-processing and elecommunicaion power sysems [1]-[2]. For he ime being, he disribuion volage has no been sandardized so ha demonsraion sysems wih nominal bus volages ranging from 240 V o 400 V have been repored [1]-[5]. Generally, in he elecom power sysems, which use -48-V dc-bus disribuion, he HVDC bus archiecure brings efficiency gains by lowering he disribuion-bus losses, whereas in he daa cener power sysems i increases he power sysem efficiency by reducing he number of conversion sages compared o he presen ac-bus disribuion archiecure. Moreover, expeced more aggressive inegraion of alernaive energy sources ino power disribuion sysems is making he HVDC disribuion even more appealing because inrinsic dc-sources such as phoovolaic and fuel cell can be conneced o he dc-bus wih minimal power processing. Generally, off-line power supplies for HVDC sysem consis of a fron-end power-facor-correcion (PFC) recifier followed by an isolaed dc-dc converer. In hree-phase applicaions, he six-swich boos converer and Vienna recifier are he mos commonly used fron-end opologies [6]. The choice of isolaed dc/dc oupu-sage opology is primarily dependen on he power level. A kilowa power levels, bridge-ype opologies are ypically used. Zerovolage-swiching (ZVS) full-bridge (FB) converer wih he phase-shif conrol is by far he mos widely employed opology in oday s server power supplies and elecom recifiers [7]. However, in high-end applicaions where he highes possible efficiency and power densiy is required, he half- or full-bridge LLC resonan opology is used [8]. Alhough he wo-sage off-line conversion has demonsraed excellen performance, power supply designers have always been emped o combine he wo sages ino a single sage o reduce he cos and/or o increase he power densiy [9]-[11]. Recenly, a hree-phase, isolaed, singlesage Taipei recifier has been inroduced [12]. The recifier is derived by inegraing he hree-phase, ZVS, PFC, disconinuous-conducion mode (DCM) boos recifier, shorened o he TAIPEI recifier [13], wih a convenional phase-shif ZVS FB converer [7]. In addiion o exhibiing an excellen THD and PF performance, he recifier offers ZVS of all swiches in a wide oupu-curren range which reduces swiching losses and improves efficiency. In his paper, design consideraions and performance evaluaion of he hree-phase single-sage Taipei recifier for a 270-V HVDC sysem are presened. The performance was evaluaed on a 2.7-kW prooype designed o operae in he hree-phase line-o-line volage range from 180 V RMS o 264 V RMS and deliver a ighly regulaed dc oupu volage from 200 V o 300 V. The proposed recifier mainains inpucurren THD below 5% from full load down o 20% load and efficiency beween 94% and 95.5% from full load down o 40% load. II. SPECIFICATIONS The design opimizaion and performance evaluaion of he single-sage Taipei recifier was performed for a prooype wih he following inpu and oupu specificaions: Line-o-line hree-phase ac inpu volage range: 180 V RMS 265 V RMS ISBN

2 OUTPUT VOLTAGE 300 V 270 V 2700 W 0 V A V B L 2 TAIPEI RECTIFIER D 1 D 2 D 3 C R V CR S 1 FULL-BRIDGE CONVERTER V P S V V C C B TR S 2 D O1 D O2 D 4 D 5 D 6 1 A 9.2 A 10 A OUTPUT CURRENT C 1 C 2 C 3 S 1 S 2 S 3 N Fig. 1. Oupu specificaions of ypical HVDC power supply. DRIVER CONTROLLER Line frequency range: 45 Hz 66 Hz THD: < 5% above 50% load, < 10% from 20% o 50% load PF: 99% a 100% load, 98% a 50% load Hold up ime: 10 ms Efficiency: 95% from 30% o 100% load Oupu volage: nominal 270 V, minimum 200 V, maximum 300 V (see Fig. 1) Oupu curren: 10 A a 270 V (also see Fig. 1) Oupu volage regulaion: < / V Sar up or load sep overshoo/undershoo: </- 8 V The required oupu volage, curren, and power are depiced in Fig. 1. As shown in Fig. 1, he power supply delivers full power over he oupu volage range from 270 V o 300 V. The oupu curren is limied o 10 A when he oupu volage is beween 200 V and 270 V. When he oupu volage drops below 200 V, he limi of he oupu curren decreases linearly from 10 A o 1 A. III. BRIEF REVIEW OF SINGLE-STAGE TAIPEI RECTIFIER The circui diagram and he ideal waveforms of he proposed hree-phase, single-sage Taipei recifier are shown in Fig. 2 and Fig. 3, respecively [12]. In his circui, swiches S 1 and S 2 simulaneously serve as he swiches of he boos fron end and leading-leg swiches of he ZVS FB. A he inpu side, hree boos inducors, L 2, and are conneced o he hree-phase power-source erminals along wih hree differenial-mode filer capaciors C 1, C 2, and C 3 conneced in Y ( sar ) configuraion. Since for a balanced hree-phase power source, he poenial of he common node of he filer capaciors, labeled N in Fig. 2, represens a virual neural. Virual neural N is conneced o he mid-poin beween wo swiches S 1 and S 2. As a resul of connecing virual neural N direcly o he mid-poin beween swiches S 1 and S 2, decoupling of he hree inpu currens is achieved. In such a decoupled circui, he curren in each of he hree inducors is dependen only on he corresponding phase volage, which reduces he THD and increases he PF [13]. In addiion, he Fig. 3. FREQUENCY AND PHASE-SHIFT CONTROL Fig. 2. R Single-sage TAIPEI recifier T S S 1 S 2 S 1 ON S 2 ON S 1 ON S 2 ON S 3 V AN -V CR V AN V CR -V CN V P V CR Ideal waveforms of single-sage TAIPEI recifier mid-poin of he swiches does no experience abrup changes wih high dv/d, which makes i possible for he recifier o operae wih a relaively low common-mode EMI noise. Swiches S 3 and serve as he lagging-leg swiches of he phase-shif FB converer whose primary also includes isolaion ransformer TR and blocking capacior C B. In Fig. 2, he secondary-side of he FB converer is implemened wih he cener-apped secondary winding, oupu diodes D O1 and D O2, and oupu filer L O - C O. Since swiches S 1 and S 2 operae as he PFC boos swiches as well as he leading leg swiches of he ZVS FB circui as shown in Figs. 2 and 3, he energy required o achieve ZVS of swiches S 1 and S 2 is sored boh in boos V O -V CN C O L O i LO ON S 3 ON ON S 3 ON -ni O DT S -V BN V CR -V BN L 2 i L L2 2 ni O -V CR N 2 n = N 1 ISBN

3 inducors - and he leakage inducance of ransformer TR. Because he inducance of he boos inducors is relaively large, hey sore enough energy for complee ZVS of swiches S 1 and S 2 even a very low power levels. As a resul, in he proposed circui in Fig. 2, he leakage inducance of he ransformer can be minimized. This improves he performance of he ZVS FB converer because i minimizes he secondary-side duy-cycle loss and parasiic ringing beween he juncion capaciance of he secondary-side recifier and he leakage inducance [7]. The energy required o achieve ZVS of lagging-leg swiches S 3 and is sored in oupu inducor L O. Since he inducance of he oupu-filer inducor is also large, all four swiches in he proposed converer can achieve ZVS in a wide inpu-volage and load range. As illusraed in Fig. 2, o achieve a igh oupu-volage regulaion over he enire programmable range of oupu volage V O, he proposed single-sage recifier employs a high bandwidh frequency conrol assised by he open-loop phaseshif conrol. The open-loop phase-shif conrol is employed o regulae bus volage V CR o be approximaely 400 V over he enire range of oupu volage V O from 200 V o 300 V. Since for V CR =400 V, duy raio D of he full-bridge converer is 1 VO D, (1) n 400 where n=n 2 /N 1 is he urns raio of ransformer TR, he phase shif for a given oupu volage V O can be calculaed as 1 VO DTS T, (2) S n 400 where T S is he swiching period deermined by he variablefrequency oupu-volage conrol loop. Because of he required phase-shif calculaions, digial conrol is used in his design. I should be noed ha he proposed single-sage TAIPEI recifier is opologically idenical o ha described by Huang e al. in [11]. However, he inpu-curren THD and efficiency performance of he wo implemenaions are dramaically differen because of differen conrol approaches. The implemenaion in [11] regulaes only he oupu volage wih a consan-frequency conrol ha canno achieve THD below 5% and does no provide ZVS of all four swiches. IV. DESIGN CONSIDERATIONS A. Swiching Frequency Selecion Because he proposed recifier employs variable-frequency conrol, he minimum and maximum swiching frequencies should be seleced firs. The relaionship beween inpu power P IN, oupu volage V O, boos inducance L, and swiching frequency f S was derived in [13] as, 2 3 VO 0.48 fs 2 (3) 8 L M P n D M IN where inpu-o-oupu volage conversion raio M is 3VO M (4) 2VIN n D and boos inducor L = = L 2 =. As well undersood, swiching frequency selecion is based on he rade-off beween efficiency and size, i.e., power densiy. In his design, he minimum frequency, which occurs a he minimum inpu volage and full load is se a 18 khz, whereas he maximum frequency is limied o 300 khz o primarily limi he swiching losses in he ransformer. Wih he 300 khz limi, he prooype recifier can regulae he oupu volage a high line down o 10% load. For loads below 10% of he full load, he burs-mode operaion is applied. B. Boos Inducor Design Because he recifier operaes in DCM, he riangleshaped currens of he boos inducors produce significanly higher core losses compared wih hose when he recifier operaes in he coninuous-conducion mode (CCM). In addiion, o mainain a low THD, i is necessary o mainain consan slopes of he boos-inducor currens. As a resul, ferrie cores wih an air gap are a beer choice han commercially available powder cores, which exhibi higher core losses and whose permeabiliy significanly changes under he varying magneic field srengh. Using he relaionship beween inpu power P IN, oupu volage V O, swiching frequency f S, and inducance L, shown in Eq. (3), he inducance value can be calculaed as 2 3 VO 0.48 L 2. (5) 8 f M P n D M S IN By selecing he swiching frequency of 20 khz a he minimum inpu volage and full load, which gives 2-kHz design margin, he required value of he boos inducors is approximaely L=140 H. To obain his inducance each inducor was buil using a pair of ferrie cores (PQ-40/40, DMR95) wih 60 urns of Liz wire (Φ 0.1mm, 150 srands) and a 15.2 mm gap. The Liz wire was used o reduce he fringing-effec-induced winding loss near he gap of he inducor core. For his inducor design, he maximum flux densiy which occurs a full load and he minimum inpu volage is 0.32 T. C. Transformer Design The ransformer was buil using a pair of ferrie cores (PQ-50/50, 3C96) wih 42 urns of Liz wire (Φ 0.1mm, 180 srands) for primary and secondary windings. The measured magneizing and leakage inducances are 4 mh and 6.4 H, respecively. Peak magneizing curren I M(PK) ha occurs when he swiching frequency is minimum is given by V I O M(PK) 8 L f n D, (6) M S(MIN) ISBN

4 where L M is he magneizing inducance of ransformer TR and f S(MIN) is he minimum swiching frequency a full load and he minimum inpu volage. According o Eq. (6), he maximum peak-o-peak magneizing curren a full load and he minimum inpu volage is approximaely 1.88 A so ha he maximum flux densiy in seady sae is approximaely 0.25 T, which gives pleny of margin wih respec o he sauraion flux of he ferrie core. I should be noed ha blocking capacior C B, which is conneced in series wih ransformer TR, eliminaes any low-frequency componen of he magneizing curren ha may increase he flux densiy of he ransformer. D. Oupu Inducor Design Generally, he inducance of oupu inducor L O should be seleced sufficienly large so ha i operaes in he CCM over he enire swiching frequency range. In his design, oupu inducor L O was buil using a pair of ferrie cores (PQ-40/40, 3C96) wih 72 urns of Liz wire (Φ 0.1mm, 150 srands) for each winding and a 7.2 mm gap. The measured inducance is 350 H. The maximum flux densiy a seady sae operaion is approximaely 0.27 T, which is far away from he sauraion flux of he ferrie core. E. Inpu Capacior Selecion Inpu capaciors C 1 -C 3 provide filering of he swichingfrequency ripple of he boos inducor currens and pah for heir low-frequency riplen harmonics. Since he magniude of he riplen harmonic componen is much smaller han ha of he ac componen of he boos-inducor currens, he raing of he inpu capaciors is essenially deermined by he peak boos inducor curren ha occurs a he full load and low line. Since in his design, he maximum RMS curren of capaciors C 1 -C 3 is approximaely 7.5 A, a low ESR film capacior (2.2 F, 630 Vdc/400 Vac, 16 A a 40 khz and 20 A a 10 V A V B V C L1, L2, L3 PQ40/40-3C96 Liz 0.1mmx150 60T, 140 uh EMI FILTER Fig. 4. L 2 D1-D6 STTH30R06 D 1 D 2 D 3 C R CR 2x560uF/450 V 2x2.2uF/630V V CR Experimenal prooype circui of proposed recifier. S 1 S 2 TR S1 - S4 IPW65R041CFD CB 3 x 2.2uF S 3 /630 V V P C1, C2, C3 D 4 D 5 D 6 2.2uF C 1 C 2 C 3 /630 V N Do1 - Do4 TR (42T:42T) C3D10060 PQ50/50-3C90 Primary Lo D 7 D 8 Liz 0.1mmx180 PQ40/40-3C96 V O R Co Secondary Liz 0.1mmx uF Liz 0.1mmx180 72T, 350 uh /450 V D 9 D 10 Lm=4mH Llk=6.4uH C B khz) was used for each of inpu filer capaciors C 1, C 2, and C 3. F. Selecion of Oher Capaciors The peak curren of flying capacior C R is equal o he sum of he peak boos inducor curren and he peak magneizing curren of ransformer TR. Two parallel conneced film capaciors (2.2 F, 630 Vdc/400 Vac, 16 A a 40 khz and 20 A a 10 khz) were used for flying capacior C R. Moreover, o mee he hold-up ime requiremen (10 msec), wo addiional elecrolyic capaciors (560 F, 450 Vdc) were conneced in parallel wih he film capaciors. The curren hrough blocking capacior C B is equal o he magneizing curren of ransformer TR and he refleced load curren. Three film capaciors (2.2 F, 630 Vdc/400 Vac, 16 A a 40 khz and 20 A a 10 khz) were used for blocking capacior C B. Finally, wo parallel conneced elecrolyic capaciors (470 F, 450 Vdc) were used for oupu capaciors C O. G. Semiconducor Device Selecion Because he volage sress of swiches S 1 - is approximaely equal o bus volage V CR, i.e., i is around 400 V, i is necessary o use swiches ha are raed a leas 500-V o mainain desirable design margin of 20%. In he prooype circui an IPW65R041CFD MOSFET (V DS = 650 V, R DS = 0.041, C OSS =400 pf, Q rr =1.9 C) from Infineon was used for each swich. I should be noed ha he body diode of he seleced swich has relaively small reverse recovery charge. Because he wo swiches of he recifier form oem pole configuraion, he fas body diode of he swich limis shoo hrough curren if he recifier accidenly eners CCM of operaion. Since inpu diodes D 1 - D 6 mus block he same peak volage sress and conduc he same peak curren (approximaely 28 A) as he swiches, an STTH30R06 recifier (V RRM = 600 V, I FAVM = 30 A) from ST was used for each diode. Since he urns raio of ransformer TR is n=1, he volage sress of secondary-side diodes D 7 - D 10 is equal o V CR =400 V. A C3D10060 SiC recifier (V RRM = 600 V, I FAVM = 10 A) from Cree was used for each oupu diode. The oupu-volage regulaion ha employs variablefrequency conrol ogeher wih open-loop (preprogrammed) phase-shif conrol was implemened by a TMS320F28027 DSP from TI. V. EXPERIMENTAL RESULTS The performance of he proposed recifier was evaluaed on a 2.7-kW prooype circui ha was designed o operae from a V L-L(RMS) hree-phase inpu and deliver a ighly regulaed programmable oupu volage from 200 V o 300 V as specified in Secion II. The prooype circui was designed wih he variablefrequency-conrol feedback loop. Duy cycle D obained by Eq. (1) is pre-programmed in he microconroller o mainain ISBN

5 i A i B i C i A V IN =220 V L-L, V CR =400 V, V O =270 V, P O =2.7 kw f S =25 khz, =94%, PF= Fig. 5. Measured inpu curren waveforms when recifier operaes from hree-phase inpu volage 220 V L-L(RMS) and delivers 2.7 kw. Time scale is 5 ms/div. V IN =220 V L-L, V O =270 V, P O =2.7 kw, f S =25 khz Fig. 6. Measured waveforms of inducor currens,, and when recifier operaes from hree-phase inpu volage 220 V L-L(RMS) and delivers 2.7 kw. Time scale is 5 S/div. V S1 [500 V/div] i S1 i LO V S1 Fig. 7. Measured waveforms of drain volage V S1 and currens i S1 of swich S 1 and primary curren of ransformer TR when recifier operaes from hree-phase inpu volage 220 V L-L(RMS) and delivers 2.7 kw. Time scale is 5 S/div. flying-capacior volage V CR a around 400 V over he oupu volage range. The swiching frequency range of he variablefrequency conrol was beween 20 khz and 300 khz. Figure 4 shows he power-sage schemaics along wih componen informaion of he experimenal prooype circui. Figures 5 and 6 respecively show he measured inpu curren waveforms and curren waveforms of boos inducors, L 2, and of he experimenal circui a he inpu volage of 220 V L-L(RMS) and full load. The measured inpu-curren THD is approximaely 2.1%. i B i C i S1 i LO THD=2.1% V IN =220 V L-L, V O =270 V, P O =2.7 kw, f S =25 khz Figure 7 shows drain-o-source volage V S1 and drain curren i S1 of swich S 1 ogeher wih primary curren and oupu inducor curren i LO when recifier operaes from hreephase inpu volage 220 V L-L(RMS) and delivers full load. As can be seen in Fig. 7, drain curren i S1 is negaive before swich S 1 urns on. The negaive curren flows hrough he body diode of swich S 1, hence he volage across he swich becomes zero before he swich is urned on. Swiches S 2, S 3, and (no shown in Fig. 7) operae in he same manner. The experimenal waveforms are in very good agreemen wih corresponding ideal waveforms shown in Fig. 3. The reason for a noiceable discrepancy beween he measured curren waveform of primary curren of ransformer TR and corresponding ideal waveforms in Fig. 3 is he assumpion ha he ripple of oupu inducor curren i LO is none and volage of he blocking capacior is zero in he ideal case. In he prooype circui, he peak-o-peak ac volage across blocking capacior C B caused by he primary curren flowing hrough i is around 30 V and is effec canno be negleced. In fac, his volage causes a relaively large decrease of he swich currens during he ime inervals when he secondary winding of he ransformer is shored, because he blocking capacior volage reses (decreases) he ransformer primary Fig. 8. Measured efficiencies of experimenal PFC recifier prooype as funcions of oupu power. TABLE I. THD [%] V O [V] V O [V] Efficiency [%] Measured THD a nominal inpu volage (220 V L-L(RMS)) P O [W] TABLE II. Measured PF a nominal inpu volage (220 V L-L(RMS)) PF [%] V = 270 V O V = 200 V O Oupu Power [W] V = 300 V O V = 220 V IN L-L P O [W] ISBN

6 curren wih a relaively high rae V CB /L LK. The measured efficiency, THD, and PF of he proposed recifier as funcions of oupu power a he line-volage of 220 V L-L(RMS) are shown in Fig. 8, Table I, and Table II, respecively. The measured efficiency is beween 94% and 95.5% from full load down o 40% load while he measured THD is below 5% from full load down o 20% load. V. SUMMARY In his paper, he hree-phase, four-swich, single-sage, isolaed PFC recifier ha is derived by combining he recenly inroduced Taipei recifier and a convenional phaseshif full-bridge converer has been described. The proposed recifier offers low inpu-curren THD (< 5%) and a ighly regulaed, isolaed oupu volage and feaures ZVS of all he swiches over he enire inpu and load range. The evaluaion of he proposed converer was performed on a hree-phase 2.7- kw prooype operaing from he V RMS line-o-line volage range and delivering a ighly regulaed programmable oupu volage from 200 V o 300 V. The proposed recifier mainains curren THD below 5% from full load down o 20% load and exhibis efficiency beween 94% and 95.5% from full load down o 40% load. REFERENCES 1. T. Yamashia, S. Muroyama, S. Furubo, and S. Ohsu, 270 V dc sysem a highly efficien and reliable power supply sysem for boh elecom and daacom sysems, Proc. IEEE In l Telecommunicaion Energy Conf. (INTELEC) Rec., 1999, Plenary Session, Paper P D. Marque, F. San Miguel, J-P. Gabille, A. Deshayes, and J-C. Téar New power supply opimized for new elecom neworks and services, Proc. IEEE In l Telecommunicaion Energy Conf. (INTELEC) Rec., 1999, Paper U. Carlsson, M. Flodin, J. Akerlund, and A. Ericsson, Powering he Inerne-broadband equipmen in all faciliies he need for 300-V dc powering and universal curren opion, Proc. IEEE In l Telecommunicaion Energy Conf. (INTELEC) Rec., 2003, Paper 8-1, pp A. Pra, P. Kumar, and T.V. Aldrige, Evaluaion of 400V dc disribuion in elco and daa ceners o improve energy efficiency, Proc. IEEE In l Telecommunicaion Energy Conf. (INTELEC) Rec., 2007, pp Q. Shuguang, H. Fuping, and J. Hui, Sudy and applicaion on high volage dc power feeding sysem for elecommunicaions in China, Proc. IEEE In l Telecommunicaion Energy Conf. (INTELEC) Rec., 2011, Paper J. W. Kolar and T. Friedli, The essence of hree-phase pfc recifier sysems, Proc. IEEE In l Telecommun. Energy Conf. (INTELEC) Rec., 2011, Plenary Session 2, Paper J. Sabaė, V. Vlaković, R. B. Ridley, F. C. Lee, and B. H. Cho, Design consideraions for high-volage high-power full-bridge zerovolage-swiched pwm converer, IEEE Applied Power Elecronics Conf. (APEC) Proc., 1990, pp B. Yang, F.C. Lee, A.J. Zhang, and G. Huang, LLC resonan converer for fron end dc/dc conversion, IEEE Applied Power Elecronics Conf. (APEC) Proc., 2002, pp J.G. Conreras and I. Barbi, A hree-phase high power facor pwm zvs power supply wih a single power sage, IEEE Power Elecronics Specialiss Conf. (PESC), 1994, pp R. Ayyanar, N. Mohan, and J. Sun, Single-sage hree-phase powerfacor-correcion circui using hree isolaed single-phase sepic converers operaing in ccm, IEEE Power Elecronics Specialiss Conf. (PESC) Proc., 2000, pp N. Huang, D. Zhang, T. Song, M. Fan, and Y. Liu, A 10 kw singlesage converer for welding wih inheren power facor correcion, IEEE Applied Power Elecronics Conf. (APEC) Proc., 2005, pp Y. Jang and M.M. Jovanović, The Single-Sage Taipei Recifier, IEEE Applied Power Elecronics Conf. (APEC) Proc., 2013, pp Y. Jang and M.M. Jovanović, The Taipei recifier a new hree-phase wo-swich zvs pfc dcm boos recifier, IEEE Transacions on Power Elecronics, vol. 28, no. 2, pp , Feb ISBN

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