Simulation of a Software Phase-Locked Loop for Typical Grid Disturbances

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2 Simulatin f a Sftware Phase-Lcked Lp fr Typical Grid Disturbances Rueda-Germán Clementina, Rivas- Camber Ivan, Arry-Núñez J. Humbert Electrnic Engineering Department Universidad Plitécnica de Tulancing Tulancing Hidalg, Méxic Abstract During the last year varius techniques f electrical synchrny have been prpsed fr the intercnnectin f lcal pwer generatin systems f small scale with the natinal electrical grid. This paper presents the simulatin f secnd-grade sftware Phase-Lcked Lp (PLL), t analyze the state f engagement (phase tracking) when the reference signal has disturbances. Keywrds SPLL, Phase Lcked Lp, Lp Filter (LF), grid disturbances. I. INTRODUCTION Mst applicatins f lcal systems fr pwer generatin (LSG) cnnected t the utility pwer grid require synchrnizatin between the grid vltage and the vltage synthesized by the cnverter. In many cases, the reference signal btained frm the grid vltage is cntaminated by harmnics, which may have been prduced by the pwer cnverter itself r generated elsewhere []. The mst widely accepted slutin t prvide synchrnizatin between time-varying signals is the use f a Phase-Lcked Lp (PLL) system [8]. A PLL is a device which causes ne signal t track anther ne. It keeps utput signal synchrnizatin with a reference input signal in frequency as well as in phase [ ]. Every type f PLL (lineal PLL (LPLL), digital PLL, etc.), can be implemented by sftware (SPLL) [3].The design f a SPLL (Sftware-PLL) is similar t analg PLL, The advantage f such a sftware implemented is that the lp culd be easily mdified t incrprate signal prcessing cmpnents t imprve the perfrmances f the PLL [4].The blck diagram f SPLL is given in Fig., the first blck is Analg Digital Cnverter (ADC), the phase detectr is a multiplier (MUL), a prprtinal Integral cntrller (PI) is the lp filter, and in the last blck a Digital Cntrller Oscillatr (DCO) is lcated in the last blck [5]. Fig. Blck diagram f SPLL The gal f this wrk is t analyze the perfrmance in phase tracking f a sftware-based lineal PLL (SLPLL) secnd-degree, when a reference electrical signal has nrmal and abnrmal cnditins. The SLPLL is tuned t wrk with the Mexican Electrical System (MES) 6 Hz f peratin frequency. The rganizatin f the paper is as fllw: in the next sectin the PLL cmpnents are studied, the secnd-rder PLL structure is discussed in the subsequent stage, in the last three sectins; filter design and simulatin, secnd-rder PLL simulatin and results are presented. II. PLL COMPONENTS A phase-lcked lp is a feedback system cmbining a vltage cntrlled scillatr (VCO) and a phase cmparatr s cnnected that the scillatr maintains a cnstant phase angle relative t a reference signal [6]. Fig. shws the basic mdel fr a PLL. The basic blcks f the PLL are the Errr Detectr (cmpsed f a phase frequency detectr), Lp Pass Filter (LPF), and VCO. Fig. Lineal basic mdel f the phase-lcked lp [ ] A. Phase Detectr (PD) A phase detectr is a device capable f generating a signal which is prprtinal t the phase difference between tw signals, a multiplier is used usually [7]. B. Lp Filter The next stage after the phase detectr is the lp filter. The lp filter aim is t d stable the PLL, filtering the unwanted high frequencies. The PLL acts as a lw pass, eliminating nise and spurius signals input and as a high pass t VCO nise [8]. C. Vltage cntrlled scillatr (VCO) The VCO perates at a set frequency. If the frequency f the reference signal is near t the VCO frequency, the PLL feedback causes the VCO is engaged with the input signal. The VCO input is a vltage and the utput is a frequency. [9]. 998

3 Phase (deg) Magnitude (db) III. SECOND-ORDER PLL DESCRIPTION The secnd-rder PLL system cntains a first-rder filter and a vltage cntrlled scillatr (VCO) []. The transfer functin f an analg lp filter () and a VCO () are []: Where F(s) and N(s) are the transfer functins f the filter and VCO. K is the VCO gain. The transfer f a linearized analg PLL is [] (3). (3) is the PD gain. Substituting Equatins () and () in (3) yields (4) Where the natural frequency, and the damping rati []. The damping rati cntrls hw fast the filter reaches its settle pint, als cntrls hw much versht the filter can have. The damping is chsen t ζ =.7 resulting in a filter that cnverges reasnably fast [[]. The transfer functin (4) is analg versin and t cnvert the transfrm functin t digital frm; fr future implementatin in a DSP, the bilinear z transfrmatin is used; this yields the fllwing digital transfer functins fr the PLL mdel (5). () () (4) () A. Matlab Filter simulatin Matlab is used as a tl fr simulating the PI filter algrithm. The chice f Matlab as prgramming and simulatin envirnment was fr the simplicity f use and the ability t integrate systems. The technical specificatins fr the simulatin f the algrithm are: Reference signal sinusidal frequency 6 Hz. and amplitude V. Sampling frequency 8 Hz. DCO center frequency 6 Hz ( rad/s). PLL lck range 59.5 Hz t 6.5 Hz. perating frequencies required by the Cmisión Federal de Electricidad (CFE) parastatal that manages the supply f electricity in Méxic. The simulated filter is analg type with amplificatin near t 6 Hz frequency t imprve the perfrmance f clsed lp and the PLL lck range. The filter cefficients are calculated accrding t (8), (9), () and (), and substituted in (7), btaining the fllwing values: a =, a = -.96, b = -.869, b =.356. The filter respnse is shwn in Fig. 3. The figure shws attenuatin in the frequency clse t 6 Hz ( rad/s). (5 ) In-lck state, the utput f the phase detectr can be apprximated as (6) -4-6 Bde Diagram System: sys Frequency (rad/s): 367 Magnitude (db): -3.6 (6) -8 - IV. FILTER DESIGN AND SIMULATION An active filter PI ffers a gd perfrmance f a SPLL [], it is assumed that () is the transfer functin f an active filter PI in digital frm, btained thrugh bilinear transfrmatin (7). The filter cefficients are given by (8), (9), () and (): (8) (9) (7) Frequency (rad/s) Fig. 3 Filter respnse () 999

4 Amplitude(V) Amplitude(V) V. SECOND-ORDER PLL SIMULATION The algrithm in Fig. 4, describes the SPLL prcess, begins with the initializatin f the relevant variables, nce the variables are initialized the algrithm enters an infinite lp and the instructins are executed repeatedly until the system is paused r turned ff. Walsh functin is implemented in subsequent lines and the values f all variables are updated, the next step is set back all the variables values (r displace in time) [7]..5 Reference signal t(s) Fig. 6 Reference signal Fig. 4 Algrithm based n a PLL used fr tuning radi frequency [] Fragment f prgram cde [3] develped by Matlab shwn in Fig Time(s) Fig. 7. Reference signal (sinusidal wave) and sync pulse (square wave) Fig. 5 Fragment f SPLL prgram cde In rder t test the perfrmance f the algrithm SPLL, a number f changes t the reference signal, similar t the characteristic disturbances f the mains are made. A. System respnse with an ideally stable input The electrical single phase signal shuld have a 6 Hz scillatin frequency, as shwn in Fig. 6. This simulated signal is a reference fr the SPLL t prduce a square signal (sync pulse) with the same phase characteristics, sync pulse and the reference signal in Fig. 7 is shwn, nting that they are in perfect synchrny. B. Disturbances in the reference signal The transient stability f a pwer system can be defined as the system's ability t stay in sync when it experiences the ccurrence f a severe disturbance [4] the aim f the researches n the transient stability is t determine the dynamic respnse f the system, during and after the ccurrence f a great disturbance [5]. The disturbances such as shrt circuits, sudden lss f large amunts f electrical lads, wn generatin lss, lss f intercnnectin with the distributin netwrk, netwrk failures nearby pwer transmissin intercnnectin pint, are classified accrding t their magnitude in [5]: Small-scale disturbances: They are caused by nrmal variatins in the system lad and lss f small generatrs. Large-scale r severe disturbances: lss f large generatrs and shrt circuits in the transmissin line.

5 Amplitude (V) amplitude Amplitude (V) amplitude Amplitude VI. RESULTS In this sectin SPLL perfrmance is shwn with different reference signals mdified accrding the main MES disturbances. A. 8 phase change A phase change f 8 is applied in the reference signal in Fig Hz 4 Harmnic Reference input signal t(ms).5 Fig. Harmnics in the reference signal Time (s).5 Fig. 8 Reference signal 6 Hz frequency, 8 phase. Fig. shws the reference signal and the synchrnized pulse achieved even when the reference signal has a phase shift t(s) Fig. System Respnse (green wave) t a reference signal with 3rd, 5th and 7th harmnic (blue wave) C. Electrmagnetic transients It is called transient t the event which is undesirable and mmentary. [7]. Impulse transient. It is a sudden change in the steady state cnditin f vltage and / r current is unidirectinal with psitive r negative plarity. In Fig. the respnse f the PLL t a reference signal with abnrmal cnditins is bserved Time (s) Fig. 9 Pulse in sync with a phase 8 shift reference signal B. Harmnic analysis Harmnics are currents and / r vltages present n an electrical system, are signals with a multiple frequency f the fundamental frequency [6]. MES has an perating frequency f 6 Hz and single phase lads that generate harmnic: the third harmnic perating at 8 Hz, 3 Hz fifth and seventh 4 Hz. The reference signal; which is shwn in Fig., cntains the type f harmnic described in the previus paragraph; this signal is used t check the secnd-rder PLL level tracking the generated sync signal and the reference signal are reprted in Fig.. Fig. PLL respnses t a transient impulse.

6 VII. CONCLUSION In this paper a simulatin f a secnd-rder SPLL has been presented with the aim f analyzing the perfrmance in tracking phase f a disturbance reference signal. The results demnstrate that the pulse generated by the PLL is able t track in phase with the reference signal. The technical characteristics f the reference signal were mdified, in rder t test the phase mnitring, btaining a fast and efficient respnse allwing synchrny between the tw signals. Cmmn electrical disturbances grid was used t generate changes in the reference signal and test the secnd-rder PLL lck ability. The evidence shws that the prpsed system is able t prduce a sync signal in phase with the reference signal. REFERENCES [] Rlim, l. G. B., Csta jr, d. R., & Aredes, m. (3). Analysis and sftware implementatin f a rbust synchrnizing PLL circuit. In IEEE Internatinal Sympsium n Industrial Electrnics (ISIE).J. Clerk Maxwell, A Treatise n Electricity and Magnetism, 3rd ed., vl.. Oxfrd: Clarendn, 89, pp [ ] Hsieh, G. C., & Hung, J. C. (996). Phase-lcked lp techniques. A survey. Industrial Electrnics, IEEE Transactins n, 43(6), [3] Lpez, J., Sandval, F., & Santana, J. Implementación de un PLL Digital cn Dispsitivs prgramables en VHDL. Ele, 4,. [4] Sithamparanathan, K. (6). A sftware phase lcked lp frm thery t practice: TMS3C6 DSP based implementatin and analysis. In AusWireless cnference 6 (pp. -6). University f Technlgy, Sydney. [5] Rueda Clementina, Arry Humbert, Rivas Iván. Implementatin f an embedded phase and frequency tuner, as reference fr real-time energy exchange with the grid. Sixth Internatinal in Sympsiym n Energy & Technlgy Innvatin Frum, Puert Ric, 4. [6] VCO, E. D. L. F., & Divider, F. Fundamentals f Phase Lcked Lps (PLLs). [7] Bibyk, S. (998). A Digital Frequency Synthesizer Using Phase Lcked Lp Technique (Dctral dissertatin, The Ohi State University). [8] L.A. Bulus, J. M. Juárez, H.E. Lrente Sintetizadr de frecuencia PLL cntrlad pr DDS, en XII Reunión de trabaj de Prcesamient de la infrmación y cntrl, Rí Gallegs, Argentina, 7 [9] Tmasi, W. (3). Sistemas de cmunicacines electrónicas. Pearsn educación. [] Brre, K., Aks, D. M., Bertelsen, N., Rinder, P., & Jensen, S. H. (7). A sftware-defined GPS and Galile receiver: a singlefrequency apprach. Springer Science & Business Media. [] Chung, B.-Y., Chien, C., Samueli, H. & Jain, R. (993). Perfrmance analysis f an all-digital BPSK direct-sequence spread-spectrum IF receiver architecture. IEEE Jurnal n Selected Areas in Cmmunicatins, (7):96 7. [] E.Best, R. (7). Phase-Lcked Lps, design, simulatin, and applicatins. In R. E.Best, Phase-Lcked Lps, design, simulatin, and applicatins (pp. 6-7). Zurich: McGraw-Hill Prfessinal; 6 editin [3] Ummethala, Upendra., Mellr Mike. Sftware Linear PLL MATLAB design and simulatin prgram [4] Kundur P. Pwer System Stability and Cntrl. Mc Graw Hill [5] Caldern-Guizar, J.G.. Estudis de estabilidad transitria en sistemas eléctrics industriales cn generación prpia intercnectads cn el sistema de transmisión. Ing. invest. y tecnl. [nline]., vl., n.4, pp ISSN [6] Tejada, A., & Llamas, A. (). Efects de las armónicas en ls sistemas eléctrics. Recuperad:(7 de nviembre del ) mty.itesm.mx/decic/depts/ie/prfesres/allamas/curss/ueee/armnica s/7e fectarm. PDF. [7] Sarmient Jadán, F., & Sánchez Calle, V. (9). Análisis de la calidad de la energía eléctrica y estudi de carga de la Universidad Plitécnica Salesiana Sede Cuenca (Dctral dissertatin).

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