5.0V 5.0V. 20µs PULSE WIDTH Tj = 25 C. Tj = 150 C. V DS, Drain-to-Source Voltage (V) T J = 150 C 1.5. V GS, Gate-to-Source Voltage (V)

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1 9MT050XF "FULL-BRIDGE" FREDFET MTP HEXFET Power MOSFET Features Low On-Resistance High Performance Optimised Built-in Fast Recovery Diodes Fully Characterized Capacitance and Avalanche Voltage and Current Aluminum Nitride DBC Very Low Stray Inductance Design for High Speed Operation 3 A V DSS = 500V Benefits Low Gate Charge Qg results in Simple Drive Requirement Improved Gate, Avalanche and Dynamic dv/dt Ruggedness Low Trr and Soft Diode Reverse Recovery Optimized for Welding, UPS and SMPS Applications Outstanding ZVS and High Frequency Operation Direct Mounting to Heatsink PCB Solderable Terminals Very Low Junction-to-Case Thermal Resistance UL Approved E78996 MMTP Absolute Maximum Ratings Parameters Max Units I D Continuos Drain V GS = T C = 25 C 3 T C = 00 C 9 I DM Pulsed Drain Current () 24 P D Maximum Power T C = 25 C 40 T C = 00 C 456 V GS Gate-to-Source Voltage ± 30 V V ISOL RMS Isolation Voltage, Any Terminal to Case, t = min 2500 dv/dt Peak Diode Recovery dv/dt (3) 5 V/ ns www irf com

2 9MT050XF Electrical T J = 25 C (unless otherwise specified) Parameters Min Typ Max Units Test Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 500 V V GS = 0V, I D = 250µA V (BR)DSS / Temperature Coeff of 0 48 V/ C I D = 4mA, reference to T J = 25 C T J Breakdown Voltage R DS(ON) Static Drain-to-Source On-Resistance Ω V GS = 0V, I D = 9A (4) V GS = 0V, I D = 3A V GS(th) Gate Threshold Voltage V V DS = V GS, I D = 250µA I DSS Drain-to-Source Leakage Current (6) 50 µa V DS = 500V, V GS = 0V 2 ma V DS = 400V, V GS = 0V, T J = 25 C I GSS Gate-to-Source Forward Leakage 50 na V GS = 30V Gate-to-Source Reverse Leakage - 50 V GS = - 30V Dynamic T J = 25 C (unless otherwise specified) Parameters Min Typ Max Units Test Conditions gfs Forward Transconductance 26 S V DS = 50V, I D = 9A Q g Total Gate Charge nc ID = 3A Qgs Gate-to-Source Charge V DS = 400V Q gd Gate-to-Drain ("Miller") Charge VGS = 0V (4) t d(on) Turn-on Delay Time ns ID = 3A t d(off) Turn-off Delay Time VDS = 250V tr Rise Time V GS = 0V t f Fall Time 76 5 RG = 4 3Ω C iss Input Capacitance pf V GS = 0V C oss Output Capacitance V DS = 25V C rss Reverse Transfer Capacitance f = 0 MHz Diode T J = 25 C (unless otherwise specified) Parameters Min Typ Max Units Test Conditions IS Continuous Source Current 3 A MOSFET symbol D (Body Diode) showing the ISM Pulsed Source Current 24 integral reverse G (Body Diode) () p-n junction diode S V SD Diode Forward Voltage 0 V T J = 25 C, I S = 3A, V GS = 0V (4) t rr Reverse Recovery Time ns T J = 25 C, I F = 3A Q rr Reverse Recovery Charge nc di/dt = 00A/µs (4) 2 www irf com

3 9MT050XF Avalanche Characteristics Parameters Min Typ Max Units E AS Single Pulse Avalanche Energy (2) 493 mj I AR Avalanche Current () 3 A E AR Repetitive Avalanche Energy () 4 mj Thermal- Mechanical Specifications Parameters Min Typ Max Units T J Operating Junction Temperature Range C T STG Storage Temperature Range R thjc Junction-to-Case (per MOSFET) 0 44 C/ W R thcs Case-to-Sink 0 06 (Heatsink Compound Thermal Conductivity = W/mK) Clearance (5) (external shortest distance in air 5 5 mm between two terminals) Creepage (5) (shortest distance along external 8 surface of the insulating material between 2 terminals) Weight 66 g Notes: () Repetitive rating; pulse width limited by max junction temperature (2) Starting T J = 25 C, L = 0mH, R G = 25Ω I AS = 3A (3) I SD 3A, di/dt 340 A/µs, V DD V (BR)DSS, T J 50 C (4) Pulse width 400µs; duty cycle 2% (5) Standard version only i e without optional thermistor (6) I CES includes also opposite leg overall leakage www irf com 3

4 I D, Drain-to-Source Current ( A) R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) 9MT050XF VGS TOP 5V 0V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 00 0 VGS TOP 5V 0V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V V 20µs PULSE WIDTH Tj = 25 C V DS, Drain-to-Source Voltage (V) V 20µs PULSE WIDTH Tj = 50 C V DS, Drain-to-Source Voltage (V) Fig Typical Output Characteristics Fig 2 Typical Output Characteristics I D = 3A V GS = 0V T J = 50 C.5 T J = 25 C V DS = 50V 20µs PULSE WIDTH V GS, Gate-to-Source Voltage (V) T J, Junction Temperature ( C) Fig 3 Typical Transfer Characteristics Fig 4 Normalized On-Resistance Vs Temperature 4 www irf com

5 C, Capacitance (pf) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) V GS, Gate-to-Source Voltage (V) 9MT050XF V GS = 0V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd Ciss 6 2 I D = 3A V DS = 400V VDS= 250V VDS= 00V 000 Coss Crss V DS, Drain-to-Source Voltage (V) 0 FOR TEST CIRCUIT SEE FIGURE Q G Total Gate Charge (nc) Fig 5 Typical Capacitance Vs Drain-to-Source Voltage Fig 6 Typical Gate Charge Vs Gate-to-Source Voltage OPERATION IN THIS AREA LIMITED BY R DS (on) T J = 50 C µsec.0 T J = 25 C V GS = 0V V SD, Source-toDrain Voltage (V) 0. Tc = 25 C Tj = 50 C Single Pulse msec 0msec V DS, Drain-toSource Voltage (V) Fig 7 Typical Source-Drain Diode Forward Voltage Fig 8 Maximum Safe Operating Area www irf com 5

6 9MT050XF V DS R D I D, Drain Current (A) R G V GS 0V Pulse Width µs Duty Factor 0. % D U T Fig 0a Switching Time Test Circuit - V DD 4 V DS 90% T C, Case Temperature 0% V GS t d(on) t r t d(off) t f Fig 9 Maximum Drain Current Vs Case Temperature Fig 0b Switching Time Waveforms Thermal Response Z thjc ( C/W) Thermal Response ( Z thjc D = SINGLE PULSE ( THERMAL RESPONSE ) E-006 E t, Rectangular Pulse Duration (sec) R R R R 2 R 2 3 R 3 τ J τ J τ τ τ 2 τ 3 τ 2 τ 3 Ci= τi/ri Ci= i/ri τ C τ Ri ( C/W) τi (sec) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc Tc Fig Maximum Effective Transient Thermal Impedance, Junction-to-Case 6 www irf com

7 E AS, Single Pulse Avalanche Energy (mj) 9MT050XF I D TOP 4A 9A BOTTOM 3A 5V 600 V DS L DRIVER R G 20V tp D.U.T I AS 0.0Ω - V DD A Starting T J, Junction Temperature ( C) Fig 2b Unclamped Inductive Test Circuit and vs Junction Temperature tp V (BR)DSS Fig 2a Maximum Avalanche Energy Vs Drain Current I AS Fig 2c Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 2V.2µF 50KΩ.3µF D.U.T. V - DS V GS Q GS Q G Q GD V GS 3mA V G I G I D Current Sampling Resistors Charge Fig 3a Gate Charge Test Circuit Fig 3b Basic Gate Charge Waveform www irf com 7

8 9MT050XF Peak Diode Recovery dv/dt Test Circuit D U T ƒ Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer R G dv/dt controlled by R G Driver same type as D U T I SD controlled by Duty Factor "D" D U T - Device Under Test - VDD Driver Gate Drive Period P.W. D = P.W. Period V GS =0V * D.U.T. I SD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt V DD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 4 For N-Channel HEXFET Power MOSFETs 8 www irf com

9 9MT050XF Outline Table Dimensions in millimeters www irf com 9

10 9MT050XF Ordering Information Table Device Code 9 MT 050 X F Current rating (9 = 9A) 2 - Essential Part Number 3 - Voltage code (050 = 500V) 4 - Speed/ Type (X = HexFet) 5 - Circuit Configuration (F = Full Bridge) Data and specifications subject to change without notice This product has been designed and qualified for Industrial Level Qualification Standards can be found on IR's Web site IR WORLD HEADQUARTERS: 233 Kansas St, El Segundo, California 90245, USA Tel: (30) TAC Fax: (30) Visit us at www irf com for sales contact information 09/02 0 www irf com

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