Quantitative Study of High Dynamic Range Image Sensor Architectures

Transcription

1 Quaniaie Sudy of High Dynamic Range Image Sensor Archiecures Sam Kausi and Abbas El Gamal Deparmen of Elecrical Engineering, Sanford Uniersiy, Sanford, CA ABSTRACT Analysis of dynamic-range (DR) and signal-o-noise-raio (SNR) for high fideliy, high-dynamic-range (HDR) image sensor archiecures is presened Four archiecures are considered: (i) ime-o-sauraion, (ii) muliplecapure, (iii) asynchronous self-rese wih muliple capure, and (i) synchronous self-rese wih residue readou The analysis akes ino accoun circui nonidealiies such as quanizaion noise and he effecs of limied pixel area on building block and reference signal performance and accuracy Examples ha demonsrae he behaior of SNR in he exended DR and implemenaion and power consumpion issues for each scheme are presened Keywords: imagers, CMOS image sensors, high dynamic range, analog fron end, ADC 1 INTRODUCTION Seeral mehods for exending image sensor dynamic range hae been deeloped in recen years 1 14 In [15], a mehodology for comparing such schemes based on heir SNR is proposed The paper uses idealized noise and circui models o compare well-capaciy adjusing o muliple-capure Similar analysis for logarihmic, local-adapaion, spaially arying exposure and ime-o-sauraion mehods was laer presened 16 The work in his paper is moiaed by he aden of sub-micron CMOS image sensor processes 17 and he 18, 19 promise of 3D inegraion, where muliple wafers can be sacked and conneced using hrough ias Wih hese capabiliies, more ransisors can be inegraed in each pixel, enabling he implemenaion of seeral high fideliy, HDR schemes We inesigae four such schemes, namely ime-o-sauraion, 7 9 muliple-capure, 1 3 synchronous self-rese wih residue readou 13, 14 and asynchronous self-rese wih muliple capure 4 As in [16], we compare hese schemes based on heir SNR To proide meaningful resuls, gien he complexiy of he circuis inoled, our analysis accouns for circui nonidealiies such as quanizaion noise and he effecs of limied pixel area on building block and reference signal performance and accuracy In addiion o proiding analyical formulas and examples of SNR as a funcion of phoocurren, we briefly discuss he main implemenaion and power consumpion issues for each scheme Our analysis and examples show he following: (i) For ime-o-sauraion, 7 9 SNR a he high end degrades by limied signal accuracy (ii) For muliple-capure, 1 3 SNR does no degrade wih dynamic range increase as preiously discussed in [15] Howeer, SNR is limied by he resoluion of he per-pixel ADC, which is seerely consrained by pixel area and power consumpion 13, 14 (iii) For synchronous self-rese wih residue readou, DR degradaion in SNR increases a he high end, bu a he expense of (i) For asynchronous self-rese wih muliple capure, 4 SNR increases beyond he well capaciy limi Howeer, he increase is limied by gain fixed-paern-noise (FPN) and DSP complexiy The res of he paper is organized as follows In he nex secion we inroduce he sensor model and definiions of dynamic range and SNR for conenional image sensors and inroduce a concepual model for he HDR archiecures In Secions 3-6 we discuss he four high dynamic range schemes and proide he SNR analysis Correspondence: skausi@sanfordedu, abbas@islsanfordedu; Telephone: ; Fax: Sensors and Camera Sysems for Scienific, Indusrial, and Digial Phoography Applicaions V, edied by Morley M Blouke, Niin Sampa, Ricardo J Moa, Proc of SPIE-IS&T Elecronic Imaging, SPIE Vol SPIE and IS&T X/04/$15

2 2 BACKGROUND AND HDR SENSOR MODEL An image sensor can be iewed as an array of phoodeecors followed by circuis for readou The performance of a sensor is a funcion of boh he phoodeecor used and is readou circuis HDR image sensor schemes modify a conenional sensor s readou circuis o improe is DR Since in his paper we are mainly concerned wih comparing he performance of HDR schemes, we focus on analyzing heir readou circuis assuming ha hey all use he same high qualiy phoodeecor We firs briefly reiew he definiions of SNR and dynamic range for a conenional image sensor such as a CCD or a CMOS APS We hen inroduce a model for sensor readou archiecures ha we use o unify he analysis of he arious HDR schemes Background: Each phoodiode in a conenional image sensor coners inciden ligho phoocurren Since his process is linear, is a good measure of inciden lighensiy The resuling phoocurren is ypically oo small o measure direcly, and hus i is inegraed ino charge Afer inegraion ime,he charge is conered linearly o a olage and he olage is digiized and read ou Dark curren and addiie noise corrup he oupu signal charge Ignoring dark curren, noise can be expressed as he sum of four independen componens: (i) inegraed sho noise, which has zero mean and aerage power /q elecron 2, where q is he elecron charge, (ii) rese (ktc) noise, (iii) readou circui noise (including quanizaion noise) wih zero mean and aerage power σreadou 2, and (i) offse and gain FPN due o phoodeecor and deice mismaches The oupu charge from a pixel can hus be expressed as Q( )= 1 q ( + Q Sho + Q Rese + Q Readou + Q FPN ) elecron, proided Q( ) Q max, he sauraion charge, also referred o as well capaciy Assuming ha correlaed-double-sampling (CDS) is performed, we can eliminae Q Rese and he offse par of Q FPN If we also assume ha gain FPN is negligible compared o sho noise, SNR is gien by ( ) 2 SNR( )= q + q 2 σreadou 2, for qq max Noe ha SNR increases wih, firs a 20dB per decade when readou noise ariance dominaes, and hen a 10dB per decade when sho noise ariance dominaes SNR also increases wih Thus i is always preferred o hae he longes possible exposure ime Sauraion and change in phoocurren due o moion, howeer, makes i impracical o make inegraion ime oo long Image sensor DR is defined as he raio of he larges nonsauraing phoocurren o he smalles deecable phoocurren, ypically defined as he sandard deiaion of he noise under dark condiions Assuming he aboe sensor model, i max = qq sa / and i min = qσ Readou / and dynamic range is gien by DR = i max = Q max i min σ Readou Exending dynamic range a he high end requires increasing i max The echniques we discuss exend DR a he high end in one of he following wo ways: Varying inegraion ime: The inegraion ime is adaped o pixel phoocurren proiding long inegraion imes for pixels wih small phoocurrens and shoregraion imes for pixels wih high phoocurrens Examples of such echniques are: well-capaciy adjusing, 10 ime-o-sauraion, 7, 8 and muliple-capure 1 3 Recycling he well: Here i max is increased by self-reseing 4, 13, 14 or charge subracion 12, 20 o increase he effecie well capaciy as will be discussed in Secions 5,6 In heory, such well recycling increases peak SNR As we show, howeer, he improemen in peak SNR is limied by seeral circui nonidealiies and can rapidly drop as DR is increased SPIE-IS&T/Vol

3 Exending DR a he low end requires reducing i min, which can be achieed by eiher reducing σ Readou or increasing Excep when using muliple-capure, where his can be done by a combinaion of image blur preenion and weighed aeraging of he samples, 21 oher HDR schemes only exend DR a he high end Readou Archiecure Model: To unify he analysis of he high dynamic range schemes, we use he concepual sensor readou archiecure shown in Figure 1 I comprises a curren modulaor ha coners ino a waeform s() and possibly a discree (in ime and alue) sequence The waeform s() is hen digiized by an ADC a one or more ime insances and he oupu is filered o produce an esimae of The modulaor is ypically implemened per pixel, while he ADC and filer are implemened per group of neighboring pixels, 1 per column, 22 per chip, or off-chip Since he oerall sysem aemps o reproduce he signal, i has uniy gain Thus we can refer he noise o he oupu when compuing he sysem SNR Modulaor s() Sample & ADC Digial Samples Filer Binary Sequence Figure 1 General Block Diagram For a conenional image sensor, he modulaor is simply an inegraor ha sauraes when he inegraed charge exceeds he well capaciy Q max Alhough in our model he inegraion is reaed as separae from he phoodeecor, in pracice i is ypically performed using he phoodiode capaciance The oupu of he modulaor is sampled a = 0 (for CDS) and = The ADC/filer perform he subracion for CDS, scaling, and digiizaion Reference Sensor: For comparison purposes, we will use an opimized conenional sensor, which we refer o as a reference sensor We denoe is aerage readou noise power as σreadou Ref 2, is minimum nonsauraing curren as i min Ref, and is DR as he reference DR We assume ha σreadou Ref 2 is no limied by quanizaion noise and ha analog readou circui noise is minimized, and herefore σreadou Ref 2 and i min Ref are a heir pracical minimums (for a gien ) We also assume ha gain FPN can be ignored wihin he reference DR For HDR schemes employing column based or chip based ADCs, we assume ha quanizaion noise can be made as small as needed and herefore σreadou 2 is limied by heir analog readou circui noise For schemes ha use per-pixel ADC, quanizaion noise canno be ignored due o he pixel area and power consrains and can be he dominan componen of he readou noise For all schemes we assume ha σreadou 2 is no he dominan source of noise a he high end of he phoocurren 3 TIME-TO-SATURATION The ime-o-sauraion scheme 8 aemps o achiee high dynamic range wih high SNR by conering each phoocurren ino is ime-o-sauraion sa ( )=qq max / A block diagram of he scheme and plo of he inegraor oupu as a funcion of ime are gien in Figure 2 Afer he phoodiode and he ime reference capacior C T Ref are rese, he oupu of he inegraor is read ou for CDS Phoocurren is hen inegraed and conered o olage, which is compared o a reference Concurrenly, C T Ref follows he ime-ramp When he inegraor oupu reaches, he comparaor flips and sa ( ) is sored on C T Ref A he end of inegraion, ( )and sa are read ou If sa <, he signal is esimaed as qq max / sa, oherwise he signal is esimaed using ( ) only More deails concerning implemenaion and correcion for seeral nonidealiies can be found in 7, 8 Noe ha he minimum deecable signal is gien by i min = qσ Readou /, which has he same form as ha of he conenional sensor The maximum nonsauraing signal depends on he comparaor delay and offse as well as he noise associaed wih sa ( ) due o ime-ramp noise, ktc of C T Ref, and he readou noise Le σ sa be The implemenaion in 8 acually uses wo ime-ramps and wo capaciors o reduce σ sa We accoun for his indirecly by using small σ sa in he examples 266 SPIE-IS&T/Vol 5301

4 Time-ramp () ADC Filer sa C T-Ref Modulaor (a) V 1 1 Low Ligh: ( ) = V 1, sa = Medium Ligh: ( ) =, sa = High Ligh: ( ) =, sa = 1 (b) Figure 2 Time-o-sauraion scheme he oal rms of he noise added o sa ( ), hen he maximum deecable signal is gien by i max = qq max /σ sa Therefore, he maximum achieable dynamic range for a gien is gien by DR = Q max σ Readou σ sa To ealuae he fideliy of he scheme, noe ha he oal oupu noise power is gien by σi 2 = q + q2 σ 2 Readou 2 in q sa( ) + q2 σ 2 Readou sa( ) + (qqmax)2 σ 2 2 sa sa( ) 4 if qqmax if > qqmax The SNR is hus gien by SNR( )= ( ) 2 q +q 2 σ 2 Readou (qq max) 2 q 2 Q max+( σ sa) 2 +q 2 σ 2 Readou if qqmax if > qqmax Figure 3 plos SNR ersus Noe ha SNR is idenical o ha of he reference sensor wihin he reference DR For larger, SNR drops monoonically as 1/i 2 ph (-20dB per decade) due o he effec of σ sa Thus,DRis increased bu a he expense of reducion in SNR Remarks: (i) Noe ha since in his scheme ADC is performed a he column or chip leel, we can assume ha σreadou 2 = σreadou Ref 2 Therefore, SNR a he low end and i min are he same as ha of reference sensor (ii) The main parameer affecing DR and SNR a he high end is σ sa Reducing σ sa requires reducing comparaor offse, comparaor delay, ime-ramp accuracy, and/or ktc of C T Ref Comparaor offse can be reduced using offse cancellaion echniques 23 This reducion, howeer, is limied by he size of he cancellaion capacior, which canno be made oo large due o he pixel area limiaion Reducing SPIE-IS&T/Vol

5 60 55 Reference Example 1 Example SNR (db) (A) Figure 3 SNR ersus for ime-o-sauraion; assuming Q sa =125, 000e, σ Readou =5e, =30msec Example 1 assumes σ sa =00005 and achiees DR= 156dB Example 2 assumes σ sa =0004 and achiees DR= 136dB comparaor delay is seerely limied by comparaor power consumpion Reducing ktc noise of C T Ref is also difficul o accomplish due o pixel area limiaion Improing ime-ramp accuracy is limied by signal inegriy issues due o he high densiy of he pixel array and he limied number of aailable inerconnec layers (iii) The modulaor in his scheme is fairly complex, comprising an inegraor, a 1-bi comparaor and a capacior, all of which mus fi wihin he pixel Improing he performance of hese componens requires increasing pixel area 24 The accuracy of he analog references, and ime-ramp, which are criical o he scheme s performance are also limied by he high circui densiy and limied pixel area (i) The dominan source of power consumpion in his scheme is he comparaor, which is always on Since peak SNR is a srong funcion of comparaor delay and offse, reducing comparaor power consumpion, eg, by clocking he comparaor, 7 would seerely reduce SNR 4 MULTIPLE-CAPTURE The muliple-capure scheme 1 3 increases dynamic range by sampling he signal nondesruciely muliple imes during inegraion The HDR image can be consruced using he las-sample-before-sauraion algorihm 3 as illusraed in Figure 4 Noe ha wih his algorihm DR is only increased a he high end DR a he low end can be increased by a combinaion of image blur preenion and weighed aeraging, 21 which requires significan on-chip memory and DSP capabiliy To define DR and SNR, we assume uniform sampling ime cap and ha he filer only performs las-sample-before-sauraion and digial CDS The maximum nonsauraing signal is gien by i max = qq max / cap and he minimum deecable signal is gien by i min = qσ Readou / Thus DR = Q max σ Readou cap To define SNR, le φ( )= las sample ( )/( sa ( )), where sa ( )=qq max / Then ( φ( ) sa ( )) 2 SNR( )= q φ( ) sa ( )+q 2 σreadou 2 = Q 2 max Q max /φ( )+σ 2 Readou /φ2 ( ) For large where sho noise dominaes, SNR φ( )Q max Noe ha when sa ( ) < sa ( ) las sample ( )= cap, cap 268 SPIE-IS&T/Vol 5301

6 () ADC Filer Capure Clock (a) V 2 V 1 n cap n cap j cap n cap Low Ligh: = V 1, las-sample = = n cap Medium Ligh: = V 2, las-sample = = n cap High Ligh: =, las-sample = j cap (b) Figure 4 Muliple Capure Block scheme and herefore (1 cap / sa ( )) Q max < SNR( ) <Q max For sa ( ), he SNR follows ha of a conenional sensor Figure 5 plos SNR ersus Noe ha unlike ime-o-sauraion, SNR does no degrade in he exended range, since las sample has he same accuracy as he muliple capure clock Howeer, DR suffers a he low end due o he large quanizaion noise of he per pixel ADC Reference Example 1 Example SNR (db) (A) Figure 5 SNR ersus for muliple-capure,assuming Q sa =125, 000e, =30msec Example 1 assumes 10 bi ADC, σ Readou = 35e, cap = 150µsec and achiees DR= 117dB Example 2 assumes 9 bi ADC, σ Readou = 70e, cap = 100µsec and achiees DR= 114dB The parameers cap and σ Readou assume comparison ime of 100ns and readou ime per row per bi of 10nsec and pixel array Remarks: (i) Noe ha because he general implemenaion of he muliple-capure scheme requires per-pixel ADC, 3 he quanizaion noise componen of σ Readou canno be ignored As discussed, his resuls in DR decrease a he low end relaie o he reference sensor DR can be exended a he low end as discussed in 21 SPIE-IS&T/Vol

7 using a combinaion of weighed aeraging of each pixel s samples o reduce σ Readou and by deecing and preening image blur o increase (ii) DR a he high end is direcly relaed o cap Increasing i max requires decreasing cap Such decrease can be accomplished by reducing he array readou ime and/or he pixel-leel ADC ime For large arrays, readou ime is he dominan componen of cap and is difficul o reduce For a gien pixel area and power consumpion budge, he ADC ime can only be decreased by reducing resoluion, which resuls in SNR reducion a he low end (iii) The modulaor in he muliple-capure scheme is simply an inegraor The ADC is implemened per pixel or per group of neighboring pixels using a 1-bi comparaor and digial buffer 2, 3 The ADC requires a global analog reference signal Similar o he ime-o-sauraion scheme, he accuracy of he comparaor and reference signal are limied by he high array densiy Noe ha las sample is ery accurae because of he negligible capure clock jier Digial CDS can be used o reduce pixel offses and ktc noise (i) The dominan sources of power consumpion in he muliple-capure scheme are he digial readou and DSP The pixel leel ADC power is ypically quie small due o is low operaing speed Readou power can be reduced wihou grealy affecing SNR by using fewer nonuniform capure imes 25 5 ASYNCHRONOUS SELF-RESET WITH MULTIPLE CAPTURE Schemes using self rese aemp o increase DR and SNR a he high end by increasing he effecie well-capaciy This can hae he addiional benefi of increasing peak SNR beyond well-capaciy In his secion we inesigae he asynchronous self-rese wih muliple capure inroduced in [4] The scheme is described in Figure 6 Afer global rese, phoocurren is inegraed and conered ino olage () When () exceeds, he comparaor flips reseing he inegraor asynchronously The olage () is sampled a regular ime inerals cap and he digiized samples are used o esimae he phoocurren To find dynamic range, noe ha i min has he same Rese () ADC Filer Modulaor (a) cap sa Low Ligh High Ligh (b) Figure 6 Asynchronous self-rese wih muliple capure scheme form as ha of a conenional sensor The maximum nonsauraing curren is gien by i max = qq max / cap Thus DR = Q max σ Readou cap 270 SPIE-IS&T/Vol 5301

8 In order o calculae SNR, noe ha he esimaion can be iewed as charge inegraion oer he effecie inegraion ime ( eff = n rese cap = 1 ) cap, for sa ( ) > cap sa ( ) Thus, ( eff ) 2 SNR( )= q eff + q 2 σreadou 2 + σ2 H ( eff ) 2 The σh 2 erm represens gain FPN due o he phoodeecor and inegraor nonuniformiy, which canno be ignored in his scheme due o he ery high in he exended range Figure 7 plos SNR ersus Noe ha SNR increases in he exended DR beyond Q max as (10dB per decade) before i sauraes due o gain FPN and ulimaely signal sauraion 70 Reference Example 1 Example SNR (db) i (A) ph Figure 7 SNR ersus for asynchronous self-rese wih muliple capure, assuming Q sa = 125, 000e, = 30msec, σ H =005% Example 1 assumes 10 bi ADC, σ Readou =35e, cap =150µsec and achiees DR= 117dB Example 2 assumes 9 bi ADC, σ Readou =70e, cap = 100µsec and achiees DR= 114dB Remarks: (i) Readou noise for his scheme is he same as ha of muliple-capure and can be reduced by weighed aeraging Noe ha aeraging can be more effecie in his case due o he random phase induced by he asynchronous self-rese Also noe ha weighed aeraging also improes SNR in he exended range (ii) SNR a he high end can indeed be exended beyond he well capaciy limi Howeer, such exension is limied by gain FPN, which canno be ignored in his case (iii) Since his scheme is he same as muliple-capure wih an addiional self-rese mechanism, he accuracy of he comparaor is relaxed The accuracy of he self-rese mechanism is also relaxed, since he phoocurren is esimaed using he slope of he modulaor oupu waeform (i) Power consumpion for his scheme is dominaed by digial readou and DSP Unlike for he muliplecapure scheme, he capure imes for his scheme mus be uniform 6 SYNCHRONOUS SELF-RESET WITH RESIDUE READOUT In his secion we discuss he synchronous self-rese wih residue readou scheme proposed in [14] The scheme is described in Figure 8 The phoocurren is inegraed and conered ino olage (), which is periodically compared o a reference olage If(), he comparaor swiches, he inegraor is rese, and he SPIE-IS&T/Vol

9 couner is incremened A he end of inegraion, he digiized alue of ( ) and he rese coun are combined o esimae he phoocurren Le n Rese be he number of reses, hen î ph = qq ( max n Rese + ( ) in) Rese () ADC Linear Filer Binary Sequence Couner Modulaor CLK Filer (a) clk T rese Low Ligh High Ligh (b) Figure 8 Synchronous self-rese scheme To compue DR and SNR, we firs compue he disorion due o he underesimaion of charge resuling from sauraion before synchronous reseing akes place (see he waeform in Figure 8(b)) A he high end, assuming no noise T rese = qq max /( clk ) clk, and he couner oupu is gien by n Rese = /T rese Therefore, we can wrie i ph clk < ˆ < qq max /( clk ) clk The oal aerage disorion power is herefore gien by σdisorion 2 = 1 ( ) 2 iph clk 3 qq max /( clk ) clk To find he oal noise power we need o add conribuions from sho noise, rese noise, residue readou noise, and gain FPN To esimae he aerage noise power due o sho noise, we approximae he oal inegraion ime for sho noise by Gain FPN in he exended DR is due in par o he comparaor and rese offses ha resul in offse ariaion, σ Offse,inQ max Combining hese noise erms wih he disorion, we obain he oal noise power σ 2 i = σ 2 Disorion + q +(n Rese +1) Therefore SNR is gien by SNR( )= ( qσrese ) 2 + ( qσreadou ) 2 ( ) 2 qσoffse n Rese + +(σ H ) 2 ( ) 2 (σ Disorion ) 2 + q +(n Rese + 1)(qσ Rese ) 2 +(qσ Readou ) 2 +(qσ Offse n Rese ) 2 +(σ H ) SPIE-IS&T/Vol 5301

10 To compue DR for he scheme, noe ha i min is gien by i min = q σreadou 2 + σ2 Rese / and i max = 3qQmax / clk Therefore, 3Qmax DR = σ 2 Readou + σrese 2 clk Figure 9 plos SNR ersus for wo examples Noe ha SNR in he exended DR firs increases as (10dB per decade) hen drops as 1/i 2 ph (-20dB per decade) In paricular noe he sudden decrease in SNR for he example wih high σ Offse Reference Example 1 Example SNR (db) (A) Figure 9 SNR ersus for synchronous self-rese, assuming Q sa = 125, 000e, σ Readou =35e, =30msec, clk = 1µsec, Example 1: σ Offse =0001Q max, Example 2: σ Offse =001Q max, boh achiee DR= 161dB Remarks: (i) In [14] CDS is no performed and residue digiizaion is performed a he pixel leel As a resul σ Readou is larger han σ Readou Ref (ii) DR a he high end increases as clk is decreased If he couner is inegraed in he pixel, DR can be exended wih far less power consumpion han in oher schemes, bu a he expense of much larger pixel area As clk decreases, howeer, he speed of he comparaor mus be increased, which resuls in higher σ Offse and hus lower SNR (iii) The modulaor in his scheme comprises an inegraor, a comparaor, and rese circui mechanism The couner and ADC are implemened per pixel Unlike he asynchronous self-rese wih muliple capure scheme, fideliy of he esimaed signal is srongly dependen on he offse of he comparaor and rese Moreoer, o reduce signal disorion in he exended DR, a faser clock is required resuling in ery high power consumpion (i) Power consumpion of his scheme is dominaed by he comparaor and digial circuis including he couner 7 SUMMARY AND CONCLUSION The paper analyzed SNR for four high dynamic range schemes, ime-o-sauraion, 8 muliple-capure, 1 asynchronous self-rese wih muliple capure, 4 and synchronous self-rese wih residue readou 14 Table 1 summarizes our findings and discussion of he schemes In summary all four schemes discussed exend dynamic range a he high end, wih synchronous self-rese exending i he mos Howeer, in erms of signal fideliy in he exended DR, synchronous self-rese does SPIE-IS&T/Vol

11 Scheme Time-o-sauraion Muliple-capure Asynchronous self-rese Synchronous self-rese i min = i min Ref i min Ref i min Ref >i min Ref i max 1/σ sa 1/ cap 1/ cap 1/ clk SNR in dropsas1/i 2 ph consan Q max increase as increase as hen exended DR hen sauraes dropsas1/i 2 ph Power comparaor readou/ DSP readou/ DSP comparaor/digial circuis Table 1 Summary of resuls no fare well due o he underesimaion of charge Achieing ery high DR also requires inegraing a couner in each pixel, which resuls in much larger pixel area han for oher schemes Muliple-capure, on he oher hand, does no increase DR as much, bu has he adanage of haing high fideliy hroughou he exended DR Asynchronous self-rese wih muliple capure can achiee een beer fideliy in he exended DR, bu a he expense of more complex implemenaion All schemes excep for ime-o-sauraion hae he disadanage of increasing i min oer he reference conenional sensor This is mos pronounced in he synchronous self-rese scheme, since CDS is no performed The muliple-capure schemes can miigae his problem by aeraging, bu a he expense of addiional DSP requiremen Our discussion of he implemenaion and power consumpion issues was only qualiaie, since a quaniaie analysis of hese issues would require more specific circui implemenaions, which is beyond he scope of his paper Finally we noe ha similar analysis of oher high fideliy, high dynamic range schemes will be presened in a fuure paper 26 ACKNOWLEDGMENTS The work in his paper was parially suppored under DARPA Microsysems Technology Office Award No N We wish o hank Professors BA Wooley and B Wandell, Dr D Su, H Eloukhy, AO Ercan, KN Salama, H Kakaand and SM Lee for helpful discussions REFERENCES 1 W Bidermann, A El Gamal, S Ewedemi, J Reyneri, H Tian, D Wile, and D Yang, A 018µm high dynamic range NTSC/PAL imaging sysem-on-chip wih embedded DRAM frame buffer, IEEE Inernaional Solid-Sae Circuis Conference, pp , February S Kleinfelder, S Lim, X Liu, and A El Gamal, A 10,000 frames/s CMOS digial pixel sensor, IEEE Journal of Solid-Sae Circuis 36(12), pp , December D Yang, B Fowler, A El Gamal, and H Tian, Image sensor wih ulrawide dynamic range floaing-poin pixel-leel ADC, IEEE Journal of Solid-Sae Circuis 34(12), pp , December X Liu and A El Gamal, Phoocurren esimaion for a self-rese CMOS digial pixel sensor, in Sensors and Camera Sysems for Scienific, Indusrial, and Digial Phoography Applicaions III, MMBlouke, J Canosa, and N Sampa, eds, Proc SPIE 4669, pp , January L McIlrah, A low-power low-noise ulrawide-dynamic-range CMOS imager wih pixel-parallel A/D conersion, IEEE Journal of Solid-Sae Circuis 36(5), pp , May O Yadid-Pech and A Belenky, In-pixel auoexposure CMOS APS, IEEE Journal of Solid-Sae Circuis 38(8), pp , Augus T Lulé, B Schneider, and M Bohm, Design and fabricaion of a high dynamic range image sensor in TFA echnology, IEEE Journal of Solid-Sae Circuis 34(5), pp , May D Soppa, A Simoni, L Gonzo, M Goardi, and G F D Bea, Noel CMOS image sensor wih a 132-dB dynamic range, IEEE Journal of Solid-Sae Circuis 37(12), pp , December V Brajoic and T Kanade, A soring image sensor: and example of massiely parallel inensiy-o-ime processing for low-laency compuaional sesnor, Proceedings of he 1996 IEEE Inernaional Conference on Roboics and Auomaion, pp , SPIE-IS&T/Vol 5301

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