On Switch Factor Based Analysis of Coupled RC Interconnects

Transcription

1 On Swich Facor ased nalysis of oupled Inerconnecs ndrew. Kahng, Sudhakar Muddu and Egino Saro 3 Silicon Graphics, Inc., Mounain iew, US UL ompuer Science Dep., Los ngeles, US 3 3dfx Ineracive, Inc., San Jose, 9534 US fabk@cs.ucla.edu; muddu@mi.sgi.com; esaro@3dfx.comg bsrac We revisi a basic elemen of modern signal inegriy analysis, he modeling of wors-case coupling capaciance effecs wihin a swich facor (SF) based mehodology. We show ha he exac SF is a funcion of he raio of slew imes of boh aggressor and vicim inerconnec volages. Our main resul is ha c (or, SF = ), where c is he saic coupling capaciance, is no a correc upper bound when calculaing inerconnec delay in presence of crossalk: we show ha for signals modeled as finie ramps he wors case is SF = 3. his has implicaions for almos all signal inegriy mehodologies, e.g., window-based approaches ha ieraively deermine wors-case coupling effecs. We have esed our resul in a worscase delay analysis mehodology by ransforming he coupled nework o an nework where each coupling capaciance is replaced by a capaciance 3 o ground. SPIE simulaion confirms he accuracy of wors-case delay esimaes produced using SF = 3. Delay wih SF = 3 can sill be underesimaing because of exponenial waveforms. Inroducion rossalk affecs he behavior of LSI circuis in wo ways: (i) incorrec funcionaliy hrough inroducion of noise a sensiive nodes, and (ii) increasing (or decreasing) inerconnec delays. major cause of delay, and hence iming, uncerainy is he increasing effec of crossalk beween parallel inerconnec lines in DSM circuis. Here, we focus on he crossalk ha is due o capaciive coupling beween lines; his increases wih average inerconnec lengh, rouing densiy, and device swiching speeds. iming and rossalk nalysis Mehodologies. ransien analysis of crossalk using circui simulaion ools [4, 3] is compuaionally expensive and inapplicable o full-chip analysis. Saic iming analysis by is naure uses saic mehods and models o verify iming. However, saic echniques canno model wire delays accuraely in he presence of crossalk. Since such ools seek worscase analyses, he sandard signal inegriy analysis and performance opimizaion mehodology muliplies coupling capaciance In curren processes, coupling capaciance for a given wire can be as high as he sum of area and fringe capaciances, and coupling capaciances will be even more dominan in fuure processes []. Permission o make digial/hardcopy of all or par of his work for personal or classroom use is graned wihou fee provided ha copies are no made or disribued for profi or commercial advanage, he copyrigh noice, he ile of he publicaion and is dae appear, and noice is given ha copying is by permission of M, Inc. o copy oherwise, o republish, o pos on servers or o redisribue o liss, requires prior specific permission and/or a fee. D 000, Los ngeles, alifornia (c) 000 M /00/0006..$5.00 by a swich facor (SF) o yield an equivalen grounded capaciance ha is used in delay and noise calculaions. nalysis of vicim line delay in he presence of crossalk from a neighboring aggressor line 3 assumes ha swich facors range beween 0 and, i.e., he wors-case capaciive loading due o crossalk is c (wice he nominal coupling capaciance). oday, swich facor based delay compuaion is chiefly used wihin ieraive iming analysis mehods [, 5]. Ieraion is needed o address he chicken and egg problem of compuing crossalkdependen delays []. he approach sars wih he wors possible swich facor beween coupled nes. hen, using iming ool resuls and depending on signal arrival and ransiion imes he swich facor values are updaed in he range beween 0 and, and his procedure usually converges wihin several ieraions. We noe ha in such iming verificaion mehodologies, he wors-case coupling is assumed o occur when he vicim and aggressor signals swich a he same ime and wih same ransiion imes (or, ypically, assuming no ransiion ime i.e., a sep inpu). Such assumpions are used hroughou he indusry and academia o provide an upper bound on capaciive coupling. [] demonsraes ha SF = yields pessimisic resuls; since his resul, designing circuis and inerconnecs wih an SF = assumpion has been he de faco indusry sandard. In [0] he ime average of effecive capaciance is shown o be c. he auhors of [3] sugges ha using c as an upper bound in compuing wire delays leads o overesimaion and unnecessarily increases he area and power of he design. hey also indicae ha SF = can be opimisic for some cases and conclude ha his is due o decomposiion of signal pahs ino sages, where each sage begins a he oupu of a gae and exends hrough o he oupu of nex gae on he pah. onribuions of his work. In his paper, we revisi he foundaion of modern swich facor based analysis mehodology, namely, he assumpion ha he consan (as in SF = ) is special. ecall ha coupling is a funcion of signal arrival imes and slew imes of coupled lines. In realiy, he signals arrive a differen imes and swich wih differen slew imes on neighboring (or coupled) lines. We show ha he rue effecive capaciance, i.e., exac swiching facor, is a funcion of raio of slew imes of boh aggressor and vicim lines. We prove ha 3 is he wors case for linear ramp volages if he rise (fall ) of he aggressor is a leas wice as fas as he fall (rise ) of he vicim. Oher required condiions o have SF =3 are ha he aggressor volage sars is ransiion before he vicim line volage reaches is reference volage level, and his ime differ- his is based on heurisic charge-sharing analysis. he resuling decoupled nework allows independen analysis of inerconnecs, hopefully wihou affecing he accuracy of he wors-case analysis. 3 line which generaes a swiching even is called he aggressor, and he line which is affeced by his swiching is called he vicim.

2 ence should equal he aggressor slew ime. For non-linear (e.g., exponenial) volage waveforms he wors case coupling capaciance could be greaer han 3. he analysis of wors case swich facor for compuing maximum delay on he vicim line (seup ime analysis) symmerically applies o yield a bes-case swich facor of - (for hold ime analysis). o assess he impac of our analysis on wors-case coupling delay analysis, we have implemened a simple echnique ha modifies an exraced nework by replacing each coupling capaciance by a grounded capaciance 3. SPIE simulaions on ypical coupled nes, compared wih our analysis resuls, show ha using SF = 3 yields wire delays wihin 5% of he acual delay for he exac coupled nework. However, as he slew ime a he vicim line inpu increases, delay wih SF = 3 underesimaes acual wire delay because of he exponenial wvaeform a each node of he nework. elow, we show hree real configuraions wherein he aggressor and vicim line slew imes can differ, and generae ransiions leading o his worse behavior. Exac Swich Facor nalysis EF gnd () eq ggressor node gnd icim node () eq Figure : olage a nodes and modeled as linear ramps. is a fas rising ramp wih slew ime (i.e., 0 o 00% ransiion imes) and is a slow falling ramp wih slew ime. EF is he 50% reference volage hreshold for swiching beween differen logic saes. onsider a single coupling capacior wih saic capaciance value of conneced beween nodes (aggressor) and (vicim) in Figure. We seek he equivalen capaciances from nodes and o ground (see he Figure) so ha oal curren hrough he equivalen capaciance is same as he original coupling capaciance beween nodes and. We use ramp funcions of arbirary ampliude for he volages a he wo nodes. (ddiional deails are given in [9].). Wors-case Swich Facor ssume ha volage is a rising ramp wih slew ime (where is he 0 o 50% ransiion ime) and volage is a falling ramp wih slew ime. EF (ypically 50% of supply volage) is he reference volage hreshold for swiching beween differen logic saes. We also assume ha >>, so ha he enire ransiion of could ake place before reaches he EF level. (he wors case vicim line delay occurs when he aggressor ne/node swiches fas, and he vicim ne/node swiches slowly in he opposie direcion.) Le he volage a node sar is ransiion a ime and reach EF a ime 4, as indicaed in Figure. Similarly, he volage a node sars ransiioning a ime and reaches is final value a ime 3. Le =,. We observe hree disinc regions, and 3 of overlap for he ransiioning volages and.o compue he equivalen capaciance (or exac swich facor) during he ransiion period as seen by node, we analyze behavior of he saic capacior in he hree regions beween and 4. In region he volage a node is consan (a logic 0) while node is swiching. he effecive capaciance seen by volage is same as he saic capaciance, i.e., eq () =. In region boh node volages are swiching in opposie direcions, hence he effecive capaciance is compued by considering he individual currens drawn by volages a each node. Noe ha if is held a consan volage hen he only curren hrough he equivalen capacior is due o he volage ransiion a node, and is given by i eq () = eq () d d = eq () ( is supply volage level). u when boh and are swiching in opposie direcions he oal curren hrough he saic capacior is due o volage ransiions a boh nodes: i ()= d d + d h d = + i. he equivalen capaciance o ground seen by node is found by equaing he currens i eq () =i (), i.e., eq () = + = ( + K) () where K = is he raio of vicim and aggressor slew imes. 4 Similarly, if is held a consan volage hen he only curren hrough he equivalen capacior is due o he volage ransiion a node, and is given by i eq () = eq () d d = eq (). he equivalen capaciance o ground seen by node (from equaing currens i eq () =i ())is eq () = ( + K) + = () K Given he assumpion ha he aggressor ne swiches faser han he vicim, he upper bound on he aggressor node equivalen capaciance is, which occurs for idenical slews (K = ). Finally, in region 3 he volage a node is consan while node is swiching. he curren hrough he saic capacior is a funcion of volage difference =, beween he nodes; since his difference is less han in region, he effecive capaciance seen by volage is less han or equal o saic capaciance, i.e., eq 3 eq =. Since we wish o model he swich facor over he complee swiching window, we mus compue a ime-average wors case swich facor over he hree regions. Unlike he equivalen capaciance in egion, he oal equivalen capaciance seen by he volage a node (i.e., ime average of all hree effecive capaciances) urns ou o be bounded. We see: eq avg () = eq + eq +(,, ) eq 3 4 Noe ha he equivalen capaciance a vicim node linearly increases wih slew raio K, and is hence unbounded. For example, if he slew imes are = 50ps and = 000ps hen he equivalen capaciance a vicim node is equal o eq ()=, which can significanly affec he delay of he vicim ne. his maximum value, which occurs in one region of he swiching window, canno be used as he overall wors case swich facor (delay resuls will be oo pessimisic) because he oher wo regions have equivalen capaciance less han or equal o.

3 = + [ + ]+(,, ) eq 3 GGESSO LINE 0 0 s Driver c Load s Driver IIM LINE Load d GGESSO LINE EF 3 3, 4 s d c L c IIM LINE s L Figure : Wors-case configuraion such ha fas ransiion a node overlaps wih he slow ransiion a node a he ime close o reference EF volage. In his configuraion he ime poins 3 and 4 coincide and he region 3 does no exis. oal effecive capaciance is maximized when he conribuion of region 3 eq 3 is reduced and ha of region eq is increased. For his o happen, he saring ime when node ransiions should be =, as shown in Figure. In his configuraion, only regions and are presen and region 3 disappears. eq avg (, ) + [ + () = ] = 3 (3) Hence, we have a wors-case capaciive coupling facor of hree imes he saic capaciance. Equaion (3) is valid wih he following assumpions: for linear ramps a nodes and,, and (, ) or ( 4, ). ases wih differen amouns of overlap are discussed below. he maximum value of he equivalen capaciance seen by he volage a node occurs when boh volages sar swiching a he same ime, and is given by eq () = (+K) K. Parial overlap of node volages. We have seen ha maximum coupling occurs if he ramp of volage compleely overlaps he ramp of volage before volage reaches EF. In Figure he fas volage ransiion a node compleely overlaps wih he slower volage ransiion a node. For his overlap region o occur, 5 node mus sar is ransiion a ( 4, ). he overlap ime period iself can be expressed as K,whereK is beween 0 and. For K < he volage parially overlaps wih volage, i.e., region is presen and region is only parially occurs. In his case, oal effecive capaciance is eq avg (, K ) + K [ + () = ] = ( + K ) his equaion is valid for linear ramps a nodes and, and 4 or. If he volage a sars he ransiion afer he volage a node reaches EF, hen he oal effecive capaciance seen is he same as he saic capaciance, i.e., when 4 or. Figure 3: wo parallel coupled inerconnecs, wih inverers as drivers and loads. his configuraion is used for our analysis of opimal swich facor for vicim and aggressor lines. Idenical slew imes. When boh node volages have idenical slew imes =, he oal effecive capaciance is due solely o he overlap capaciance: only region exiss, i.e., eq avg () = eq avg () =[ + ]=. GGESSO LINE s s d d D SF* c SF* c SF* c IIM LINE SF* c L Figure 4: Modeling he coupling capaciance beween he neighboring lines as a lumped capaciance o ground and scaling he value by an effecive swich facor value.. es-ase Swich Facor Le and swichinhesame direcion, i.e., is a falling ramp wih slew ime and has slew ime. gain, assume >> so ha he enire ransiion of can ake place before reaches EF. oal curren is i () = d d, d d = 5 We call his he overlap region because he swiching of boh node volages overlaps in his region. We also refer o he effecive capaciance seen in his region as he overlap capaciance. L

4 h, eq () d d = eq (). seen by node is i, and similar analysis o above gives i eq () = he equivalen capaciance o ground olage gg. Inpu eq () =, = (, K) (4) which can be negaive he vicim line delay can be significanly smaller han he wire delay obaining by neglecing (zeroing wih SF = 0) he coupling capaciance. gain similarly o above, we may obain he equivalen grounded capaciance seen by node : eq () = (K, ), = (5) K 0.5 icim Inpu icim Oupu min ime max ecause he equivalen capaciance a he aggressor node is always equal o or less han he coupling capaciance, he smalles ime-average equivalen capaciance a node occurs when node swiches a he same ime as node. In his configuraion, region disappears. We obain a negaive (!) lower bound on bes-case equivalen capaciance a node : eq avg () = eq + eq +(,, ) eq 3 [, ]+(, ) = =, (6) 3 Model for oupled Inerconnecs o assess he impac of our analysis on wors-case coupling delay mehodology, we apply a simple echnique ha modifies an exraced nework by replacing each coupling capaciance by a grounded capaciance 3. (We will also presen real examples where he aggressor and vicim line slew imes could differ, and generae ransiions leading o even worse behavior.) We consider wo parallel coupled inerconnecs wih drivers and loads aached. In his configuraion boh drivers are on he same side and we assume differen slew imes a he inpus of he wires. n equivalen circui using many segmens of Π models for he inerconnecs and disribued coupling capaciances is used for accurae calculaion of he inerconnec delays. We hen reduce his coupled inerconnec o a disribued lumped line wih coupling capaciance scaled by swich facor as shown in Figure 4. For he vicim line, he swich facor is represened using SF = 3 from Equaion (3), andforheaggressorlineweusesf = (+K) K from Equaion (). Noe ha hese wo swich facors are differen for any configuraion of slew imes a he inpu of he lines. he opimal value for boh hese swich facors is calculaed separaely such ha 50% hreshold delay of coupled circui maches he lumped circui wih swich facors. ircui widh spacing lengh in gnd coup Number (in µm) (in µm) (in µm) (in Ω) (in ff) (in ff) * able : Inerconnec parameers used in various SPIE simulaions ( L = 9.5 ff due o inverer gae capaciance for all cases). *ircui 4 is based on differen process echnology and he gae load used is L =96 ff. Figure 5: ypical waveform of coupled vicim and aggressor wires. he vicim line waveform is non-monoone due o aggressor swiching. he delay of he vicim line increases from min o max because he aggressor swiching slows down he falling vicim signal. 4 Simulaion esuls o sudy he correlaion beween coupled nework and he derived nework wih capaciances muliplied by swich facors, we considered four differen real configuraions: (i),(ii) wo idenical lines coupling for full lengh wih drivers on he same side, and on opposie sides; (iii) hree idenical lines wih all drivers on he same side; and (iv) hree idenical lines wih aggressor line drivers on he same side bu vicim line drivers on he opposie side. We use global M5 inerconnecs from a recen microprocessor design in 0.5 µm MOS echnology. We assume idenical inerconnecs are driven by idenical inverers of size (56,3) µm, and also assume ha he loads a he end of he lines are idenically sized inverers. We sudy various configuraions of inerconnec lengh, widh, and spacing wih parameers as given in able. he conex for his experimenaion is o discover how closely our proposed opimal SF = 3 model compares o he full coupled model, using SPIE simulaions. Figure 5 shows he ypical vicim line waveform, which is nonmonoonic when he aggressor line is swiching in he opposie direcion. he delay of he vicim line increases from min o max because he aggressor swiching slows down he falling vicim signal. Even hough he load gae a he end of he vicim line sars o rigger a min he oupu of he load gae will be delayed due o he non-monoonic behavior of he vicim signal, which affecs he gae delay. Our simulaions of he above configuraion show ha using SF = 3.0 yields accurae delays when compared o he coupled model (see able ). he wors case swich facor for he vicim line could occur a any of he capaciance nodes in he equivalen circui when he aggressor has a small slew ime and he vicim has a large slew ime window. s he signal propagaes down he vicim line he shape of he signal is more like an exponenial han a ramp, and hence he 50% hreshold delay on he vicim line for coupled configuraion becomes slighly greaer han he delay value compued using SF = 3. his implies ha for signals oher han ramps he swich facor could be higher han oupled Lines wih Opposie-Side Driver onfiguraion Figure 7 shows wo parallel coupled inerconnecs wih drivers on opposie sides, wih slow vicim slew ime and faser aggressor slew ime. his configuraion is common in high-performance Is.

5 ircui Driver icim 50% hreshold delay (ps) Number Loc. /gg. oupled SF= SF= SF=3 Slew Same 400/ Same 400/ Same 400/ Same 400/ Same 000/ Opp. 400/ Opp. 000/ able : omparison of 50% hreshold delays of vicim line for various SF values, versus coupled configuraion. We use wo coupled lines wih drivers on he same side, or on opposie sides. Delay (ps) oupled Line Delay vs ggressor rrival imes Same side Drv Opp side Drv rrival_ime(ps) x Figure 6: hange of vicim line delay wih he variaion of arrival imes of he aggressor inpu signal, using ircui 4 parameers. rrival ime of he aggressor signal is compued wih reference o he sar of he vicim signal ransiion. icim slew ime is 000ps and aggressor slew ime is 00ps. When swiching on he vicim line reaches he load a he end of he line, he volage a ha poin has a large exponenial waveform due o line parasiics. Now, if he aggressor line swiches jus before he vicim line reaches he reference volage (say 50% hreshold), hen he above-described wors case swiching occurs. Noe ha he effecive coupling capaciance can be much greaer han hree imes nominal, again due o he exponenial waveforms a he nodes of he coupling capaciance. esuls of simulaions wih his configuraion are summarized in able. he delay of he vicim line wih SF=3.0 sill underesimaes he coupled line delay for ircui 4 wih slew imes 000ps/00ps and 400ps/00ps. oh he same side and he opposie side driver configuraions yield idenical delay resuls for he circui model wih swich facors, since idenical circuis are simulaed. In oher words, he swich facor ha we derive is a funcion of only he slew imes a he inpus of he lines and canno disinguish beween same and opposie drive configuraions. Figure 6 shows he change of vicim line delay wih he variaion of arrival imes of he aggressor inpu signal (using ircui 4 parameers from able ). rrival ime of he aggressor signal is compued wih reference o he saring poin of he vicim signal. We observe ha insances wih larger vicim line slew imes have larger vicim line delays. s Driver GGESSO LINE c IIM LINE Load Driver 0 0 Load s Figure 7: wo parallel coupled inerconnecs, wih drivers on opposie sides. his configuraion is used o invesigae he case of vicim signal swiching slowly and aggressor line swiching fas, which causes wors case coupling beween he lines. 4. wo ggressor and icim onfiguraion We exend our experimens o muliple aggressors, considering wo idenical aggressors coupling o a vicim ne for he full lengh of he line. We use drivers boh on he same side and on he opposie side for his simulaion configuraion. able 3 shows he vicim line delay for various aggressor and vicim line slews. lhough he vicim line delay wih SF=3.0 is close o he wors possible delay wih coupled line configuraion, i is sill underesimaing he coupled line delay. One conclusion we can again draw from hese simulaions is ha for wors case inerconnec delay modeling, we need o use SF greaer han 3. Figure 8 shows ha vicim line delay under coupled configuraion is much higher han he delay obained wih he SF = 3.0 per aggressor line model. able 3 also shows an ineresing comparison of vicim line delays for he case when aggressor slew is 00ps and 5ps. he coupled line delay for he case of 5ps aggressor slew is less han for he case of 00ps aggressor slew as shown in Figure 8. We have ploed he wors-case vicim line delay peak-noise on vicim line for various aggressor slew imes in Figure 9. s expeced peak noise decreases for higher aggressor slew ime (i.e., for smaller aggressor driver sizes) bu vicim line delay could increase for higher aggressor slew imes. his shows a conflic for simulaneous opimizaion of peak noise and vicim line delay by changing aggressor driver size. From he discussion in Secion 3., he reason for his behavior is ha even hough effecive coupling capaciance is proporional o raio of aggressor and vicim slews, he overlap ime window when boh aggressor and vicim lines swiching is small for he 5ps case. his implies ha making aggressor driver big (i.e., small slew ime) will reduce he wors-case vicim line delay. However, from he funcionaliy perspecive he bigger aggressor driver injecs more noise ino he vicim line. hese are conradicory facors in achieving opimal aggressor and vicim driver sizes in he design process. Las, simulaion of he coupled configuraion of aggressor and vicim lines generaes non-linear waveforms insead of linear ramps a he inpu of he receiver gaes. In paricular, around he reference (50%) volage level he vicim line waveform has small convex/concave changes, making i very nonlinear and difficul o handle in any gae model characerizaion. ecause of his non-linear waveform behavior a he gae inpus, he gae delay can no longer be compued using linear ramps or simple exponenial waveforms. 5 onclusions In his paper, we have revisied a basic foundaion of oday s signal inegriy ools mehodology. We show analyically ha he effec-

6 oupled Line Delay vs ggressor rrival imes Delay x 0 - slews=000/00ps slews=000/5ps SF= SF=4.0 SF= icim Line Wors-case Delay and Peak-Noise vs ggressor slew Delay(ps)/Noise(mv) x 0 - Delay PeakNoise rrival_ime x gg_slew x Figure 8: hange of vicim line delay wih he variaion of arrival imes of he aggressor inpu signal for he case of wo aggressors wih ircui 4 parameers. his plo shows ha vicim line delay is less for aggressor slew = 5ps han for aggressor slew =00ps. he plo also shows he delay for various SF values. ircuis Driver icim 50% hreshold delay (ps) Loc. /gg. oupled SF= SF= SF=3 Slew 4 Same side 400/ Same side 000/ Same side 000/ Opp. side 400/ Opp. side 000/ Opp. side 000/ able 3: omparison of 50% hreshold delays of wo aggressor and vicim coupled configuraion wih vicim line delays compued using various SF values. he able indicaes SF values for boh coupled lines ogeher and hence range from.0 o 6.0. ive capaciance or swiching facor (SF) is a funcion of raio of slew imes of boh aggressor and vicim lines. We presen a formal proof ha SF = 3 represens he wors case and SF = - represens he bes case for linear ramp volages. SPIE simulaions on ypical coupled nes, compared wih our analysis resuls, indicae ha using SF = 3 as swich facor in he decoupled nework yields wire delays close o he acual delay for he exac coupled nework configuraion. In high frequency designs, curren mehodologies ha use SF = underesimae inerconnec delays; his may resul in iming problems wih criical nes, and failure o mee cycle ime goals in real silicon. ( recen uorial presenaion discusses he use of SF = 4 o capure wors-case coupling effecs in he presence of exponenial waveforms.) In pracice, signals a he nodes of he coupling capaciance are mos closely modeled as exponenial waveforms, and he effecive coupling capaciance of 3 may no be a upper bound in such condiions. Our ongoing work is aimed a exending he mehodology discussed in his paper o compue wors-case swich facors for coupled nes wih exponenial signals a he aggressor and vicim nodes. Figure 9: Wors-case vicim line delay and peak-noise on vicim line are ploed for various aggressor slew imes. Peak noise decreases for higher aggressor slew ime (or for smaller aggressor driver sizes) bu vicim line delay could increase for higher aggressor slew imes. eferences [] Semiconducor Indusry ssociaion, Naional echnology oadmap for Semiconducors, 997. [] H. hin and S. Muddu, LK: Lach-based Saic iming nalysis ool, Silicon Graphics, Inc., 999. [3] D. H. ho, Y. S. Eo, M. H. Seung, N. H. Kim, J. K. Wee, O. K. Kwon and H. S. Park, Inerconnec apaciance, rossalk, and Signal Delay for 0.35 µm MOS echnology, Proc. IEEE Inernaional Elecron Devices Meeing, 996, pp [4] N. hang,. Kanevsky,. Queen, O. S. Nakagawa and S.-Y. Oh, 3-sigma Wors-ase alculaion of Delay and rossalk for riical Ne, M/IEEE Inernaional Workshop on iming Issues in he Specificaion and Synhesis of Digial Sysems, 997, pp [5]. Franzini,. Forzan, D. Pandini, P. Scandolara and. Dal Fabbro, rossalk ware Saic iming nalysis: a wo Sep pproach, Proc. IEEE ISQED, March 000, pp [6] G.. Kaopis and H. H. Smih, oupled Noise Predicors for Lossy Inerconnecs, IEEE ransacions on omponens, Packaging, and Manufacuring echnology-par 7(4) (994), pp [7] H. Kawaguchi and. Sakurai, Delay and Noise Formulas for apaciively oupled Disribued Lines, Proc. sian and Souh Pacific Design uomaion onference, 998, pp [8] S. Muddu and S. Mcormick, Managing Noise in DSM Designs, uorial noes, Proc. IEEE ISQED, March 000. [9] S. Muddu and E. Saro Swich Facor ased Delay Mehodology for oupled Inerconnecs, echnical repor, MIPS EX Microprocessor Group, 999. [0] L. Pileggi, oping wih (L) Inerconnec Design Headaches, IEEE ID uorial, Nov []. Sakurai, losed-form Expressions for Inerconnecion Delay, oupling, and rossalk in LSI s, IEEE rans. on Elecron Devices 40 (993), pp [] S. S. Sapanekar, On he hicken-and-egg Problem of Deermining he Effec of rossalk on Delay in Inegraed ircuis, Proc. IEEE 8h opical Meeing on Elecrical Performance of Elecronic Packaging (EPEP-99), 999, pp [3] G. Yee,. handra,. Ganesan and. Sechen, Wire Delay in he Presence of rossalk, M/IEEE Inernaional Workshop on iming Issues in he Specificaion and Synhesis of Digial Sysems, Dec. 997, pp