FTW20N50A. General Description
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1 FTW2N5A General Description FTW2N5A, the silicon N-channel Enhanced VDMOSFETs, is obtained by the self-aligned planar Technology which reduce the conduction loss, improve switching performance and enhance the avalanche energy. The transistor can be used in various power switching circuit for system miniaturization and higher efficiency. The package form is TO-3P(N), which accords with the RoHS standard.. Features Fast Switching Low ON Resistance(Rdso Low Gate Charge (Typical Data:3nC) Low Reverse transfer capacitances(typical:65pf) % Single Pulse avalanche energy Test Applications Power switch circuit of electron ballast and adaptor. AbsoluteTc= 25 unless otherwise specified V DSS 5 V I D 2 A P D (T C =25) 23 W R DS(ON).26 TO 3P(N) Symbol Parameter Rating Units V DSS Drain-to-Source Voltage 5 V Continuous Drain Current 2 A I D Continuous Drain Current T C = C 2 A I DM a Pulsed Drain Current 8 A V GS Gate-to-Source Voltage 3 V a2 E AS Single Pulse Avalanche Energy 95 mj a E AR Avalanche Energy,Repetitive 9 mj a I AR Avalanche Current 4 A dv/dt a3 Peak Diode Recovery dv/dt 4. V/ns Power Dissipation 23 W P D Derating Factor above 25 C.85 W/ T J T stg Operating Junction and Storage Temperature Range 5 55 to 5 T L MaximumTemperature for Soldering FTP4N 3 29 InPower Semiconductor Co., Ltd. Page of
2 Electrical CharacteristicsTc= 25 unless otherwise specified OFF Characteristics Symbol Parameter Test Conditions Rating Min. Typ. Max. V DSS Drain to Source Breakdown Voltage V GS =V, I D =25μA V BV DSS /T J Bvdss Temperature Coefficient ID=25uA,Reference V/ I DSS Drain to Source Leakage Current V DS = 5V, V GS = V, T a = V DS =4V, V GS = V, T a = 25 I GSS(F) Gate to Source Forward Leakage V DS =V, V GS = 3V na I GSS(R) Gate to Source Reverse Leakage V DS =V, V GS = -3V na ON Characteristics Symbol Parameter Test Conditions Rating Min. Typ. Max. R DS(ON) Drain-to-Source On-Resistance V GS =V,I D =A V GS(TH) Gate Threshold Voltage V DS = V GS, I D = 25μA V Pulse width tp38μs,2% Dynamic Characteristics Symbol Parameter Test Conditions Rating Min. Typ. Max. g fs Forward Transconductance V DS =5V, I D =A S C iss Input Capacitance C oss Output Capacitance f =.MHz Reverse Transfer Capacitance C rss V GS = V V DS = 25V Units μa Units Units pf Resistive Switching Characteristics Rating Symbol Parameter Test Conditions Min. Typ. Max. t d(on) Turn-on Delay Time tr Rise Time t d(off) Turn-Off Delay Time t f Fall Time I D =2A V DD = 25V R G = Q g Total Gate Charge Q gs Gate to Source Charge -- 2 Q gd Gate to Drain ( Miller )Charge I D =2A V DD =4V V GS = V Units ns nc 29 InPower Semiconductor Co., Ltd. Page 2 of
3 Source-Drain Diode Characteristics Symbol Parameter Test Conditions Rating Min. Typ. Max. I S Continuous Source Current (Body Diode) A I SM Maximum Pulsed Current (Body Diode) A V SD Diode Forward Voltage I S =2A,V GS =V V trr Reverse Recovery Time I S =2A,T j = 25C ns di Qrr Reverse Recovery Charge F /dt=a/us, V GS =V nc Pulse width tp38μs,2% Units Symbol Parameter Max. Units RJC Junction-to-Case.54 /W RJA Junction-to-Ambient 4 /W a Repetitive rating; pulse width limited by maximum junction temperature a2 L=.mH, I D =2A, Start T J =25 a3 I SD =2A,di/dt 3A/us,V DD BV DS, Start T J =25 29 InPower Semiconductor Co., Ltd. Page 3 of 9
4 24 OPERATION IN THIS AREA MAY BE LIMITED BY R DS(ON) T J =MAX RATED T C =25 Single Pulse ms DC ms s s PD, Power Dissipation Watts Vds, Drain-to-Source Voltage, Volts Figure Maximun Forward Bias Safe Operating Area TC, Case Temperature, C Figure 2 Maximun Power Dissipation vs Case Temperature 7 PULSE DURATION=25s V GS =5V DUTY FACTOR=.5%MAX 6 Tc = 25 V GS =8V V GS =5.5 V GS =5V V GS = TC, Case Temperature C Figure 3 Maximum Continuous Drain Current vs Case Temperature Vds, Drain-to-Source Voltage, Volts Figure 4 Typical Output Characteristics Thermal Impedance, Normalized.. % Single pulse 5% 2% 5% % 2% Rectangular Pulse Duration,Seconds Figure 5 Maximum Effective Thermal Impendance, Junction to Case PDM t t2 NOTES DUTY FACTOR D=t/ t2 PEAK Tj=P DM *Z thjc *R thjc +T C 29 InPower Semiconductor Co., Ltd. Page 4 of
5 Idm, Peak Current, Amps TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION FOR TEMPERATURES ABOVE 25 DERATE PEAK CURRENT AS FOLLOWS: I I T C..E-5.E Vgs, Gate to Source Voltage, Volts.E-3.E-2 t Pulse Width, Seconds.E-.E+.E+ Figure 6 Maximun Peak Current Capability PULSE DURATION = 25s DUTY CYCLE =.5%MAX V DS =5V +5 Rds(on), Drain to Source ON Resistance, Ohms PULSE DURATION = s DUTY FACTOR =.5%MAX Tc =25 I D =2A I D =A I D =5A Vgs, Gate to Source Voltage Volts Rds(on), Drain to Source ON Figure 7 Typical Transfer Characteristics PULSE DURATION = s DUTY CYCLE=.5%MAX Tc =25 V GS =V V GS =2V Figure 8 Typical Drain to Source ON Resistance vs Gate Voltage and Drain Current 3 Rds(on), Drain to Source ON Resistance, Nomalized VGS=V ID=A Figure 9 Typical Drain to Source ON Resistance vs Drain Current Tj, Junction temperature, C Figure Typical Drian to Source on Resistance vs Junction Temperature 29 InPower Semiconductor Co., Ltd. Page 5 of
6 Vgs(th),Threshold Voltage, Nomalized Capacitance, pf Isd, Reverse Drain Current, Amps VGS=V ID=25A Tj, Junction temperature, C Figure Typical Theshold Voltage vs Junction Temperature Coss V GS =V, f=mhz 2 Ciss=Cgs+Cgd Coss=Cds+Cgd Crss=Cgd Crss. Vds, Drain - Source Voltage, Volts Figure 3 Typical Capacitance vs Drain to Source Voltage Vsd, Source - Drain Voltage, Volts Figure 5 Typical Body Diode Transfer Characteristics Ciss Bvdss,Drain to Source Breakdown Voltage, Normalized Vgs, Gate to Source Voltage,Volts Tj, Junction temperature, C Figure 2 Typical Breakdown Voltage vs Junction Temperature VDS=V VDS=25V VDS=4V ID=2A VGS=V ID=25A Qg, Total Gate Charge, nc Figure 4 Typical Gate Charge vs Gate to Source Voltage If R=: t AV =(L* I AS ) / (.38V DSS -V DD ) If R: t AV =(L/R) In[IAS*R/ (.38V DSS -V DD )+] R equals total Series resistance of Drain circuit STARTING Tj = 25 STARTING Tj = 5..E-6.E-5.E-4.E-3.E-2.E-.E+ tav,time in Avalanche,Seconds Figure 6 Unclamped Inductive Switching Capability 29 InPower Semiconductor Co., Ltd. Page 6 of
7 29 InPower Semiconductor Co., Ltd. Page 7 of
8 29 InPower Semiconductor Co., Ltd. Page 8 of
9 Package Information TO-3P(N) Package The name and content of poisonous and harmful material in products Hazardous Substance Part s Name Pb Hg Cd Cr(VI) PBB PBDE Limit.%.%.%.%.%.% Lead Frame Molding Compound Chip Wire Bonding Solder Note means the hazardous material is under the criterion of SJ/T means the hazardous material exceeds the criterion of SJ/T InPower Semiconductor Co., Ltd. Page 9 of
10 Disclaimers: InPower Semiconductor Co., Ltd (IPS) reserves the right to make changes without notice in order to improve reliability, function or design and to discontinue any product or service without notice. Customers should obtain the latest relevant information before orders and should verify that such information is current and complete. All products are sold subject to IPS s terms and conditions supplied at the time of order acknowledgement. InPower Semiconductor Co., Ltd warrants performance of its hardware products to the specifications at the time of sale, Testing, reliability and quality control are used to the extent IPS deems necessary to support this warrantee. Except where agreed upon by contractual agreement, testing of all parameters of each product is not necessarily performed. InPower Semiconductor Co., Ltd does not assume any liability arising from the use of any product or circuit designs described herein. Customers are responsible for their products and applications using IPS s components. To minimize risk, customers must provide adequate design and operating safeguards. InPower Semiconductor Co., Ltd does not warrant or convey any license either expressed or implied under its patent rights, nor the rights of others. Reproduction of information in IPS s data sheets or data books is permissible only if reproduction is without modification or alteration. Reproduction of this information with any alteration is an unfair and deceptive business practice. InPower Semiconductor Co., Ltd is not responsible or liable for such altered documentation. Resale of IPS s products with statements different from or beyond the parameters stated by InPower Semiconductor Co., Ltd for that product or service voids all express or implied warrantees for the associated IPS s product or service and is unfair and deceptive business practice. InPower Semiconductor Co., Ltd is not responsible or liable for any such statements. Life Support Policy: InPower Semiconductor Co., Ltd s products are not authorized for use as critical components in life support devices or systems without the expressed written approval of InPower Semiconductor Co., Ltd. As used herein:. Life support devices or systems are devices or systems which: a. are intended for surgical implant into the human body, b. support or sustain life, c. whose failure to perform when properly used in accordance with instructions for used provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 29 InPower Semiconductor Co., Ltd. Page of
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