SVF18N50F/T/PN_Datasheet

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1 18A 500V N-CHANNEL MOSFET GENERAL DESCRIPTION SVF18N50F/T/PN is an N-channel enhancement mode power MOS field effect transistor which is produced using Silan proprietary F-Cell TM structure VDMOS technology. The improved planar stripe cell and the improved guard ring terminal have been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are widely used in AC-DC power suppliers, DC- DC converters and H-bridge PWM motor drivers. FEATURES 18A,500V,R DS(on(typ) GS =V Low gate charge Low Crss Fast switching Improved dv/dt capability NOMENCLATURE ORDERING INFORMATION Part No. Package Marking Material Packing SVF18N50F TO-220F-3L SVF18N50F Pb free Tube SVF18N50T TO-220-3L SVF18N50T Pb free Tube SVF18N50PN TO-3PN 18N50 Pb free Tube Page 1 of 9

2 ABSOLUTE MAXIMUM RATINGS (T C =25 C unless otherwise noted) Characteristics Symbol Rating SVF18N50F SVF18N50T SVF18N50PN Unit Drain-Source Voltage V DS 500 V Gate-Source Voltage V GS ±30 V Drain Current T C =25 C I D 18.0 T C =0 C A Drain Current Pulsed I DM 72.0 A Power Dissipation(T C =25 C) W P D -Derate above 25 C W/ C Single Pulsed Avalanche Energy (Note 1) E AS 1502 mj Operation Junction Temperature Range T J -55~+150 C Storage Temperature Range T stg -55~+150 C THERMAL CHARACTERISTICS Characteristics Symbol Rating SVF18N50F SVF18N50T SVF18N50PN Unit Thermal Resistance, Junction-to-Case R θjc C/W Thermal Resistance, Junction-to-Ambient R θja C/W ELECTRICAL CHARACTERISTICS (Tc=25 C unless otherwise noted) Characteristics Symbol Test conditions Min. Typ. Max. Unit Drain -Source Breakdown Voltage B VDSS V GS =0V, I D =250µA V Drain-Source Leakage Current I DSS V DS =500V, V GS =0V µa Gate-Source Leakage Current I GSS V GS =±30V, V DS =0V ±0 na Gate Threshold Voltage V GS(th) V GS = V DS, I D =250µA V Static Drain- Source On State Resistance R DS(on) V GS =V, I D =9.0A Ω Input Capacitance C iss Reverse Transfer Capacitance C rss Output Capacitance C oss V DS=25V,V GS=0V, f=1.0mhz pf Turn-on Delay Time t d(on) V DD =250V,I D =18.0A, Turn-on Rise Time t r R G =25Ω Turn-off Delay Time t d(off) ns Turn-off Fall Time t f (Note 2,3) Total Gate Charge Q g V DS =400V,I D =18.0A, Gate-Source Charge Q gs V GS =V nc Gate-Drain Charge (Note 2,3) Q gd Page 2 of 9

3 SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Characteristics Symbol Test conditions Min. Typ. Max. Unit Continuous Source Current I S Integral Reverse P-N Pulsed Source Current I SM Junction Diode in the A MOSFET Diode Forward Voltage V SD I S =18.0A,V GS =0V V Reverse Recovery Charge Q rr di F /dt=0a/µs(note 2) µc Reverse Recovery Time T rr I S =18.0A,V GS=0V, ns 1. L=30mH, I AS =8.60A,V DD =140V, R G =25Ω, starting T J =25 C; 2. Pulse Test: Pulse width 300μs,Duty cycle 2%; 3. Essentially independent of operating temperature. Page 3 of 9

4 TYPICAL CHARACTERISTICS 0 1 Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0 Variable VGS=4.5V -55 C VGS=5V 25 C VGS=5.5V 150 C VGS=6V VGS=7V VGS=8V VGS=V VGS=15V µS pulse test 2.T C=25 C Drain-Source Voltage V DS (V) µS pulse test 2.V DS=50V Gate-Source Voltage V GS (V) 0.29 Figure 3. On-Resitance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature V GS=V V GS=20V -55 C 25 C 150 C µS pulse test 2.V GS=0V 0.26 Note: T J=25 C Drain Current I D (A) Source-Drain Voltage V SD (V) Figure 5. Capacitance Characteristics Ciss Coss Crss Ciss=Cgs+Cgd(Cds=shorted) Coss=Cds+Cgd Crss=Cgd 1. V GS=0V 2. f=1mhz Drain-Source Voltage V DS (V) Figure 6. Gate Charge Characteristics V DS=400V V DS=250V V DS=0V Note: I D=18A 32 Total Gate Charge Qg(nC) 40 Page 4 of 9

5 TYPICAL CHARACTERISTICS(continued) 1.2 Figure 7. Breakdown Voltage Variation vs. Temperature 3.0 Figure 8. On-resistance Variation vs. Temperature Drain-Source Breakdown Voltage(Normalized) BVDSS(V) V GS=0V 2. I D=250µA Drain-Source On-Resistance (Normalized) RDS(ON)(Ω) V GS=V 2. I D=9.0A Junction Temperature T J ( C) Junction Temperature T J ( C) 2 Figure 9-1. Max. Safe Operating Area(SVF18N50F) 2 Figure 9-2. Max. Safe Operating Area(SVF18N50T) Drain Current - ID(A) Operation in This Area is Limited by RDS(ON) DC 1.TC=25 C 2.Tj=150 C 3.Single Pulse ms 1ms 0µs Drain Current - ID(A) Operation in This Area is Limited by RDS(ON) 1.TC=25 C 2.Tj=150 C 3.Single Pulse DC ms 0µs 1ms Drain Source Voltage - V DS (V) Drain Source Voltage - V DS (V) Drain Current - ID(A) Figure 9-3. Max. Safe Operating Area(SVF18N50PN) Operation in This Area is Limited by RDS(ON) 1.TC=25 C 2.Tj=150 C 3.Single Pulse DC ms 0µs 1ms Drain Current - ID(A) Figure. Maximum Drain Current vs. Case Temperature Drain Source Voltage - V DS (V) Case Temperature T C ( C) Page 5 of 9

6 TYPICAL TEST CIRCUIT Gate Charge Test Circuit & Waveform 12V 200nF 50KΩ 300nF Same Type as DUT VDS VGS V Qg Qgs Qgd VGS DUT 3mA Charge Resistive Switching Test Circuit & Waveform VGS VDS RL VDS 90% VDD V RG DUT % VGS td(on) tr ton td(off) tf toff Unclamped Inductive Switching Test Circuit & Waveform VDS L BVDSS EAS = 1 2 LI AS 2 BVDSS BVDSS - VDD ID IAS V tp RG DUT VDD VDD ID(t) VDS(t) tp Time Page 6 of 9

7 PACKAGE OUTLINE TO-220F-3L UNIT: mm TO-3PN UNIT: mm Page 7 of 9

8 PACKAGE OUTLINE (continued) TO-220-3L UNIT: mm Disclaimer: Silan reserves the right to make changes to the information herein for the improvement of the design and performance without further notice! Customers should obtain the latest relevant information before placing orders and should verify that such information is complete and current. All semiconductor products malfunction or fail with some probability under special conditions. When using Silan products in system design or complete machine manufacturing, it is the responsibility of the buyer to comply with the safety standards strictly and take essential measures to avoid situations in which a malfunction or failure of such Silan products could cause loss of body injury or damage to property. Silan will supply the best possible product for customers! Page 8 of 9

9 ATTACHMENT Revision History Date REV Description Page Original Modify PACKAGE OUTLINE Add the package of TO-220-3L Modify TYPICAL CHARACTERISTICS Modify the values of T rr and Q rr Page 9 of 9

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