Mixed-Signal Design Innovations in FDSOI Technology. Boris Murmann April 13, 2016
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1 Mixed-Signal Design Innovations in FDSOI Technology Boris Murmann April 13, 2016
2 Outline Application trends and needs Review of FDSOI advantages Examples High-speed data conversion RF transceivers Medical imaging Machine learning 2
3 The Big Picture Hardware Platforms Physical World Software, Networks Virtual World Fusion of Physical and Virtual Worlds Various terminology for the same overarching trend Third paradigm Ubiquitous computing Internet of Everything 3
4 The Big Picture Sophie V. Vandebroek, Three Pillars Enabling the Internet of Everything, ISSCC 2016 Keynote Talk 4
5 Implications Unprecedented opportunities for new businesses New forms of human-machine interaction Virtual reality, wearable devices, New kinds of sensors, actuators Medical diagnostics, robotics, Fundamental change in the nature and volume of data Vast amounts of data at the edge requiring local processing Cloud computing fog computing 5
6 Selected Needs in Mixed-Signal/RF Design Ultra low-power analog interfaces Ultra low-power fog computing Universal radios Ultra high-speed, low energy data links 6
7 Outline Application trends and needs Review of FDSOI advantages Examples High-speed data conversion RF transceivers Medical imaging Machine learning 7
8 Variability Tighter process corners and less random mismatch than bulk processes [Le Tual, ISSCC 2014] Benefits Simpler design process, shorter design cycle Improved yield or improved performance at given yield Bulk FDSOI Performance Gain in Guaranteed Performance 8
9 Switch Performance Improved gate control allows for small V TH Backgate bias allows for additional V TH reduction on demand Result is an unprecedented quality of analog switches Key for high-performance data converters and other SC circuits Compounding benefits: Smaller R Smaller switch Compact layout Lower parasitics Even smaller switch [Le Tual, ISSCC 2014] 9
10 Reduced Junction Capacitance Low C j makes a substantial difference in high-speed design Drastic reduction of self-loading in gain stages Drastic reduction of switch self-loading This not only leads to incremental improvements, but allows the designer the use circuit architectures that would be infeasible/inefficient in bulk technology Some examples to follow 10
11 Outline Application trends and needs Review of FDSOI advantages Examples High-speed data conversion Medical imaging RF transceivers Machine learning 11
12 12 Increasing Need for Bandwidth
13 Motivation Increasingly Complex Modulation Both electrical and optical systems are trending away from simple NRZ signaling Requires linear front-end circuits and very highspeed A/D converters Reference: K. Roberts et al., IEEE Communications Magazine, July
14 FoM W [fj/conv-step] ADC Landscape in GS/s, 10W 10 2 FOM W = P ቤ f s 2 ENOB f in f s f s [Hz] Data: 14
15 FoM W [fj/conv-step] ADC Landscape in f s [Hz] Data: 15
16 FoM W [fj/conv-step] ADC Landscape in f s [Hz] Data: 16
17 FoM W [fj/conv-step] ADC Landscape in FDSOI or 32 SOI f s [Hz] Data: 17
18 State of the Art: 8b, 90 GS/s, 667 mw Reference: Kull et al., ISSCC
19 Architecture Two switches in series Takes advantage of SOI Reference: Kull et al., ISSCC
20 RF Goes Switch-Cap Universal Radios? Paradigm shift toward translational circuits, N-path filters Enabled by switch performance in modern CMOS technology FDSOI provides same advantages as seen in the data converter examples Reference: J. Park and B. Razavi, Channel Selection at RF Using Miller Bandpass Filters, IEEE J. Solid-State Circuits, vol. 50, pp , Dec
21 Ultrasound Goes Handheld and Wearable A. Bhuyan exo System Butterfly Network Source (bottom): 21
22 Work in Progress: Integrated Ultrasound Receiver Ultrasound transducer 22
23 23 Work in Progress: Integrated Ultrasound Receiver
24 Area [mm 2 ] Area of State-of-the-Art DS Modulators Channel BW=5MHz~25MHz, and SNDR=50dB~75dB SDCT(ISSCC) SDCT(VLSI) SDSC(ISSCC) SDSC(VLSI) 10 0 Digital 10-1 pixel area 10-2 [2] [1] [3] This DS 28nm FDSOI [2009, Van Veldhoven, 40nm process] Power [W] [1] Van Veldhoven, VLSI nm [3] E. Z. Tabasy, VLSI nm [2] K. Matsukawa, VLSI nm 24
25 Example: Image Classification Many interesting problems to solve Wide range of algorithms and complexity Sources: Choi, ISSCC 2015; Stanford CS231; D. Hammerstrom 25
26 ImageNet Large Scale Visual Recognition Challenge
27 Workhorse of Contemporary Machine Learning: Convolutional Neural Network Y.-H. Chen, T. Krishna, J. Emer, and V. Sze, Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks, ISSCC
28 Are We Ready?? Source: 28
29 State-of-the Art Custom Hardware Y.-H. Chen, T. Krishna, J. Emer, and V. Sze, Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks, ISSCC
30 30 Digital Multiplier
31 Motivation for Mixed-Signal Compute R. Sarpeshkar, Analog Versus Digital: Extrapolating from Electronics to Neurobiology 31
32 Charge Domain Dot Product Kernel Externally digital, internally analog compute block Amenable for digital CMOS VLSI integration ADC energy amortized over several multipliers Multiply via multi-phase charge redistribution Add via passive charge sharing among multipliers SIGN Q P 8C u 4C u 2C u C u + Small unit caps < 1fF V DD /2 v OD Expecting total energy of ~2pJ for 16x8b MAC SIGN 8C u 4C u 2C u C u Q N Murmann, Bankman, et al., Asilomar
33 Example: 12 x 9 8C u 4C u 2C u C u RESET Q W = 12C u V ref V REF 8C u 4C u 2C u C u INW V W = V ref 8C u 4C u 2C u C u SHARE Q WX = V ref 9C u 8C u 4C u 2C u C u INX (Logical inverse of 9) V WX = V ref 8C u 4C u 2C u C u SHARE Reference: D. Bankman and B. Murmann, Electronics Letters, vol. 51, no. 5, pp , March
34 Summary The transition to the third paradigm brings interesting opportunities and challenges Mixed-signal IC design is no exception FDSOI technology offers significant benefits toward addressing the resulting needs Ultra low-power fog computing Densely integrated, low-power analog interfaces Universal radios Ultra high-speed ADCs 34
35 35 Questions?
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