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1 EEE598 Molecular Electronics

2 Some Information about the Course Instructor: Dr. Nongjian Tao Where: ECA 219 When: TTH 12:00 1:15 pm Office Hours: TTH 1:30-2:30 p.m. or by appointment. Office Location: GWC 618 Class Website: p b2008.htm

3 Prerequisites Basic quantum physics (e.g., EEE434) General chemistry Solid state electronics (e.g. EEE436)

4 Course Objectives Introduction to the frontiers in molecular electronics Interdisciplinary approaches Fundamental aspects of molecular electronics

5 Textbooks There is no prescribed textbook tb for the course, but reference books and materials are listed below: "Quantum chemistry", Ira N. Levine, Allyn and Bacon, "The Chemical Bond", J.N. Murrell, S.F.A. Kettle and J.M. Tedder, John Wiley & Sons, "Superamolecular Chemistry", J. W. Steed and J.L. Atwood, John Wiley & Sons, "Designing the Molecular World", P. Ball, Princeton University Press, "Introduction to Solid-State Physics", C. Kittle, John Wiley & Sons, "Introduction to Mesoscopic Physics", Y. Imry, Oxford University press, "Transport in Nanostructures", D.K. Ferry and S.M. Goodnick, Cambridge University Press, "Intermolecular Surface Forces", J. Israelachvili, Academic Press, 1991.

6 Homework: 10% Grading Quiz I, II and III: 60% Final Exam (term paper + Presentation): ti 30% Homework Assignments Homework assignments will usually be given in class and posted also on the class web page.

7 Materials to be Covered Introduction Molecular Electronics States Electron Transport in Molecules l Molecular Devices Special Topics

8 1. Introduction What is molecular electronics? Why molecular electronics? Why now? When are we going to have it?

html What I want to talk about is the problem of What I want to

9 Introduction Feynman s Talkin1959: There is Plenty of Room at the Bottom What I want to talk about is the problem of What I want to talk about is the problem of manipulating and controlling things on a small scale.

10 Dip Pen Lithography- Chad Mirkin

11 Why cannot we write the entire 24 volumes of the Encyclopedia Brittanica on the head of a pin? Mass Storage Device. - each dot is about 10 nm wide, 1000 atoms. - DNA uses 50 atoms for a bit. - STM can use a single atom! (IBM) I don't know how to do this on a small scale in a practical way, but I do know that computing machines are very large; they fill rooms. Why can't we make them very small?! Miniaturizing computers

12 What are the possibilities of small but movable machines? Nanoelectromachanical Systems How do we make such a tiny machine? I leave that to you. - It is MOLECULAR ELECRONICS!?

13 Acceptor Donor

14 Why Molecular Electronics? Semiconductor devices shrink to the nano-scale Transi stor Size 1 cm 1 µm 100 nm 1-5nm Year If current trend continues, it will reach molecular l scale in two decades. There are many molecules with interesting electronic properties.

15 Single-Electron Memory Cell Au e - Heme group Fe e - +3 Fe +2

16 Molecular Abacus The bead can be reversibly switched between two positions by ph. Ashton et al. JACS, 120, 11932(1998)

17 Molecular Motor Molecular Oscillator Angew. Chem., Int. Ed. 2000, 39,

18 Molecular Sensor Molecular Recognition: A capability that Si lacks K Ag + K+ K + K Ag + K + Crown ether A small difference in the diameters of the K + and Ag + can cause a huge difference in the binding capacity

19 Homework 1.1). Read Feynman s Talk in 1959: There is Plenty of Room at the Bottom. 1.2). To write the entire 24 volumes of the Encyclopedia Brittanica on the head of a pin, how small each bit has to be? 1.3) Read Angew. Chem., Int. Ed. 2000, 39, N E ill i l i Note: Exams will cover materials in your reading assignments!

20 What is Next M l l El t i St t Molecular Electronics States or Energy Diagram!

21 Review: The MOSFET The pn junction we have studied so far is a TWO TERMINAL device in which current flow is regulated by applying a voltage across the source and drain * Many semiconductor devices are THREE-TERMINAL structures however in which the current flow between source and drain is regulated by varying the voltage applied to a control GATE * An example of such a device is the METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR (MOSFET) a schematic diagram of which is shown below 0 V V g V d > 0 p + or n + Si METALGATE OXIDE LAYER n- or p-type Si 0 V p + or n + Si A schematic illustration of the MOSFET The substrate may be either p-type or n-type but the contacts must be made of oppositely doped material the MOSFET therefore looks like two pn junctions that are connected back-to-back unless stated otherwise we will always assume that the source (left contact) is grounded while the drain (right contact) is positively biased with a voltage v d

22 Energy-Band Structure of the MOSFET In order to understand the operation of the MOSFET we need to consider the details of its ENERGY-BAND structure * Shown below are the energy levels of the different components of the MOSFET and the resulting band structure of the final device For simplicity we assume that the workfunction of the metal and semiconductor are initially the SAME and that the semiconductor is n-type We also treat the insulating oxide layer as a WIDE-GAP semiconductor VACUUM LEVEL VACUUM LEVEL E c Φ m Φ s Ec E F E c E F E F E v E v E v METAL OXIDE SEMICONDUCTOR (vertical lines denote material surfaces) MOSFET BAND STRUCTURE

23 Application of a positive gate voltage LOWERS the Fermi level in the metal but leaves that in the semiconductor UNAFFECTED since NO current flows across the MOS boundary * The positive gate voltage therefore causes the energy bands of the semiconductor and the insulating layer to bend DOWNWARDS as the metal is approached Note that the band bending in the oxide layer varies LINEARLY as a function of position since there is assumed to be NO charge present in this layer E c E F E c E F V g = 0 E i V g > 0 Ev E v E i

24 The band-bending diagram clearly illustrates that with a positive voltage applied to the gate the electron concentration in the semiconductor is ENHANCED near the oxide interface * The Fermi level lies CLOSER to the conduction band near the interface and the positive gate voltage is said to cause ACCUMULATION since it increases the MAJORITY carrier concentration near the interface * Similar arguments show that a NEGATIVE gate voltages RAISES the Fermi level in the metal causing the energy bands in the oxide and semiconductor to bend UPWARDS Now the gate voltage causes DEPLETION of majority carriers at the interface E c E F E i V g < 0 E c E F E i V g > 0 E v E v ACCUMULATION MODE DEPLETION MODE

25 An effect known as INVERSION occurs when the negative voltage applied to the gate is increased sufficiently * Eventually the Fermi level will lie closer to the VALENCE band at the interface and the HOLE concentration at this surface will exceed the electron concentration! In such a situation we have INVERTED the majority carriers at the interface * The CROSSOVER from depletion to inversion occurs once the Fermi level in the semiconductor DROPS BELOW the intrinsic Fermi level energy band bending in the n-type semiconductor of a MOS capacitor with a large negative voltage applied to the metal gate x o x E c E F E I E v at the point x o the equilibrium Fermi level in the semiconductor coincides with the intrinsic Fermi level forvaluesofxgreater of than x o the Fermi level lies closer to the conduction band and the majority carriers are electrons for values of x less than x o the Fermi level lies closer to the valence band and the majority carriers are holes for values of x less than x o the semiconductor is thus inverted

26 MOSFET Operation To illustrate the principles of MOSFET operation we now consider the case of a structure formed on a p- TYPE substrate * Below we show the energy-band structure of the MOSFET in the case where NO voltage is applied to its gate This structure is easily drawn by realizing that the MOSFET LOOKS like two BACK-TO-BACK pn junctions Note from this band diagram that an energy BARRIER exists that BLOCKS electron flow between the two n + contacts 0 V V g V d = 0 METALGATE OXIDE LAYER n + Si n + Si E c E F p-type Si E v 0 V n-type p-type n-type

27 With a POSITIVE voltage applied to the gate ELECTRONS are induced underneath it and a continuous CHANNEL eventually forms between the n + contacts * Equivalently we may imagine that the gate voltage LOWERS the energy barrier to current flow This occurs once the gate voltage exceeds some THRESHOLD value V T the figure left shows the energy bands of a p-type MOSFET when a positive voltage is applied to the gate E c E F the energy barrier to diffusion is lowered allowing for a flow of current between the n-type contacts this is said to be an example of an enhancement-mode MOSFET since a gate voltage is required to induce the formation of an electron channel underneath the gate E v n-type p-type n-type other types of devices known as depletion-mode MOSFETS already have a continuous channel at zero gate voltage and the gate is then used to turn off the flow of current through h the device

28 The current flowing through the MOSFET also depends on the value of the DRAIN VOLTAGE * Begin by considering a MOSFET in which the drain potential is set to zero and for which the gate voltage EQUALS the threshold value V T In this case a UNIFORM channel is formed between the n-type contacts * With a POSITIVE drain voltage applied however the voltage drop between the gate and the channel reduces from V T near the source to V T -V d near the drain T T d The channel therefore PINCHES OFF in the region near the drain 0 V V g V d = 0 n + Si METALGATE OXIDE LAYER p-type Si n + Si 0 V V g V d > 0 n + Si METALGATE OXIDE LAYER p-type Si n + Si

29 The current flowing through the MOSFET therefore exhibits different behavior as we vary the DRAIN voltage * For SMALL drain voltages the current increases LINEARLY with drain voltage since the electron channel between the contacts remains CONTINUOUS * As the drain voltage is increased however the current eventually SATURATES as the channel pinches off The current in this regime is carried by electrons that are pulled into the pinch-off region and travel at the co-called SATURATION drift velocity because of the HIGH electric field that exists along the channel 0 V V g V d > 0 METALGATE OXIDE LAYER I d LINEAR SATURATED V g > V T n + Si p-type Si n + Si V d Variation of channel current as a function of drain voltage in a typical mosfet

30 As the gate voltage is INCREASED beyond the threshold for formation of the electron channel the current flowing at any given drain voltages also INCREASES * This is since the MOSFET may be considered as a variable resistor whose resistance is tuned by means of fthe gate voltage * As the gate voltage is increased the value of the drain voltage for which the saturation occurs also INCREASES Since a more positive drain voltage is required to pinch off the THICKER electron channel 0V V V d =0 V g METALGATE OXIDE LAYER n + Si n + Si I d INCREASING V g INCREASING V g V d Increasing the gate voltage beyond threshold creates a thicker electron channel Consequently the channel pinches off at a higher drain voltage

Semiconductor Physics and Devices

Semiconductor Physics and Devices Metal-Semiconductor and Semiconductor Heterojunctions The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is one of two major types of transistors. The MOSFET is used in digital circuit, because