AN1326 APPLICATION NOTE

Transcription

1 AN36 APPLICATION NOTE L6565 QUASI-RESONANT CONTROLLER by Claudio Adragna A variable frequency version of flyback converer, commonly known as Quasi-resonan (QR) ZVS flyback, is largely used in cerain applicaions, such as SMPS for TV, hough i is well suied for oher applicaions oo. This peculiar opology feaures several meris. Besides he ohers, which will be highlighed in he ex, one of hem is o be a simple derivaive of he sandard square-wave flyback, well known o every SMPS designer. Afer deriving he equaions governing QR ZVS flyback opology and dealing wih he relaed issues, ST's L6565, a PWM conroller specifically designed o fi his paricular opology, will be presened and is inernal funcions discussed in deails. Some clues on he design based on his device will be provided and, finally, a design example will be given ha will show how easy and cos-effecive such L6565-based sysems are. INTRODUCTION Over he pas wo decades pleny of resonan and quasi-resonan converers have been developed and proposed as an answer o he difficulies raised by square-wave converers, especially hose relaed o heir parasiic elemens. The basic idea is o pu hese parasiics in use. The core of boh classes of converers is a ank circui. Unlike resonan converers, where i akes par acively in he power conversion process, quasi-resonan converers use he ank circui only o creae eiher a zerovolage or a zero-curren condiion for he power swich, o urn on or urn off respecively. The exising ypes of quasi-resonan converers can be hen classified as eiher Zero-Volage Swiching urn-on (ZVS) or Zero-Curren Swiching urn-off (ZCS) converers. In ZVS converers he power swich is dynamically conneced in parallel o he ank circui. The superposiion of he resonan volage across he ank circui (and he swich, while i is in off sae) on he DC inpu volage generaes he zero-volage condiion for he swich o urn on. Conversely, in ZCS converers he power swich is conneced in series o he ank circui. The superposiion of he resonan curren flowing hrough he ank circui (and he swich, while i is in on sae) on he normal curren flow generaes he zero-curren condiion for he swich o urn off. An ineresing propery of quasi-resonan converers is ha hey will be urned back ino a normal square-wave converer if he ank circui is removed. Vice versa, a quasi-resonan converer can be obained saring from a normal square-wave opology. QR ZVS FLYBACK TOPOLOGY In principle here are many ways o make a quasi-resonan (QR) ZVS flyback converer, bu mos of hem are no suiable for offline applicaions because of he oo high volages involved. Wih he above-menioned propery in mind, i is possible o derive a QR version saring from a sandard square-wave flyback power sage and poining ou is major parasiic elemens, as illusraed in figure. L lk is he leakage inducance, which represens he magneic flux generaed by he primary winding and no coupled o he secondary. I sores energy ha will no be delivered o he secondary and ha needs o be ransferred or dissipaed elsewhere. Besides, i prevens a porion of he energy sored in he muual inducance L m (which is perfecly coupled o he secondary) from being ransferred o he secondary and delays he energy ransfer process. The energy sored in L lk is he cause of he large overvolage spike on he MOSFET's drain a urn-off. November 00 /34

2 Figure. Flyback power sage wih major parasiics (a) and V DS waveform wih fixed frequency, DCM (b). Lp Lm Ls Vf Vou VDS Llk & Cd = 0 Lp & Cd VDSs Cin Llk VR Vin Rp Vin VR Cd VDS VDSmin Tv TON TFW TOFF T a) b) C d is he oal capaciance of he drain node. I is he sum of he MOSFET's C oss, ransformer inrawinding capaciance, sray capaciance due o he layou of he circui (e.g. a heasink) as well as oher conribuions refleced from he secondary side, such as an R-C damper on he recifier diode. Acually, C oss is modulaed by he drain volage bu he variaion becomes significan a very low V DS values and he impac is however limied. Therefore, i is possible o assume for C oss he value specified usually a V DS = 5V by manufacurers. C d is discharged inside he MOSFET as i is urned on, hus causing a curren spike. This spike no only gives origin o addiional losses in he MOSFET bu may also cause noise problems, especially in case of curren mode conrol and under ligh load condiions. R p is he resisance of he primary side mesh, mosly locaed in he primary winding. I is imporan o noice ha he resisance of he primary winding has o accoun no only for he ohmic resisance of he wire bu also for he high frequency effecs in copper (skin and proximiy), he magneic maerial losses (hyseresis and eddy currens) and radiaion. A leas a couple of ank circuis can be hen idenified in he schemaic, whose effec is conspicuous on he drain volage waveform in Disconinuous Conducion Mode (DCM) operaion (see figure b). The firs one shows up afer he overvolage spike a MOSFET urn-off and is due o he resonance of L lk, jus demagneized, wih C d. The drain volage falls in under dumped fashion from he peak o he seling value: V DSs = V in + V R = V in + n (V ou + V f ) () where V in is he DC inpu volage, V R he so-called refleced volage, n he primary-o-secondary urn raio, V ou he regulaed oupu volage of he converer and V f he forward drop across he secondary recifier. The second ank circui, made up of L p and C d, resonaes as he secondary winding has run dry of energy, hus he secondary recifier no longer conducs, and boh windings are open. In principle, i is an RLC circui and he drain volage follows he naural evoluion of such circui saring from he condiion of C d charged a V = 0 (see waveform in figure b). R p is normally by far less han he criical damping impedance of he ank circui, hus he equaion describing he under-damped evoluion of he drain volage is: V DS () V in + V R e -α cos( π f r ) where: α = R p , () L p f r = π L p C d (3) /34

3 are he decay facor and he resonance frequency, respecively. The firs valley of he resonance occurs a = T v, where T v can be derived from: cos( π f r T v ) = T v = = π L ; (4) f p C d r A ha poin, he drain volage experiences an absolue minimum, given by V DSmin V in - V R wih good approximaion ( e -α Tv ). Therefore, a zero-volage condiion can be generaed provided ha: V DSmin 0 V R V in (5) and, if he sysem is conrolled so ha he MOSFET is swiched on as he drain volage reaches eiher zero or he minimum of he firs valley, a QR ZVS converer will be obained. The resuling waveforms are shown in figure. Figure. (a) Typical QR waveforms; (b) How V in affecs ZVS condiions. VDS VR Vin=Vin Vin VDS Vin=Vin I IPKs Pri Sec Vin Vin IPKp NO ZVS! ZVS TON TFW Tv T = / fsw a) b) I is worhwhile noicing ha he operaion of he ank circui depends only on circui parameers and no on he operaing condiions of he converer. The inpu volage jus impacs on he zero-volage condiion, as saed by eqn. 5 and shown in figure b. The key poin o generae such kind of funcionaliy is o synchronize MOSFET's urn-on o he ransformer demagneizaion afer an appropriae delay (T v ), which can be done jus by deecing he negaive-going porion of V DS (). Therefore, in principle, any PWM conroller wih synchronizaion capabiliy can be used o conrol his kind of converer. The L6565, in paricular, is provided wih a dedicaed pin (ZCD) ha allows doing he job wih a very simple inerface, jus one resisor. Variable frequency operaion - as a resul of inpu volage and/or oupu curren changes - is inheren in such funcionaliy. The sysem works close o he boundary beween DCM and CCM (Coninuous Conducion Mode) operaion of he ransformer. This is wha is oherwise called TM (Transiion Mode) operaion. The shorer T v is, compared wih he ON and OFF imes of he MOSFET, he closer o TM he operaion will be. Hence his QR ZVS flyback converer can be idenified wih he TM flyback converer menioned in [], as well as wih he wellknown self-oscillaing flyback or Ringing Choke Converer (RCC). As opposed o fixed-frequency sandard flyback converer, his approach o quasi-resonance has several advanages. The main benefi probably concerns conduced EMI emissions. In mains operaed applicaions, due o he ripple appearing across he inpu bulk capacior, he swiching frequency is modulaed a wice he mains frequency f L, wih a deph depending on he ripple ampliude. This causes he specrum o be spread over frequency 3/34

4 bands, raher han being concenraed on single frequency values. Especially when measuring conduced emissions wih he average deecion mehod, he level reducion can be of several dbµv. Figure 3 shows a comparison made on he same L6565-based SMPS, fixed frequency firs and hen QR-operaed. I is hen possible o reduce he size and he cos of he EMI filer. Figure 3. Conduced EMI (average deecion): a) fixed-frequency operaion; b) QR operaion. a) b) Anoher imporan benefi is a high safey degree under shor circui condiions: since he conducion cycles of he MOSFET are inhibied unil he ransformer is fully demagneized, flux runaway and, herefore, ransformer sauraion are no possible. Moreover, as during a shor circui he demagneizaion volage is very low, he sysem will be led o work a a very low frequency, wih a very small duy cycle. As a resul, he power ha he converer will be able o carry is very low. Addiionally, QR approach makes use of he oherwise undesirable parasiic drain capaciance o generae a zero-volage condiion ha minimizes urn-on losses of he MOSFET. An exernal capacior may be added in parallel o he MOSFET or across he primary winding. This will reduce he impac ha he spread of he parasiic C d has on f r, smooh he negaive-going edge of he drain volage afer ransformer's demagneizaion (in he ineress of EMI) and reduce he dv/d a urn-off, wih he benefi of lower urn-off losses and EMI generaion. Finally, he way he sysem processes power does no change, hus designer's experience wih sandard flyback can be fully exploied and here is very lile addiional know-how needed. To complee he picure, i mus be said ha here are also some drawbacks. The sysem acually works in DCM, hus currens' peak and RMS values are quie high: his will resul mainly in higher conducion losses in he MOSFET and greaer high frequency losses in he ransformer. This suggess no using his approach for power levels above 0-50W in wide range mains applicaions and above 00 W wih European mains. Furhermore, he high operaing frequency when he converer is lighly loaded parly cancels he advanages of he ZVS in erms of power losses. Finally, while in a sandard flyback he design can be opimized in order for a 600V-raed MOSFET o be used in European or wide range mains applicaions, opimizing he design in a QR sysem will likely lead o he use of a more expensive 800 V-raed MOSFET. In he following, he opology's operaion will be discussed in deails and a se of equaions useful for he design will be given. Then he use of he L6565, a PWM conroller specific for his paricular opology, will be discussed in deails. Finally, an applicaion (an SMPS for TV) will be developed and he evaluaion resul of is prooype, as well as some significan waveforms, will be presened. QR OPERATION: TIMING AND ENERGETIC RELATIONSHIPS To generae he equaions governing he operaion of a QR ZVS flyback converer, wih he aim of providing a design mehod, some simplifying assumpions will be made: ) Fall and rise imes of boh volage and curren waveforms are negligible. ) Transformer's non-idealiies will be negleced (no delay in he primary-o-secondary energy ransfer, peak secondary curren proporional o he primary one depending on primary-o-secondary urn raio n). 3) The sysem is conrolled so ha he ime elapsed from ransformer's demagneizaion o MOSFET's urn-on is kep equal o T v, eqn. (4), under all operaing condiions. 4/34

5 Tha being saed, i will be useful o refer o he simplified schemaic of figure 4 as well as he waveforms of figure. The ON-ime of he MOSFET is expressed by: L p I PKp T ON = (6) V in Afer T ON has elapsed he MOSFET is urned off and energy is ransferred o he secondary winding. The ime needed for he discharge of his energy o he oupu, referred o as "freewheeling ime", will be: L p L s I PKs n ( n I PKp ) T FW = = = V ou + V f V ou + V f L p I PKp , (7) V R where L s is he inducance of he secondary winding and I PKs he peak secondary curren. Figure 4. Block diagram of an L6565-based QR ZVS flyback converer. +Vin Lp Ls Vou ZCD VFF INV 3.5V LINE VOLTAGE FEEDFORWARD + E/A - 5 ZCD + STARTER - PWM COMPARATOR L6565 sarer STOP S R Q rese dominan 6 DRIVER 7 4 GD CS Rs E/A COMPENSATION NETWORK COMP GND ISOLATED FEEDBACK The oal conversion cycle period T SW is he sum of T ON, T FW and T v, and he swiching frequency is: f SW = = T SW (8) T ON + T OFF + T v Since he sysem acually works in DCM, he peak primary curren is relaed o he inpu power of he converer, P in (more precisely, o ransformer's inpu power), according o he well-known relaionship: P in = -- L. (9) p I PKp f SW By subsiuing (4), (6) and (7) in (8) and combining wih (9), he swiching frequency can be expressed as a funcion of he characerisic parameers of he circui (L p, V R, f r ) and of he operaing condiions (P in, V in ). The resul can be convenienly expressed in he following erms: f T f SW = , (0) f T ---- f T where: f r f r f T = P in L p V in V R () 5/34

6 is he "ransiion frequency", ha is he frequency he sysem would work a if f r T v = 0, which would occur if C d = 0. The name comes from he fac ha his frequency is characerisic of TM operaion. Acually, in case f T << fr, i is possible o esimae f sw by using eqn. () insead of he more complex formula (0). The wo quaniies become more and more differen as he raio f T / f r increases (see he righ diagram of figure 5), ha is as he delay T v becomes a significan porion of he swiching period T sw. Figure 5. Swiching frequency vs. operaing condiions (lef) and f sw vs. f T (righ) relaionships 5 0. Pinmax Pinmax 0.8 fsw fswmin Pinmax fsw ft 0.6 Pinmax The swiching frequency f sw changes wih he operaing condiions in so far as he ransiion frequency f T changes, as shown in he lef diagram of figure 5. Eqn. () shows ha he minimum value of f sw, f swmin, which is usually a design consrain, will be reached a maximum inpu power (P inmax ) when he inpu volage V in is a is minimum, V inmin. Being he converer operaed from he AC mains, V inmin is he valley volage across he inpu bulk capacior. Therefore, o fulfill he design requiremen concerning he minimum operaing frequency, he primary inducance L p will be seleced no exceeding he following upper limi: L pmax = , () P in max f sw min V in min V π f C + sw min d R The equaions ha provide he quaniies of ineres in he design of a QR ZVS flyback converer can be easily derived considering ha he sysem is inherenly of DCM ype, alhough working a a frequency subjec o change wih he operaing condiions. Table summarizes hese relaionships. Table. Main Elecrical Quaniies in QR ZVS Flyback Converers Parameer Primary Side Secondary Side Duy Cycle Vin Vinmin D = P V in L p f sw D' = P in V ou L p f sw R ft fr Peak Curren 3 DC Curren 4 Toal RMS Curren P I in DCs I PKp = I PKs = L p f sw D' P I DCp = -- I PKp D ou I DCs = V ou D I RMSp = I PKp --- D' 3 I RMSs = I PKs AC RMS Curren I ACp = I RMSp I DCp I ACs = I RMSs I DCs 6 Peak Volage V PKDS = V in + V R + V spike V REV V ou V in = V R 7 Swiching frequency modulaion deph f sw f r f sw V R V in = f sw f r + f sw V R + V in V in 6/34

7 Once he swiching frequency has been found from (0), or simply from () if ha is he case, all of he quaniies lised in he able can be easily calculaed. Obviously, curren sresses will be calculaed a minimum inpu volage and maximum load, while volage sresses will be calculaed a maximum inpu volage. P ou is he power delivered o he load, while he inpu power P in ha appears explicily or no in all of he relaionships should be he one processed by he primary side of he ransformer. This is he sum of he power coming ou of he secondary side, ha los inside he ransformer due o copper and ferrie losses and he one no ransferred (and mosly dissipaed in a clamping circui) because of he leakage inducance. A ransformer efficiency η could be esimaed, such ha: V f P ou V ou P in = (3) η The efficiency η is usually quie high, ypically 9 o 98%, depending on ransformer's size and consrucion echnique. If a design-ime he designer feels more confiden of esimaing converer's overall efficiency η raher han ransformer's η, Pin can be considered as he inpu power of he converer, ha is he raio of P ou o η, wih accepable approximaion. QR OPERATION: CONVERTER'S POWER CAPABILITY AND L6565'S LINE FEEDFORWARD FUNCTION Curren-mode conrol will be used, hus he maximum power ha he sysem is able o deliver o he oupu (P inlim ), ha is is power capabiliy, is conrolled by means of pulse-by-pulse curren limiaion. This is usually done by clamping he conrol volage ha programs he peak primary curren I PKp a a fixed value V csx, in his way limiing he maximum peak primary curren I PKpmax. In fixed-frequency DCM flyback converers, his provides a power capabiliy ha, ideally, is independen of he inpu volage V in. Acually, here is a sligh dependence due o he inernal propagaion delay of he conroller and he MOSFET's urn-off delay (00 o 500 ns overall). Differenly, in QR ZVS flyback even in he ideal case of no delay, power capabiliy srongly depends on he inpu volage. In wide-range mains applicaions his can be an issue. The siuaion is illusraed in figure 6a. The upper race shows he primary curren waveform a minimum inpu volage: he peak curren is close o he maximum, hus jus a small exra oupu power will rip he curren limiaion circui. The lower race shows he primary curren waveform under he same load condiions a maximum inpu volage. Being he swiching frequency higher, hen he peak curren will be lower: a much larger power will be allowed o pass before pulse-by-pulse limiaion is ripped. Figure 6. a) Primary curren a min. and max. inpu volage; b) Power capabiliy vs. inpu volage IPKpmax. Tdelay = 400 ns IPKpmax Vin Vinmin Tdelay = 0. a) The effec of such delay is shown in figure 6b, where P inlim vs. V in is shown for boh zero and 400 ns delay in a ypical design (V in = 00 o 400V; P inlim = 5W, f swmin = 00 khz, L p = 0µH, V R = 50V, C d =.5nF). Even ideally (T delay = 0), a 400V inpu he power hroughpu ha rips he pulse-by-pulse curren limiaion is abou.65 imes higher han wha needed a 00V. Accouning for he delay he limi rises a. imes. b) Vin Vinmin 7/34

8 To overcome his problem, he L6565 has he Line Feedforward funcion available. I acs on he clamp level of he conrol volage V csx, ha is on he overcurren sepoin, so ha i is a funcion of he converer's inpu volage, sensed hrough a dedicaed pin (#3, VFF): he higher he inpu volage, he lower he sepoin. The diagram of figure 7a shows he relaionship beween he volage a he pin VFF and V csx (wih he error amplifier sauraed high in he aemp of keeping oupu volage regulaion). The schemaic in figure 7b shows how he funcion is included in he conrol loop. Figure 7. a) Overcurren sepoin vs. VFF volage; b) Line Feedforward funcion block Vcsx [V].5 VCOMP = Upper clamp +Vin R R Rs COMP VFF CS ZCD STARTER sarer STOP VVFF [V] ZCD S INV VOLTAGE Q DRIVER - FEED PWM R E/A FORWARD + (rese-dominan).5v Quaniaively, he maximum power capabiliy P inlim can be expressed by means of eqns. (6), (7) and (8), in which I PKp = I PKpmax, subsiued in (9): I PKp max P in lim = -- L. (4) p I PKp max L p V in V T v R Ideally, he maximum peak primary curren I PKpmax (which should slighly exceed he value derived from line in V in = V inmin ) would be equal o V csx /Rs, however he inernal propagaion delay as well as he MOS- FET's urn-off delay, has o be accouned for. This causes he acual I PKpmax o exceed he ideal value by an amoun proporional o he inpu volage: I PKp max = V csx Rs V in T. (5) L delay p The Line Feedforward block combines he volage a pin VFF (proporional o he converer's inpu volage) wih he E/A oupu, hus deermining he inernal reference (V cs ) for he PWM comparaor, according o he following relaionship: V cs = 0.6 (V COMP -.5) (3 - V VFF ) (6) V Hiccup - DISABLE 7 L6565 GD Noe ha in his equaion V COMP is.5v and V VFF is 3V. Ideally, if eiher V COMP =.5 or V VFF = 3 he resul is V cs = 0, which forces he L6565 o sop swiching. Acually eqn. (6) is no very accurae when eiher V COMP or V VFF ge close o heir respecive limis: he effec of offses and some non-lineariy becomes significan. Thus he real V cs = 0 condiion and he swiching haling may occur for values of V COMP slighly below.5v and values of V VFF slighly above 3V The overcurren sepoin (V csx ), graphically illusraed in he diagram of figure 7a, can be found considering he error amplifier a he limi of is linear dynamics (V COMP 5.4V). The resuling analyical V csx vs. V VFF relaionship is: V csx = (3 - V VFF ) = (3 - k V in ), (7) where k is he divider raio R/(R+R). If his funcion is no needed for any reason, e.g. because of a narrow inpu volage range, he pin will be grounded. The overcurren sepoin will be se a V csx =.4V regardless of he converer's inpu volage. 8/34

9 Figure 8. Correcion characerisics of Line Feedforward.5 k=0 Vin Vinmin.5 k= k= k= opimum value k= Vin Vinmin The diagram of figure 6b, as well as equaions 4 and 5, shows a non-linear relaionship beween P inlim, V in and V csx, hence he linear correcion (7) will no resul in a perfec compensaion. A considerable reducion of he power capabiliy change over he inpu volage range will be achieved anyway. Figure 8 shows he effec of he compensaion circui on he converer's power capabiliy for differen values of k (a T delay of 400 ns is assumed) in he ypical design previously considered. The opimum value of k, k op, which minimizes he power capabiliy variaion over he inpu volage range, could be found by combining equaions 4, 5 and 7, imposing ha he value of P inlim is he same a he exremes of he inpu volage range and solving for k. However, he value of he sense resisor Rs, which appears in (5), is a funcion of k op in urn. The exac calculaion is very complex, and non-idealiies shif he acual opimum value from he heoreical one. I is herefore more pracical o provide a firs cu value, simple o be calculaed. Then, Rs will be chosen on his basis and k op found empirically. A grea simplificaion comes from assuming T v = 0 (exac TM operaion) and T delay = 0; k op will hen be: V R k op = V in min V in max + ( V in min + V in max ) V R (8) Wih k = k op, he maximum value of P inlim, reached a: 3 V in = V inx = V R V R , (9) k V R op exceeds P V in = V inmin (= P V in = V inmax ) by abou 0%. I is worhwhile poining ou ha, for given inpu volage range and delay, his resul does no depend on he specific design, only k op changes. The value of Rs, can be deermined from (5), again wih T delay = 0, resuling in: Rs k op V inmin = (0) I PKpmax The approximae calculaion yields a value of kop equal o , abou 3% less han he exac value I can be a useful rule of humb o use he value resuling from (8) increased by 0% as he saring poin. Afer choosing Rs, he value of k op can be fine-uned experimenally o minimize converer's power capabiliy changes over he inpu volage range. To do so, i is necessary o check he power level where he converer loses regulaion jus a minimum and maximum inpu volage and adjus k (e.g. using a rimmer) so as o make hem equal. This could require, in urn, a modificaion of Rs, because he power level achieved in he previous sep is slighly higher or lower han he arge, hus some ieraion migh be needed. The values of R and R will be high enough o minimize he power dissipaed on hem, especially if here are requiremens on he converer's efficiency under ligh load or no-load condiions. The small-signal conrol-o-oupu-gain of he Line Feedforward block, needed for sabiliy analysis, can be deermined by differeniaion of he large-signal model (6) and considering ha V VFF = k op V in : vˆcs G FF = = 0.6 ( 3 k op V in ) vˆcomp (a) 9/34

10 Line Feedforward improves also he inpu ripple rejecion abiliy of he sysem and limis he variaion of he gainbandwidh produc of he small-signal conrol-o-oupu ransfer funcion wih he inpu volage (see APPENDIX). The small-signal line-o-oupu gain of he block is found again by differeniaion of (6): G' FF vˆcs = = 0.6k op ( V COMP.5) = vˆin k op 3 k op V V. cs in (b) QR OPERATION: BEHAVIOR UNDER SHORT CIRCUIT CONDITIONS As previously said, a QR flyback converer operaes safely under shor circui condiions a he oupu. The reason of ha is ha any new conducion of he MOSFET is inhibied as long as he ransformer is no fully demagneized. Equaion 7, which is here recalled: L P I PKp L P I PKp T FW = = , V R n ( V ou + V f ) shows ha, as he overload is progressively increased, he demagneizaion ime T FW ges longer and longer: I PKp is kep consan by he pulse-by-pulse limiaion and he oupu volage drops because he sysem is ou of regulaion. However, if T FW exceeds he period T START of he inernal sarer, he MOSFET will be swiched on before he demagneizaion is complee. In some cases, before T FW > T START, he refleced volage V R can be so low ha he oscillaion on he ZCD pin can no longer arm he inernal circui. Whichever condiion is me firs, he converer will be forced o work a he frequency of he inernal sarer (/ T START ) and, likely, in CCM. Flux runaway, hough now heoreically possible, is however exremely unlikely. Referring o [] for he deails of he calculaions, he flux runaway condiion for a dead shor a he oupu is: n V f T ONmin , V in + V f T START which is very ough o mee in normal offline applicaions, as one can easily see by using sensible values for n, V in and V f. T ONmin is he minimum ON-Time ha he L6565 can provide because of is inernal delays and MOS- FETS s Turn-Off delay, usually around ns. To guaranee he operaion described so far, he L6565 blanks he ZCD inpu for some ime (3.5 µs min.) afer he MOSFET has been urned off. In his way, siuaions like he one shown in figure 9a, relevan o a shor circui in a 50W converer using a conroller no provided wih his safey feaure, are prevened. In ha picure i is possible o see ha he sysem is deecing he demagneizaion of he leakage inducance and no ha of he primary inducance. This causes a very high frequency operaion - insead of a very low one - ha has led o ransformer sauraion: he primary curren reaches a peak of 8A in 400 ns wih a slope poining ou only 5 µh inducance (he overcurren sepoin was A, he primary inducance was 400 µh). Figure 9. Shor circui waveforms in a sysem a) wihou ZCD blanking; b) wih ZCD blanking Primary curren Primary curren (zoomed) LLK 5 µh Leakage inducance demagneizaion TON TBLANK Drain volage (zoomed) Drain volage Primary curren Vin = 300 V Vin = 300 V Inernal sarer period Drain volage TONmin ON OFF Duy cycle % fsw 550 khz ZCD circui delay a) b) 0/34

11 Figure 9b shows insead he operaion previously described, allowed by he L6565, where he converer works a he frequency of he inernal sarer wih a duy cycle of abou %. Dangerous shor circui condiions occur when here is an isolaion failure on he secondary winding, e.g. due o a damaged wire coaing, or when he secondary diode fails shor (ypical of axial diodes). Boh of hese failures reflec a shor circui o he ransformer's primary side while he MOSFET is urned on []. The primary curren rae of rise is hen limied only by he leakage inducance of he ransformer, like in figure 9a. If no properly handled, his very likely leads o he desrucion of he sysem. To proec he converer in he even of such failure, a comparaor (shown in fig. 7b) senses he volage on he curren sense inpu and disables he gae driver if his volage exceeds he nd level OCP, fixed a V. To reenable he driver, firs he IC mus be urned off and hen resared: in oher words, he Vcc volage mus fall below he UVLO hreshold and hen exceed again he sar-up hreshold. Wih he gae driver disabled he quiescen curren of he IC is unchanged and, since no energy is coming from he self-supply circui, he Vcc capacior will be discharged below he UVLO hreshold afer some ime (see pin 8 in "L6565 pin usage" secion). Then he device will iniiae a new sar-up cycle. This will resul in a low-frequency inermien operaion (Hiccup-mode operaion), wih very low sress on he power circui. QR OPERATION: HIGH SWITCHING FREQUENCY AT LIGHT LOAD AND L6565'S FREQUENCY FOLD- BACK FUNCTION Equaions (6) and (7) show ha T ON and T FW can be however shor if I PKp (i.e. he load) ends o zero, in which case f T and f sw fr. Alhough in he real-world operaion he maximum swiching frequency would be significanly lower han his heoreical limi, i could be of some hundred khz and cause a considerable efficiency drop. This is why he L6565 has been provided wih he Frequency Foldback funcion. In principle, his funcion lies in puing a limi o he minimum OFF-ime of he swich [3]. The blanking ime of he ZCD circui, used for safe operaion under shor circui condiions and menioned in he previous secion, serves his purpose as well. Therefore, he QR operaion considered so far will be mainained as long as: T FW + T V T BLANKmin, () where T BLANKmin is he aforesaid minimum blanking ime (3.5 µs) of he Zero Curren Deecor (ZCD) circui. The maximum operaing frequency will hen no exceed: f swmax = V R V R T BLANKmin T V v in V in Figure 0. Frequency foldback: ringing cycle skipping as he load is progressively reduced V DS VDS VDS TFW TV TBLANKmin TBLANK TBLANK Pin = Pin' (limi condiion) Pin = Pin'' < Pin' Pin = Pin''' < Pin'' If he load curren and he inpu volage are such ha he condiion () is no fulfilled, he sysem will ener he "Frequency Foldback" mode, a sor of "ringing cycle skipping" illusraed schemaically in figure 0. /34

12 Figure. a) ZCD blanking ime vs. error amplifier oupu volage; b) qualiaive frequency rend TBLANK [µs] 0 5 Tj = 5 C fsw wihou frequency foldback VCOMP [V] a) wih frequency foldback Any negaive-going edge of he volage a pin 5 ha occurs during he blanking ime is ignored; he firs negaivegoing edge afer T BLANK has elapsed will rigger he ZCD circui and deermine MOSFET's urn-on. The peculiariy of he Frequency Foldback funcion, however, is ha he duraion of T BLANK is a funcion of he error amplifier oupu V COMP, as shown in he diagram of figure a. The lower he load is, he lower V COMP will be and his, in urn, leads o a longer T BLANK. Therefore, more and more ringing cycles will be skipped and he operaing frequency will gradually decay, as shown qualiaively in he diagram of figure b. While he Frequency Foldback is acive, uneven swiching cycles may be observed, due o he fac ha he OFFime of he MOSFET is allowed o change wih discree seps ( T v ), while he OFF-ime needed for cycle-bycycle energy balance may fall beween wo coniguous seps. One or more longer swiching cycles will be hen compensaed by one or more shorer ones, and vice versa. This phenomenon is absoluely normal and here is no appreciable effec on he performance of he converer and is oupu volage. When he load is low enough, so many ringing cycles and will be skipped ha heir ampliude becomes very small and hey can no longer arm he ZCD circui (see pin 5 in "L6565 pin usage" secion). In ha case, afer some ime he ZCD circui is idle, he inernal sarer of he IC will be acivaed, resuling in burs-mode operaion: a series of few swiching cycles spaced ou by long periods (400µs yp.) where he MOSFET is in OFF sae. Acually he operaion a very ligh load can be more complex han so far described: anoher mechanism may be involved ha ineracs wih he blanking ime of he ZCD circui. To explain his mechanism i is useful o recall eqn. (6), which provides he oupu of he Line Feedforward block (i.e. he inernal reference for he PWM comparaor): i saes ha, if he volage V COMP is.5v (or lower), he oupu V cs is zero and he L6565 sops swiching. Depending on parameers such as he inpu volage, he residual load (i.e. resisors of he oupu divider, opocoupler bias, dummy load resisors, ec.) and he ransformer's primary inducance, a very ligh load i is possible o hi he minimum ON-ime (T ONmin 400 ns) of he L6565 and, despie he long swich OFF-imes imposed by he ZCD blanking, he energy delivered each cycle may exceed he shor-erm demand from he load. This excess energy causes he oupu volage o increase a lile and he conrol loop o reac by lowering V COMP unil V cs = 0 and swiching is sopped, o mainain he long-erm energy balance. The oupu volage will now slowly decay and he conrol loop will reac by increasing V COMP. Swiching will be re-enabled as he V cs = 0 condiion is removed, bu will acually resar as he firs sarer pulse comes afer re-enabling. Also in his case he resul will be burs-mode operaion. A mos, he burs repeiion rae can be as high as he sarer frequency bu, depending on he converer's oupu capaciance, he residual load and he conrol loop response, one or even more sarer cycles may be skipped, giving origin o a burs repeiion rae submuliple of he sarer frequency. This laer behavior is shown in fig.. As compared o a burs-mode operaion occurring a he sarer frequency, here is usually no special advanage in his sarer cycle skipping mode, since he duraion of each burs is longer and he average number of swiching cycles per second, which he ligh-load losses are relaed o, does no change much. BURST MODE Pin b) /34

13 Figure. Burs-mode a very ligh load: sarer cycle skipping.5 V.8 V VCOMP Drain volage ~ ms 5 sarer cycles QR ZVS FLYBACK: DESIGN CONSIDERATIONS Minimum swiching frequency selecion. Wih he aim of minimizing ransformer's size, f swmin should be as high as possible. A high f swmin, besides increasing losses, reduces he load range where he converer works in QR, ha is, frequency foldback and, evenually, burs mode will occur a higher load currens (which, however, migh be desirable). Ofen, he choice is influenced by EMI consideraions oo. Refleced volage selecion. In order o exend he inpu volage range where he ZVS condiion (5) is me, he refleced volage should be as high as possible. The upper limi o V R is usually deermined by MOSFET's volage raing. The selecion of V R affecs also many imporan parameers and elecrical quaniies of he converer, as summarized in able. The designer should rade off hese someimes conrasing requiremens one agains he oher o find he opimum soluion for heir specific applicaion. Table. Effec of V R selecion on converer's performance Increasing ( ) VR resuls in: Parameer Change Transformer's primary inducance Minimum required Transformer's Area Produc Drain Ringing Frequency Swiching frequency (*) Peak and RMS primary curren Peak and RMS secondary curren MOSFET's conducion losses MOSFET's urn-on losses MOSFET's oal losses (**) Secondary recifier(s) losses Maximum drain peak volage Maximum secondary recifier(s) reverse volage (*) For a given f swmin, he rae of rise vs. V in and I ou increases; (**) A high inpu volage; a low inpu volage V R has lile effec. Transformer design. Once he elecrical specificaion of he ransformer has been defined (he primary inducance is found from (), he primary-o-secondary urn raio from n = V R / (V ou + V f ), he peak and RMS currens from able, a minimum inpu volage), he design of he ransformer is carried ou jus like for any fixed-frequency DCM flyback ransformer. Refer o [4] for a handy design procedure. Also he consideraions abou is consrucion are exacly he same. 3/34

14 L6565 PIN USAGE Pin (INV). I is he invering inpu of he E/A. This pin can be used in case of boh primary and secondary feedback echnique, as shown in figure 3. The circui for primary feedback shown in figure 3 is recommended when he exremely low consumpion before sar-up of he L6565 is o be fully exploied. The pars in he shaded region can be omied and he resisor divider (R L and R H ) ha ses he oupu volage be conneced direcly o he Vcc rail. Of course, in his case he consumpion of R L and R H will be accouned for when designing he sar-up circui (see pin 8). Figure 3. Use of L6565's error amplifier +Vin Rsar Vou RH COMP Vcc L6565 Vcc 8 COMP INV RA RL INV - E/A + o VFF block RB TL43.5V GND L6565 Primary Feedback Secondary Feedback (ype ) In case of he secondary feedback configuraion shown in figure 3, he L6565's error amplifier is used as an op-amp in invering configuraion, wih a gain fixed by he raio R A /R B. The inernal reference is no involved in he oupu volage seing (his is done a he secondary side by he TL43); i jus ses he quiescen poin of he circui. The resisors will be seleced keeping in mind ha he curren capabiliy of he E/A mus no be exceeded and he gain mus be large enough o accoun for he enire E/A's dynamics. Pin (COMP). E/A oupu. Usually, his pin is used for he compensaion of he volage conrol loop and he relevan nework is conneced beween his pin and INV (#), as shown in he schemaics of figure 3. Compensaion neworks from his pin o ground are no effecive since he E/A is a volage mode ype (wih low oupu impedance). Figure 4. Use of pin COMP o direcly modulae he duy cycle in secondary feedback Vou L6565 VCOMP INV COMP CCOMP ICOMP CTR RB Vk IF CF TL43 RF RH RL 5.8V.5V Regulaion range VCOMP ICOMP = RCOMP 5 kω 3 ma ICOMP Secondary Feedback (ype ) 4/34

15 In a differen ype of secondary feedback, shown in figure 4, he pin INV is grounded and he E/A of he L6565 (which is herefore unbalanced high) is used as a curren source. The characerisic of his curren source is shown in figure 4 oo: he volage V COMP is changed (and he duy cycle conrolled) by modulaing he curren I COMP sunk from he pin wihin he regulaion range. In his region, a change of I COMP causes a change of V COMP corresponding o a resisance R COMP 5 kω. Forcing pin COMP below.5v will cause he L6565 o sop swiching. Anyway, i is recommended o ake he pin o GND no direcly, bu hrough a 390 o 470Ω resisor. Pin 3 (VFF). Line feedforward inpu. Typically, a resisor divider conneced as shown in figure 7 applies o his pin a volage proporional o he converer's inpu volage. Is deerminaion is deal wih in he paragraph describing of he Line Feedforward funcion. A small capacior (ypically from o 0 nf), conneced beween pin 3 and ground is usually recommended o filer ou any noise ha may be coupled wih he pin (which is a high impedance poin). Pin 4 (CS). Invering inpu of he PWM comparaor. Through his pin, he L6565 reads he insananeous inducor curren, convered o a proporional volage by he exernal sense resisor (Rs). As his signal crosses he hreshold se by he oupu of he Line Feedforward block, he PWM lach is rese and he power MOSFET is urned off. The MOSFET says in OFF-sae unil he PWM lach is se again eiher by an appropriae signal on he ZCD pin (see pin 5 descripion) or by he inernal sarer in he absence of ha. An inernal circui ensures ha he PWM lach canno be se unil he signal on he pin CS has disappeared. The curren sense pin can be used in a paricular arrangemen of he feedback loop shown in figure 5. In his circui he opocoupler provides oupu volage regulaion by modulaing he curren injeced ino he offse resisor Roff, depending on he informaion coming from he secondary side, and changing he dynamics allowed o he signal across he sense resisor. Figure 5. Secondary feedback arrangemen suggesed for synchronized mode operaion +Vin Vou INV - E/A + COMP 3 VFF VOLTAGE FEED FORWARD - + PWM 8 Vcc.5V L CS Roff Rs TL43 Secondary Feedback (ype 3) The E/A of he L6565 is no used a all for regulaion and says unbalanced high. This feedback arrangemen is recommended when he device is required o work in synchronized mode and no as a QR conroller. In fac, being he E/A oupu sauraed high, he blanking ime of he ZCD is fixed a T BLANKmin = 3.5 µs, hus allowing he IC o be synchronized up o frequencies over 50 khz, regardless of he line/load condiions. Pin 5 (ZCD). Inpu o he Zero Curren Deecor circui. Transformer demagneizaion will be sensed hrough he auxiliary winding ha powers he IC: in fac he volage developed by his windings is an exac replica of he drain volage, scaled down by he primary-o-auxiliary winding urn raio m (see iming diagram (a) in fig. 6a). The ZCD circui is negaive-going edge riggered: when he volage on he pin falls below.6v i ses he PWM lach and he MOSFET is urned on. However, o do so, he circui mus be firs armed: prior o falling below.6v, he volage on pin 5 mus experience a posiive-going edge exceeding.v (ypically due o MOSFET's urn-off in QR operaion). This funcion is realized wih a comparaor wih hyseresis and a monosable ha is posiive-going edge riggered, as shown in he block diagram of figure 6. The relevan signals are shown in he iming diagram a) of figure 6. The ZCD circui is blanked for some ime afer MOSFET's urn-off, so ha any negaive-going edge occurring before his ime has elapsed is ignored (see "Frequency Foldback"). This is illusraed in he iming diagram of figure 7. 5/34

16 Figure 6. ZCD pin inernal block diagram and operaion COMP INV RZCD ZCD 5 L µA 5.V BLANKING TIME - E/A + o line FFWD.5V blanking START PWM +Vin 0.V 0.3V.6V.V MONO STABLE R S A B STARTER sarer STOP DISABLE Q DRIVER 7 Q VDS Synch Vsmax VZCD 5. V he ZCD circui is armed he ZCD circui is riggered VAUX 0 V. V.6 V 0.65 V A ARM VZCD 5. V he ZCD circui is armed he ZCD circui is riggered B TRIGGER. V.6 V 0.65 V BLANKING TBLANK A ARM B TRIGGER SET TO THE PWM LATCH GD inernal delay BLANKING SET TO THE PWM LATCH TBLANK VDS CCM GD inernal delay DCM a) QR mode b) Synchronized mode 6/34

17 Figure 7. Frequency Foldback: iming diagram showing ZCD operaion a ligh load VDS VZCD 5. V GD. V.6 V 0.65 V A ARM B TRIGGER BLANKING SET TO THE PWM LATCH GD TBLANK To minimize he exernal inerface wih he synchronizaion source (wheher i is he auxiliary winding or an independen clock), he volage a he pin is boh op and boom limied by a double clamp. The upper clamp is ypically locaed a 5.V, while he lower clamp is a one VBE above zero. The inerface will hen be made by jus one resisor ha has o limi he curren sourced by and sunk from he pin wihin he raed capabiliy of he inernal clamps (3 ma min. each). To selec is value, one should consider he wors condiion ha occurs while he MOSFET is in ON-sae a maximum inpu volage. The minimum resisance value will hen be: R ZCDmin V in max m = [kω] 3 considering he maximum lower clamp level (V) and he minimum source capabiliy of he pin (3 ma). The value can be experimenally adjused o fine une he ZCD circui delay so as o make i equal o T v and opimize MOSFET's urn-on. A higher resisance provides a longer delay and vice versa. However, values over 00 o 50 kω have lile effec on he delay and, on he oher hand, someimes he minimum resisor value R ZCDmin sill provides oo long a delay. In case of need, eiher of he wo circuis shown in figure 8 can be used o exend he adjusmen range of he ZCD circui delay. In he lag circui C ZCD is usually a few pf capacior; is value can be increased according o he need. In he lead circui he diode limis he negaive volage a -V, wors case. From he above formula, he minimum sandard value for R ZCD is 680Ω. Now R ZCD mus be such ha he oal resisance from he pin ZCD o ground is over 5kΩ, oherwise he L6565 could no sar-up. A any rae, he curren sunk from he pin while he MOSFET is in OFF-sae mus never exceed he raed capabiliy, hen also he following condiion mus be me: V R m R ZCD > R 3 ZCD [kω] 7/34

18 Figure 8. Circuis o exend he adjusmen range of he ZCD circui delay L ZCD RZCD L ZCD RZCD 680 Ω RZCD 4.3 kω CZCD N448 lag lead If he pin is driven by an exernal signal, he L6565 will be synchronized o (he negaive-going edges of) ha signal. To work properly, is period mus be greaer han he ZCD blanking ime, is high level V smax greaer han.v and is low level V smin lower han.6v. Wih reference o he iming diagram b) in figure 6, he minimum limiing resisor will be eiher: V s max 4.7 V s min + R ZCDmin = [kω] or R 3 ZCDmin = [kω] 3 whichever is greaer (provided V smax is greaer han 4.7V and V smin less han V). This pin develops a disable funcion oo. The device will be shu down if he volage a he pin is forced exernally below 50mV. To do so, he capabiliy (0mA max.) of he lower clamp has o be exceeded. Any small signal NPN can be used o do he job. The IC resars when he exernal pull-down is removed (provided is Vcc is sill above he UVLO), since an inernal 50µA pull-up generaor, acive only while he IC is disabled, les he volage go up. The curren consumpion during shudown is reduced a abou.4ma. Pin 6 (GND). Ground. This pin acs as he curren reurn for boh he signal inernal circuiry and for he gae drive curren. When layouing he prined circui board, hese wo pahs should run separaely, as shown in he schemaic of figure 9. The bold races carry pulsed high curren so hey should be as shor and fa as possible in he PCB. This will keep boh resisive and inducive effecs o a minimum, in favor of efficiency as well as radiaed RFI. Figure 9. Recommended ground rouing in an L6565-based QR ZVS flyback Vin Vou Vac Secondary Power GND VFF 3 ZCD Vcc 5 8 L GD C Y Secondary Signal GND 6 4 VFB COMP GND CS FBCK Primary Signal GND One-poin GND Primary Power GND 8/34

19 Pin 7 (GD). Gae driver oupu. I is able o drive an exernal MOSFET wih 400mA source and sink capabiliy. The driver is made up of a oem pole wih a low side NDMOS. Is inheren body diode avoids he use of an exernal diode o preven excessive negaive volages on he pin due o parasiic ringing. To avoid undesired swich-on of he exernal MOSFET, because of some leakage curren when he supply of he chip is below he UVLO hreshold, an inernal pull-down circui holds he pin low. This circui guaranees V maximum on he pin (@ I sink = 5mA), wih Vcc 4V. This allows omiing he "bleeder" resisor conneced beween he gae and he source of he exernal MOSFET used for his purpose. Pin 8 (Vcc). IC's supply pin. This pin will be exernally conneced o he sar-up circui (usually one resisor, R START, conneced as shown in figures 0a,b and o he self-supply circui (aux. winding, diode and C SUPPLY ). Figure 0. Sar-up circui configuraions Vac +Vin Vac +Vin RSTART Vcc 8 L GND CSUPPLY N448 opional RSTART Vcc 8 L GND CSUPPLY a) Vac +Vin b) R CSTART N448 N448 Vcc 8 L GND CSUPPLY c) An addiional film capacior (0. or 0. µf ypically), placed as close he IC's pins as possible, can be used for filering ou he noise due o layou issues. To sar he L6565, he V cc volage mus exceed he sar-up hreshold. Below his value he device is inacive and consumes less han 70µA from he pin, 45µA ypically. This allows he use of a high value R START (in he hundreds kω), or a charge pump circui, which reduces power consumpion and opimizes sysem efficiency a ligh load, especially in wide range mains applicaions. In principle, o make sure ha he IC can sar up even wih he minimum line volage (V ACmin ), here is a maximum value for R START. In pracice, however, o ge an accepable wake-up ime (i.e. he ime needed for he V cc volage o reach he sar-up hreshold of he IC), R START needs o be quie lower han his limi. Figure shows he power consumpion of he sar-up circuis a) and b) a maximum line volage when he device is running, and he ypical wake-up ime, ha is he ime needed for he Vcc volage o reach he sarup hreshold a minimum line volage, for differen values of R START (normalized o is maximum value). A minimum value for R START (see Fig. - lef) is required o allow he IC o resar afer he driver has been disabled by a nd level OCP inervenion (e.g. resuling from a shored secondary diode). If a resisance lower han his limi is used, a high line he IC migh no resar because he curren coming from R START exceeds he IC consumpion (.6mA min.) and keeps he V cc volage above he UVLO hreshold. Of course his feaure can be used he oher way round, o urn he Hiccup-mode behavior of he nd OCP hreshold ino a lached one. 9/34

20 Figure. Typical power consumpion and wake-up ime for he sar-up circuis a) and b) VACmax W CIrcui (a) RSTARTmin= 7 kω Circui (b) RSTARTmin= 68 kω RSTARTmax = 358 kω RSTARTmax = 550 kω VACmin s 3 CSUPPLY = 47 µf circui (b) circui (a) CSUPPLY = µf RSTART RSTARTmax RSTART RSTARTmax Condiions: Isar-up = 70 µa, Iq =.6 ma, Vsar-up = 4.5 V, VUVLO = 8.7 V, Vcc = V, VAC = 88 o 64 VRMS The sar-up circui c) is a small charge pump. I allows faser wake-up imes, compared o circuis a) and b), wih very low power dissipaion. The wake-up ime depends on he value of C START, a high-volage capacior ha can be a low-qualiy one since i is operaed a low frequency and carries very lile curren. Figure shows he ypical wake-up ime for differen values of C START and he consumpion vs. he line volage. For reference, he consumpion of circui b - bu wih a much longer wake-up ime - is shown oo. Figure. Typical power consumpion and wake-up ime for he sar-up circui of figure 0c Ploss [W] 0.5 CSUPPLY = 47 µf Twake-up [s] 0 VAC = 88VRMS Circui (b) Twake-up = 3 88 VAC Circui (c) Twake-up = 88 VAC R = 00 Ω CSUPPLY = 47 µf VAC [VRMS] 0 CSUPPLY = µf CSTART [nf] The above-menioned consideraions ha lead o a minimum value for R START in circuis a) and b) here pu a limi of 85nF o he maximum value of C START (he curren delivered by he pump is V AC f L C START ). The series resisor R limis he charge/discharge peak curren of C START. I may range from few unis o some kω wihou affecing he wake-up ime significanly; however, he dissipaion will go up as R increases above some hundred ohms. When operaing, he curren consumpion (of he device only, no considering he gae drive curren) rises o a value no exceeding 3.5mA. The device keeps on working as long as he supply volage is over he UVLO hreshold (0.3V max). If he Vcc volage exceeds 8V (min.) an inernal zener diode, 5mA raed, will be acivaed in order o clamp he volage. In ha case he consumpion of he device will obviously increase. 0/34