EVOLUTION OF VOLTAGE REGULATOR TO SYSTEM ON CHIP APPLICATIONS

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1 Internationa Journa of Advanced Research in Engineering and Technoogy (IJARET) Voume 6, Issue 8, Aug 2015, pp , Artice ID: IJARET_06_08_005 Avaiabe onine at ISSN Print: and ISSN Onine: IAEME Pubication EVOLUTION OF VOLTAGE REGULATOR TO SYSTEM ON CHIP APPLICATIONS ANOOP KIRAN Department of Teecommunication Engineering Siddaganga Institute of Technoogy, Tumakuru , Karnataka, India ABSTRACT Peope demanding for smaer hand-hed devices is increasing because of the growing appications within these portabe System on Chip (SoC) appications, such as ceuar phones, tabs, aptops, etc... Consequenty industry is aso pushing towards miniaturization. New technoogies are emerging to make device smaer and smaer, by decreasing transistor ength ony to few nano-meters. During the journey of miniaturization, votage reguator is being a key factor of discussion for SoC appications from many years. Researchers have been working constanty to formuate a design for votage reguators. Many compensation methods have been emerging from ast two decades to overcome probems associated with precursor technique. This paper insights the pathway which eads to deveopment of Capacitor-Less Low Drop out (CL-LDO) Votage Reguator, since CL-LDO architecture is the most suitabe architecture for System on Chip appications. Index Terms: Dropout votage, Quiescent current, Mier capacitor, Differentia ampifier, Trans-conductance ampifier, Line reguation, Load reguation, Line transient, Load transient, fast path, transient compensation, Die area. Cite this Artice: Anoop Kiran. Evoution of Votage Reguator to System on Chip Appications. Internationa Journa of Advanced Research in Engineering and Technoogy, 6(8), 2015, pp I. INTRODUCTION Votage reguator is one of the fundamenta and essentia parts of power management system. Power management design is becoming a more frequent and chaenging task for system designers. The study of power management techniques has increased spectacuary within the ast few years corresponding to a vast increase in the use of portabe, handhed battery operated devices [1]. Votage reguators are of two types: 42 editor@iaeme.com

2 Evoution of Votage Reguator to System on Chip Appications switching reguator and inear reguator. Switching reguator is having good efficiency but it is having compex structure for design and it is more costy than inear reguator [2]. Whereas in case of inear reguator, despite the fact of esser efficiency, it is most widey evoved because of reduction in cost, size, noise and compexity; a of which heps to impement on SoC devices [3], [4]. First of a, et us have a ook how does a particuar technique derived for designing of votage reguator. Observing the figure-1 indicates that it consists of a votage divider circuit foowed by a 12V suppy, which is then fed to an op-amp for driving purpose. Considering basic methodoogy as used in figure-1, experiment resuts shows that, this wi not give a constant votage a times and aso have some imitations. First of a if the 12V (input) suppy votage is not reguated propery suppy to op-amp wi not be a constant votage and second, if other op-amp demands different votage then this circuit is no onger used. These two drawbacks proved that this technique wi not be efficient in a variabe condition and hence it does not serve for reguating purpose. Figure 1 A votage divider circuit to drive an op-amp, which was experimented earier to check whether it gives a constant votage II. VOLTAGE REGULATOR BLOCK Considering drawbacks of votage divider reguator in mind scientists have deveoped a new configuration, which is based on feedback system. Feedback means taking some part of output and utiizing that to reguate the output votage to a constant vaue. Generay, from the output node feedback is taken because that is the point of interest where a constant votage has to be achieved. Series of efforts finay eads to a system which defines the reguator propery as shown in Figure-2. Figure 2 A bock diagram of votage reguator with a its components Bock diagram consists of three important components: a feedback circuit, an error ampifier and a pass eement. Feedback circuit is the votage divider circuit which heps to send the change in output signa as feedback thus heps to prevent the 43 editor@iaeme.com

3 Anoop Kiran refection at output node to change in input node. Votage divider circuit is made up of two resistors in series. The resistor vaues are seected to give the votage that required to error ampifier. We can aso imit the amount of Quiescent current by proper seection of resistor vaues [4]. A high gain muti-stage ampifier is used as the error ampifier, with a stabe votage reference fed to one of its inputs. The votage reference is usuay derived from a band gap reference circuit [5], [6]. Since the gain obtained by differentia ampifier is ess, the output of the differentia stage is given to common source ampifier to achieve appreciabe gain [7]. Figure 3 CMOS transistor structure of Error ampifier CMOS circuit architecture of error ampifier is as shown in Figure-3 where it consists of two stages [7]. First stage is an active oaded differentia ampifier which constitutes M 1 to M 5 transistors and M 8 used to mirror the current. Second stage consists of M 7 and M 6 which is a high trans-conductance ampifier which heps to increase the gain. Cc is Mier capacitor added to improve frequency response [7]. The third and most important part of votage reguator is pass eement seection which wi be discussed in upcoming section. The input votage is appied to a pass eement. The pass eement operates to drop the input votage down to the desired output votage. The resuting output votage is sensed by the error ampifier and compared to a reference votage. The error ampifier drives the pass eement to the appropriate operating point to ensure that the output is at the required constant votage. As the operating current or input votage changes, the error ampifier moduates the pass eement to maintain a constant output votage. Under steady state operating conditions, an LDO behaves ike a simpe resistor. III. PASS ELEMENT SELECTION Few important factors considered during seection of pass eement are dropout votage, ground current, noise and input power oss. For SoC appications, there are two basic factors that shoud be considered whie seecting pass eements: dropout votage and ground current. Low ground current and ow dropout votage are required to have more efficient votage reguator [8]. So, it is pretty cear that pass eement s drop-out votage and ground current is directy reated to efficiency of the reguator [8], [9]. Lesser the dropout votage is more the efficiency, therefore we need to search for ow drop-out pass eement. Now the task is to which pass eement has to be seected, it cannot be a simpe two termina device diode, as current can t controed in diode. Successor of diode is sandwiching two diodes that is transistor so; Bipoar 44 editor@iaeme.com

4 Evoution of Votage Reguator to System on Chip Appications Junction Transistor (BJT) was first seected and impemented. For the period up to the birth of Meta Oxide Semiconductor Fied Effect Transistor (MOSFET), it seems to be good, but MOSFET advantages rued out the use of BJT for many appications. Advantages of MOSFET over BJT are shown in Tabe-1. Tabe 1 Advantages of MSOFET over BJT. BJT MOSFET Input power oss >0 (I B >0) 0 (I G =0) Dropout votage More Lesser than BJT Noise More Less Fabrication area More Less Tota power oss More Lesser than BJT Therma Runaway Present Absent The difference between these is how the pass eement is driven. A BJT pass eement is a current-driven device, whereas the MOSFET is a votage driven device. As we know there are two types of transistors: N-type and P-type. N-type devices require a positive drive signa with respect to the output, whereas P-type devices are driven from a negative signa with respect to the input. Generating a positive drive signa becomes more power requirement and ess efficient. As a resut, LDOs that operate from ow input signa typicay are impemented with P-type devices. So, either PNP type BJT or PMOS can be seected. Figure-4 shows the comparison of Dropout votage between PNP type BJT and P-type MOSFET [10]. Figure 4 Comparison of Dropout votage of PNP LDO and PMOS LDO, which shows Dropout votage of PMOS LDO esser than PNP LDO. Graph in Figure-4 shows that Dropout votage of PMOS LDO esser than PNP LDO. In ower-current appications, PMOS LDOs typicay have a ower dropout votage than that of PNP LDOs. The resut cogenty proves that PMOS can be used to increase efficiency; thereafter votage reguator is termed as Low Drop-Out (LDO) Reguator. Ground current is the amount current fowing when current to the oad becomes zero. During this scenario, Pass eement s current is significanty higher than any other component s currents in LDO reguator. Now we sha have a ook through 45 editor@iaeme.com

5 Anoop Kiran coector current expression of BJT and drain current expression of MOSFET is as shown in Eq- 1 and Eq- 2 respectivey. I V BE C ISexp V T (1) I C=Coector current V BE=Base to emitter votage I s=saturation current V T=Therma Votage 1 w 2 I D µ Cox ( VGS VTh ) 2 (2) I D=Drain current C ox=oxide Capacitance V GS=Gate to Source Votage µ =Mobiity of charges W & L=Width & Length V Th=Threshod votage for MOSFET Coector current variation of BJT is exponentiay reated to Base votage, whereas in MOSFET drain current is quadratic function of gate votage. These observations suggest that ground current after transistor reached ON state for BJT is more than MOSFET. We know that BJT is current driven device. As the oad requires more current it has to be provided by driving current at the base of transistor. So base current aso increases automaticay. This additiona base current constitutes ground current as shown in figure-5(a). (a) (b) Figure 5 Current fow Comparison: (a) PNP-type BJT (b) P-type MOSFET, from which we can be observed that ground current of P-type MOSFET is esser than PNP-type BJT. In case of MOSFET as it is votage driven device, current required by oad is provided by increasing votage at gate termina. There is isoation between gate and other two termina for fow of charges, as capacitive action takes pace in MOSFET to drive. Hence there is no gate current here as shown in figure-5(b). So, comparativey MOSFET osses esser ground current than BJT does. Figure-6 ceary iustrates that 46 editor@iaeme.com

6 Evoution of Votage Reguator to System on Chip Appications as oad current increases PNP LDO osses more ground current than PMOS LDO [10]. Figure 6 Comparison of Ground current of PNP LDO and PMOS LDO, which shows ground current of PMOS LDO esser than PNP LDO. Two important advantages of MOSFET, namey, ow dropout votage and ow ground current wi successfuy repace the pass eement from BJT to MOSFET. In addition to these two advantages, MOSFET is aso free from the probems such as Therma runaway, more noise and more fabrication area which BJT is suffering from. Lesser fabrication area of MOSFET is most significant advantage over BJT, which heps to increase fabrication technoogy and to make device size smaer as it is a most important requirement of SoC appications [11]. IV. LDO VOLTAGE REGULATOR CIRCUIT LDO Votage reguator is having three important components. They are Pass eement as P-type MOSFET, Feedback circuit as votage divider circuit having two resistors in series and error ampifier as Muti-stage differentia ampifier. Transistor eve circuit diagram taken from cadence too is as shown in Figure-7. Figure 7 Transistor eve circuit diagram of LDO Votage reguator editor@iaeme.com

7 Anoop Kiran Having with some pre-assumptions and design equations, we can determine the dimension of a transistors shown in Figure-7. This section expains the design of LDO reguator for output votage of 2.8V for a maximum current of 50mA and having a dropout votage equa to 200mV. Before going to design it is required to go through the symbos given with parameters name shown in Tabe-2. Symbo Tabe 2 Symbos with appropriate parameters Parameter Name Symbo Parameter name g m Transconductance of a MSOFET C L Load Capacitance A DC DC Votage gain V DSat Saturation votage V OV Overdrive votage C C Compensation capacitance I Q Ground current via R 1 & R 2. V REF Reference votage at error V OUT Desired Output votage at the end V Dropout Dropout votage of pass eement V DS Drain to source votage I Dmax Maximum drain current G gain bandwidth BW (3) G BW gm 2C L (4) I C L (Sew Rate) (5) w gm 2 I D µ ncox (6) 1 w 2 I D µ Cox ( VGS VTh ) 2 (7) V = V V OV GS Th (8) V DS V OV (9) w I g w I g 6 6 m6 4 m4 4 (10) 48 editor@iaeme.com

8 Evoution of Votage Reguator to System on Chip Appications w w 7 I I (11) Design of Dimension of a MOSFETs starts from assuming some parameters such as gain, bandwidth and oad capacitance. Then it foows to cacuate g m (Eq-4), I D (Eq-5), and Dimensions of M 1 -M 4 by using basic design equation of MOSFET (Eq- 6 to Eq-9). Second stage of error ampifier is needed to be designed to have high trans-conductance to ampify signa coming from first stage differentia ampifier. Since, M 6 is biased by gate votage of M 4, Eq-10 heps to determine the dimension of M 6. M 8 is repica of M 5 since it heps in mirroring current to M 5. M 7 dimensions can be deduced by taking current fow in M 6 and using Eq-11, as it is biased by M 5. A dimension of are tabuated in Tabe-3. Tabe 3 Dimension of a MOSFETs and drain current fow MOSFETs Width (µm) Length (µm) I D (µa) M M M M M M M M Pass eement (50µ 303) Pass eement dimensions can be determined by Eq-12, foowed by pre-assuming dropout votage of 200mV across it. Feedback circuit vaues can be cacuated by using Eq-13 and Eq-14 by knowing vaue of Reference votage. w 2I D max 2 µ ncoxv DSat (12) I Dmax VOUT R R 2 1 (13) V REF R V 2 OUT R2 R1 (14) CC 0.22CL (15) Compensation capacitance vaue can be determined by Eq-15. This equation is derived by soving and simpification transfer function of error ampifier foowed by pre-assuming phase margin of 60º. A the remaining parameter vaues are tabuated in Tabe editor@iaeme.com

Anoop Kiran Tabe 4 Vaue of a other components in LDO Reguator Parameter Vaue V OUT 2.8 V I Q 5 µa C OUT 100 µf R OUT 560 KΩ A DC 50 db R 1 312 KΩ R 2 248 KΩ I Dmax 50 ma 1.

9 Anoop Kiran Tabe 4 Vaue of a other components in LDO Reguator Parameter Vaue V OUT 2.8 V I Q 5 µa C OUT 100 µf R OUT 560 KΩ A DC 50 db R KΩ R KΩ I Dmax 50 ma 1.24 V V REF Design of LDO reguator is impemented in cadence too and simuated to observe the votage reguation for wide range of input votage. Then it is tested for Line Reguation giving inear input votage from 0-10V as shown in Figure-8, which shows that output votage remains constant at 2.8V. Output votage remains constant after input reaching 3V, irrespective of increase in input votage. Load reguation is observed by introducing a ramp current starting from 0-10A as shown in Figure-9, which shows votage reguated at 2.8V up to maximum current of over 600mA. In spite of proper reguation been achieved in the LDO votage reguator circuit, it suffer from many imitations [12]. One of the most important probems is the size of oad capacitor (100 µf) connected to achieve good transient response. This increases the die area required to fabricate an enormousy arge capacitor, which is a very big probem associated to impement for SoC appications. When capacitor is removed and tested with transient anaysis which found to give irreguar and undesirabe resuts. This can be proved by subjecting LDO reguator to transient response after removing oad capacitor. In order to overcome this issue many soutions have been presenting by scientists [13]. Before going to soutions, et s anayse the probem with the absence of capacitor. Figure 8 Line reguation: V IN Ramped from 0-10V, output votage remains constant at 2.8V after input votage reached 3V editor@iaeme.com

Evoution of Votage Reguator to System on Chip Appications Figure 9 Load Reguation: I LOAD Ramp is given from 50mA-1A, even then aso output votage remains constant at 2.8V up to 688mA.

10 Evoution of Votage Reguator to System on Chip Appications Figure 9 Load Reguation: I LOAD Ramp is given from 50mA-1A, even then aso output votage remains constant at 2.8V up to 688mA. Huge capacitor, if present wi hep to store charges which wi be used to deiver to output whenever necessary. When oad demands a step current, this huge amount of instantaneous charges are suppied by capacitor as shown in Figure-10. Thus it heps to provide some time for reguating oop thereby to provide required amount of current by pass transistor [14]. In this case, transfer of charges from capacitor to oad corresponds to votage drop variation at the output, hence vioating rue of constant output votage. If capacitor is absent output votage wi not sette down for constant vaue; instead, it keeps on varying continuousy. Referring to Figure-11; in absence of oad capacitor, practicay current demanded by oad is as shown in ower graph and osciating output votage which never settes down due to absence of capacitor shown in upper graph. The same probem wi aso occur when input (Line) votage is varied since there is no time given for oop to react for change in input votage, as shown in Figure-12. Hence there exist big probem during fast transient of oad current and ine votage. Figure 10 Capacitor reeasing charges during step oad current demand by oad, hence giving some time for reguation to happen editor@iaeme.com

Anoop Kiran Figure 11 Load Transient: In absence of capacitor variation of output votage for instantaneous variation of oad current, which does not sette down to a constant vaue Figure 12 Line

The absence of arge externa output capacitor presents design chaenges for oad transient response and aso to AC response [14].

11 Anoop Kiran Figure 11 Load Transient: In absence of capacitor variation of output votage for instantaneous variation of oad current, which does not sette down to a constant vaue Figure 12 Line Transient: In absence of capacitor variation of output votage for instantaneous variation of input votage, which does not sette down for a constant vaue. The absence of arge externa output capacitor presents design chaenges for oad transient response and aso to AC response [14]. Removing the externa capacitor requires a sound compensation scheme for the transient response. This idea paved way into the deveopment of different compensation methods to overcome many probems. One among them is presented in next section. V. CAPACITOR-LESS LDO VOLTAGE REGULATOR WITH COMPENSATION Considering the drawback in transient response of previous structure, and then come up with a soution by adding compensation circuit as shown in Figure-13. Compensation circuit provides sufficient time for oop to reguate by providing fast path for the fow of charges for a sudden demand of charges occurred at the oad [15] editor@iaeme.com

12 Evoution of Votage Reguator to System on Chip Appications Figure 13 Bock diagram of CL-LDO votage reguator with compensation. Transistor eve diagram of CL-LDO with compensation circuit is as shown in Figure- 14 and parameter vaues are tabuated in Tabe-5 [15]. One extra capacitor is added in compensation circuit which is of ony few Pico-Farads which can be easiy fabricated in sma area of chip. Researchers found a technique that even though capacitor vaue is sma, it can act as a bigger basin for the storage of charges within it. This can be anaysed by using Eq-16. Where g m,eff is tota trans-conductance vaue offered by M 9 and M 10. C f,tota is tota capacitance vaue. This equation can be derived by soving transfer function of each of compensation circuit. C g R C f, tota m, eff f f (16) Figure 14 Transistor eve diagram of CL-LDO votage reguator taken from Cadence too. Carefu observation of Eq-16 ceary shows that capacitor vaue is mutipied by two factors: Resistance R f and g m,eff. This technique surey heps to have a bigger capacitor and hence more charges can be stored easiy. These charges pay roe during transient anaysis giving time for oop to reguate editor@iaeme.com

Anoop Kiran Tabe 5 Parameter vaue of compensation circuit Parameter Vaue I REF 10 µa R f 200 KΩ C f 2 pf M 9 L=0.4µm, W=1µm M 10 L=0.4µm, W=3µm M 11 L=0.4µm, W=3µm M 12 L=0.

5 µs rise and fa times, as shown in Figure-15. An extra ringing, ess than ±5 mv was experienced at output, but the ringing quicky gets stabe vaue within 4µs in the worst case.

13 Anoop Kiran Tabe 5 Parameter vaue of compensation circuit Parameter Vaue I REF 10 µa R f 200 KΩ C f 2 pf M 9 L=0.4µm, W=1µm M 10 L=0.4µm, W=3µm M 11 L=0.4µm, W=3µm M 12 L=0.4µm, W=1µm After having impemented the design in cadence, circuit is tested for transient performance. It is subjected to a ine transient of 3 5V and 5-3V with 0.5 µs rise and fa times, as shown in Figure-15. An extra ringing, ess than ±5 mv was experienced at output, but the ringing quicky gets stabe vaue within 4µs in the worst case. Then circuit is subjected to oad Transient by introducing a step oad current from 5-50mA and 50-5mA with 2 µs rise and fa times, as shown in Figure-16, which shows there is ony ±2mV ringing which sette down quicky in 4 µs. In addition to soving transient response probem this architecture aso soves AC response probem hence can be impemented in SoC appications [15]. Figure 15 Line Transient Response: V IN varying from (a) 3-5V (b) 5-3V. Output votage setted down to 2.8V very quicky within 4 µs. Figure 16 Load transient response: (a) 5-50mA (b) 50-5mA. Output votage setted down to 2.8V very quicky within 4 µs editor@iaeme.com

14 Evoution of Votage Reguator to System on Chip Appications VI. CONCLUSION Votage Reguator characteristics and requirements of SoC appications are discussed in this paper. Architecture of basic votage reguator is introduced, considering the drawbacks of votage divider circuit. Designing of each components of votage reguator is provided. Seection of most important component-pass eement is presented with considering required characteristics such as ess power oss, ess Fabrication area and ow Noise. Finay structure of CL-LDO reguator is deveoped by removing the botteneck which is a huge oad capacitor. Experimenta resuts show CL-LDO is having good transient response and hence it is suitabe for SoC appications. ACKNOWLEDGEMENT Author wish to thank Dr. K C Narasimhamurthy Ph.D. (IITG) Professor & Head of Teecommunication engineering Department, Siddaganga Institute of Technoogy, Tumakuru ,for his support and courage given to formuate this Paper. REFERENCES [1] G. Patounakis, Y. W. Li and K. Shepard, A fuy integrated on-chip DC-DC conversion and power management system, IEEE Journa of Soid-State Circuits, 39(3), March 2004, pp ,. [2] F. Goodenough, Fast LDOs and Switches provide Sud-5V power, Eectronic design, 43(18), September 5, 1995, pp [3] F. Goodenough, Power-Suppy Rai Pummet and Proiferate, Eectronic design, pp , Juy 24, [4] G. A. Rincon-Mora and P.E. Aen, A ow-votage, ow quiescent current, ow drop-out reguator, IEEE J. of Soid-State Circuits, 33(1), Jan. 1998, pp [5] Hitoshi Shiga, Akira Umezawa, Takeshi Miyaba, Toru Tanzawa, Shigeru Atsumi, and Koji Sakui, Member, IEEE,. A CMOS Bandgap Reference Circuit with Sub-1-V Operation Hironori Banba, IEEE Journa of Soid-State Circuits, 34(5), May1999 [6] Saweth HONGPRASIT, Worawat SA-NGIAMVIBOOL, Apinan AURASOPON Mahasarakham UniversityDesign of Bandgap Core and Startup Circuits for A CMOS Bandgap Votage Reference. [7] Ade S. Sedra and Kenneth C. Smith, Text tited Microeectronic circuits, 5th edition, sections: 6.4, 6.12, 7.1 to 7.7. [8] Gabrie Afaonso Rincon Mora, Current efficient, ow votage, ow dropout reguator, Georgia Institue of technoogy, November [9] Topic-9, Understanding Low DropOut (LDO) Reguators Michae Day, Texas Instruments. [10] Brian M.King. Appications Speciaist, Advantages of using PMOS-type owdropout inear reguators in battery appications Anaog and Mixed-Signa Products, August 2000, Anaog Appications Journa. [11] Ashvani Kumar Mishra, Design Of CMOS Low Drop-Out Reguators: A Comparative Study, Rishikesh Pandey Thapar University, Patiaa, India, Internationa Journa of Computers & Technoogy 4 (2), March-Apri, 2013, ISSN editor@iaeme.com

15 Anoop Kiran [12] D.B. PEI, Q. LIU and R.SHEN, Design of a Capacitor-Less Low-Dropout Votage Reguator X. R. LI, Institute of Eectronic CAD, Xidian University, No.2, South Tai Bai Road, Xi'an , P R China. [13] Joseyn Torres, Mohammad EL-Nozahi, Ahmed Ameer, Seenu Gopaakrishna, Reza Abduah, Kamran Entensari and Edgar Sanchezi- Sinencio, Low-Dropout Votage reguators: Capacitoress architecture comparison IEEE Circuit and System Magazine, Second quarter 2014 [14] Robert J. Miiken, Jose Siva-Martínez, Senior Member, Fu On-Chip CMOS Low-Dropout Votage Reguator, IEEE, and Edgar Sánchez-Sinencio, Feow, IEEE. IEEE transactions on circuits and systems I: reguar papers, 54(9), September [15] Robert Jon Miiken submitted to the office of graduate studies of Texas A&M University in partia fufiment of the requirements for the degree of master of science. [16] Dr. Rajseh Kumar Ahuja and Priyanka Phageria. Dstatcom Based Votage Reguator For Wind Turbine Driven Sef-Excited Induction Generator, Internationa Journa of Eectrica Engineering & Technoogy (IJEET), 4(3), 2013, pp [17] Shahana Jabar and Mr. Jose Sebastian T.K. High Step Up Switched Capacitor Inductor DC Votage Reguator, Internationa Journa of Eectrica Engineering & Technoogy (IJEET), 5(12), 2014, pp , 56 editor@iaeme.com

Multi-stage Amplifiers Prof. Ali M. Niknejad Prof. Rikky Muller

Multi-stage Amplifiers Prof. Ali M. Niknejad Prof. Rikky Muller EECS 105 Spring 2017, Modue 4 Muti-stage Ampifiers Prof. Ai M. Niknejad Department of EECS Announcements HW10 due on Friday Lab 5 due this week 2 weeks of ecture eft! 2 Mutistage Ampifiers Why cascade