DESIGN OF LOW DROPOUT (LDO) VOLTAGE REGULATOR USING BULK MODULATION TECHNIQUE

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1 International Journal of Electronics and Communication Engineering and Technology (IJECET) Volume 8, Issue 3, May-June 2017, pp , Article ID: IJECET_08_03_007 Available online at ISSN Print: and ISSN Online: IAEME Publication DESIGN OF LOW DROPOUT (LDO) VOLTAGE REGULATOR USING BULK MODULATION TECHNIQUE Peterson Basra M. Tech Scholar, Department of Electronics & Communication Engineering, Institute of Engineering & Technology, Alwar (Raj.), India Dr. Anil Kumar Sharma Professor& Principal Institute of Engineering & Technology, Alwar (Raj.), India ABSTRACT This paper describes the Designing of Low Power LOW DROP-OUT (LDO) Voltage Regulator using Bulk Modulation technique. Low-Drop-Out (LDO) voltage regulators are commonly used in electronic systems particularly in portable or low-power applications. Their main function is to provide a stable supply voltage by minimizing the ripples and noises caused by imperfect power sources and/or variable load currents. In portable devices and many biomedical implants, the power consumption of the regulator as well as its recovery time are among the important design considerations. A proof-of-concept prototype is designed and in 0.13-um CMOS, to illustrate the enhancement that can be achieved by applying this technique. The proposed enhanced LDO regulator which is based on conventional LDO regulators is able to delivers up to 5 ma of load current while providing a 1 V ( 1.5% load regulation) drawing 99.0 from a 1.2 V supply. The proposed technique takes advantage of body effect to reduce the threshold voltage of the pass transistor for any given current load. The proposed structure improves line and load regulations as well as the driving capability of the regulator while it reduces the power consumption of the LDO as compared to conventional LDOs with similar performance. Compared to conventional LDO voltage regulators, the proposed circuit achieves improved accuracy, stability, and output load current capability. Measurement results confirm that as compared to conventional LDOs, the proposed circuit offers better stability as well as improvement in the load current delivery and faster recovery time for no-load to and from full-load transitions. Key words: Bulk Modulation Technique, CMOS LDO, Capacitor-less LDO, Low- Drop-Out Voltage Regulator, Low-Power editor@iaeme.com

2 Peterson Basra and Dr. Anil Kumar Sharma Cite this Article: Peterson Basra and Dr. Anil Kumar Sharma, Design of Low Dropout (LDO) Voltage Regulator Using Bulk modulation Technique, International Journal of Electronics and Communication Engineering and Technology, 8(3), 2017, pp INTRODUCTION The LDO is one of the fundamental building blocks of the Power Management Unit. Thus is widely used in many portable electronic systems. The LDO provides a stable voltage reference independent of the load impedance, input voltage variations, temperature and time. A voltage regulator circuit is also used to change or stabilize the voltage level according to the necessity of the circuit. Thus, a voltage regulator is used for two reasons: 1. To regulate or vary the output voltage of the circuit. 2. To keep the output voltage constant at the desired value in-spite of variations in the supply voltage or in the load current. The essential components of an LDO voltage regulator are a reference voltage source, error amplifier and series pass element (BJT or MOSFET). The voltage-drop across the series pass element is controlled by the error amplifiers output in order to control the output voltage. Ordinary linear regulator uses a common collector scheme while the LDO regulators use an open collector (termed as open drain if a MOSFET is used as the series pass element) scheme. Figure 1 Basic Block Diagram of LDO Fig.1 typically consists of a pass element, an error amplifier and a resistive feed-back network. Using PMOS transistor as pass element may introduce stability issues and thus typically requires a large external capacitor. To improve this issue particularly in fully integrated designs, capacitor-less monolithic regulators have been proposed. There are several parameters which require thorough understanding before choosing an LDO. An LDO is characterized by its dropout voltage, quiescent current, load current, speed, load regulation, line regulation, output capacitor and its equivalent series resistance (ESR). Dropout voltage is the input-to-output differential voltage at which the circuit ceases to regulate against further reductions in input voltage; this point occurs when the input voltage approaches the output voltage. Fig.1 shows a typical LDO regulator circuit. In the dropout region, the PMOS pass element is simply a resistor, and dropout is expressed in terms of its on-resistance (Ron). V DO = I or on (1) The Line Regulation is characterized by the output variation ratio and results from a specific change in input voltage or in reference voltage, when the load circuit is open. Line regulation = ΔV out / Δ V in (2) 60 editor@iaeme.com

3 Design of Low Dropout (LDO) Voltage Regulator Using Bulk Modulation Technique Load Regulation is a measure of the circuit s ability to maintain the specified output voltage under varying load conditions. It is expressed by the ratio between output voltage and output current = V out / I out (3) PSRR is a measure of how well a circuit suppresses extraneous signals (noise and ripple) on the power supply input to keep them from corrupting the output. PSRR is a function of the pass transistor parasitic capacitance and is proportional to the reciprocal of the power supply gain. PSSR= 20log (V in / V out) (4) Efforts have been made to improve PSRR of an LDO by removing bulky capacitor in order to make it suitable for system-on-chip (SoC) applications [7]. PSRR deteriorates by lowering power consumption. In [10], a bulk-gate controlled circuit is presented for PSRR improvement. Even when the consumption current was reduced, high PSRR characteristics up to 77 and 64.3 db at 10 Hz and 1kHz have been confirmed using this technique. 2. PROPOSED LDO STRUCTURE The proposed technique takes advantage of body effect to reduce the threshold voltage of the pass transistor for any given current load. The change of threshold voltage of a MOS transistor as a function of its source to bulk voltage is referred to as body effect. For long-channel devices, the threshold can be approximated by [17]: h = h +( + 2 (2 ) where Vth is the threshold voltage of the device for VSB 0, and Vth0 is the nominal threshold voltage value for VSB = 0, γ is the body-bias coefficient and 2 F is the surface potential. Given that for PMOS transistors γ < 0, from (1), it can be seen that by decreasing the bulk voltage in PMOS transistors the absolute value of the threshold voltage decreases. For a fixed VSG, this change in the threshold voltage will result in an increase in the drain-source current and vice versa. Since the effect of the bulk voltage on the drain-source current is similar to that of the gate voltage, the body effect is sometimes referred to as back-gate effect [17]. Figure 2 Block Diagram of Proposed LDO Voltage Regulator In the proposed structure Fig.2, bulk of the pass transistor is connected to the output of an extra error amplifier with a higher bandwidth and amplifier with a larger DC gain is connected to the gate of the pass transistor. Therefore, the main error amplifier will provide the high DC gain for accurate regulation while the bulk amplifier provides agile response to the output changes. Maximum load current which is decided by the size of the pass transistor. For a given aspect ratio of the pass transistor, bulk modulation improves the output current delivery and we can achieve the same current delivery with a smaller pass transistor editor@iaeme.com

4 Peterson Basra and Dr. Anil Kumar Sharma 3. PROPOSED BULK MODULATION TECHNIQUE The proposed bulk modulation technique discuss different performance metrics of the regulator. More specifically, in the time domain, the recovery time of the regulator for different types of line and load regulations are analyzed. simulation results are done on Or CAD Capture CIS tools. Note that in the proposed technique special attention must be paid prototype is implemented in a 0.13 µm CMOS technology. Bulk modulation improves the output current delivery. The proposed technique take advantage of body effect to reduce the threshold voltage of pass transistor for any given current load. The change of threshold voltage of MOS transistor as a function as a function of its source to bulk voltage is referred to as Body Effect Figure 3 Schematic of proposed LDO Voltage Regulator A. Driving Capability: one of the main benefits of modulating the bulk of the pass transistor is that for a given aspect ratio of the pass transistor, bulk modulation improves the output current delivery. On the same token, using bulk modulation one can achieve the same current delivery with a smaller pass transistor. To improve the current delivery for a given transistor overdrive voltage, we rely on the fact that one can reduce the threshold voltage of the pass transistor by applying a proper voltage (refer to equation Vth ) to its bulk. To reduce the threshold voltage, the applied bulk voltage has to be lower than the source voltage, i.e. VIN of the regulator. B. Transient Behaviour : The load-regulation recovery time is an important performance metric of LDO regulators, in particular, for regulators that are used for supplying power to digital or mixed-signal circuits with a high-activity blocks. Referring to Fig.3, it can be shown that for agile changes in the load current, the recovery time of the output voltage can be written as [18] 1 + "# $% = 1 * + & $ "# '( $ + $% Where BWcl is the close-loop bandwidth of the regulator and tslew is the time delay due to the slewing of the error amplifier while driving the pass transistor. Cpar is the total parasitic capacitance seen at the output of the error amplifier (mainly dominated by the gate capacitance of the pass transistor) and VA and Islew are the output voltage change and maximum slew current of the error amplifier editor@iaeme.com

5 Design of Low Dropout (LDO) Voltage Regulator Using Bulk Modulation Technique Figure 4 Recovery Time Analysis for LDO Regulator in Sudden Decrease and Increase of the Load Current. 4. SIMULATION AND EXPERIMENTAL RESULTS The proposed regulator is fabricated in a 0.13-µm CMOS technology. The area of the proposed regulator is µm 2. The simulated and measured steady-state (DC), transient, of the regulators are compared to confirm the performance of the presented structure. A. DC RESPONSE The proposed regulator draws µa from a 1.2 V supply for ILoad = 3mA, which is 53% more than the conventional regulator due to the use of additional bulk amplifier. In particular, EA-a draws 38.6 µa, EA-b draws µa, and reference voltage and biasing circuits draw 9.43 µa from the supply. As we expected the regulator with the bulk modulated technique will drain more current in higher temperature since we have addition error amplifier. Fig. 5 illustrates the DC line regulation of the proposed regulator and it confirms that using the proposed bulk modulator technique the regulator works with a lower supply voltage. This feature can be attributed to the fact that the threshold voltage of the pass transistor at low input voltages is decreased which in turn makes the regulator more responsive to lower input voltages. The lower turn-on voltage can be very useful in low-power applications. The magnitude of the measured DC line regulation for the proposed regulator is 1.48%. Figure 5 DC Response of the Proposed Regulator to Different input DC Voltage. B. TRANSIENT RESPONSE One of the important performance metrics for any LDO regulator is its start-up time which indicates how fast the regulator can provide the regulated voltage. Fig. 4.2 presents the startup time of the proposed regulator. Note that the proposed bulk modulation technique has an improved start-up of 0.32µs. This improvement can be attributed to the wideband bulk error 63 editor@iaeme.com

6 Peterson Basra and Dr. Anil Kumar Sharma amplifier as well as the lowering of the threshold voltage of the pass transistor. In this experiment a pulse input voltage with raising time of 5 ns is applied at 2 ma of load current. Figure 6 Measured Start-up Transition of the Regulators for Current load of 2 ma Figure 7 Line Regulation for Load Current of 2 ma Line regulation is another important performance parameter of LDOs. The measured line regulation performance is presented in Fig. and it is observed that the proposed technique slightly enhances the line regulation performance Figure 8 Measured Transient Response of Regulator, when the Load Current Suddenly Changes to 0 ma 64 editor@iaeme.com

7 Design of Low Dropout (LDO) Voltage Regulator Using Bulk Modulation Technique Table 1 Performance and Summery Comparison 5. CONCLUSION The design and limitations of the LDO voltage regulators were analyzed and different LDO voltage regulator topologies were studied, in order to obtain a simple and robust circuit that has potential to accomplish the proposed specifications. The use of several techniques to improve various performance parameters of the LDO were considered. Design of an LDO has several issues to be considered on tradeoffs between stability and performance of the system. The proposed technique modulates the bulk voltage of the pass element to enhance the performance of the LDO. The extra error amplifier used to drive the bulk of the pass transistor draws an additional 51 µa technique increases the closed-loop bandwidth of the regulator which in turn improves the transition recovery time for no-load to and from full-load conditions, thus, making it suitable for applications where load conditions may change rapidly. Table 1 presents the performance summary of the proposed LDO and compares it with a conventional LDO regulator without bulk modulation as well as other state-of the-art LDOs. It is observed that the proposed LDO has the least recovery time of 0.16 µs with an active area of mm2 which makes it ideal choice for portable devices and many biomedical implants. Although LDO presented in [5] has recovery time of ~0.15 µs but it has larger active area of mm2. The proposed Bulk Modulation technique can also be applied to other LDO structures. REFERENCES [1] H. Iwai, CMOS technology-year 2010 and beyond, Solid-State Circuits, IEEE Journal of, vol. 34, no. 3, pp , [2] G. Moore, Progress in digital integrated electronics, 1975 International Electron Devices Meeting. (Technical digest), pp , [3] P. Woerlee, M. Knitel, R. van Langevelde, D. Klaassen, L. Tiemeijer, A. Scholten, and A. Zegers-van Duijnhoven, RF-CMOS performance trends, Electron Devices, IEEE Transactions on, 48(8), pp , [4] S. Thompson, P. Packan, and M. Bohr, MOS Scaling: Transistor Challenges for the 21st Century, Intel Technology Journal, Volume Q3, editor@iaeme.com

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