LT1970A 500mA Power Op Amp with Adjustable Precision Current Limit FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION

Transcription

1 FEATURES n ±5mA Minimum Output Current n Independent Adjustment of Source and Sink Current Limits n 1% Current Limit Accuracy n Improved Reactive Load Driving Stabiity n Operates with Singe or Spit Suppies n Shutdown/Enabe Contro Input n Open-Coector Status Fags: Sink Current Limit Source Current Limit Therma Shutdown n Fai-Safe Current Limit and Therma Shutdown n 1.6V/μs Sew Rate n 3.6MHz Gain-Bandwidth Product n Specified Temperature Range: 4 C to 85 C n Avaiabe in a 2-Lead TSSOP Package APPLICATIONS n Automatic Test Equipment n Laboratory Power Suppies n Motor Drivers n Thermoeectric Cooer Driver L, LT, LTC, LTM, Linear Technoogy and the Linear ogo are registered trademarks of Linear Technoogy Corporation. A other trademarks are the property of their respective owners. TYPICAL APPLICATION Device Power Suppy (DPS) with ±5mA Adjustabe Current Limit DESCRIPTION LT197A 5mA Power Op Amp with Adjustabe Precision Current Limit The LT 197A is a ±5mA power op amp with precise externay controed current imiting. Separate contro votages program the sourcing and sinking current imit sense threshods with 1% accuracy. Output current may be boosted by adding externa power transistors. The circuit operates with singe or spit power suppies from 5V to 36V tota suppy votage. In norma operation, the input stage suppies and the output stage suppies are connected (V CC to V and to ). To reduce power dissipation it is possibe to power the output stage (V, ) from independent, ower votage rais. The ampifier is unity-gain stabe with a 3.6MHz gain-bandwidth product and sews at 1.6V/μs. The LT197A can drive capacitive and inductive oads directy. Open-coector status fags signa current imit circuit activation, as we as therma shutdown of the ampifier. An enabe ogic input puts the ampifier into a ow power, high impedance output state when pued ow. Therma shutdown and a ±8mA fixed current imit protect the chip under faut conditions. The LT197A is packaged in a 2-ead TSSOP package with a thermay conductive copper bottom pate to faciitate heat sinking. V LIMIT V TO 5V 2V 2V V IN V CC V IN VCSNK 6k V I LIMIT (MAX) = ± CS I CURRT LIMIT = 5mA V LOAD, R LOAD = 1Ω LT197A SSE R CS 1Ω 1/4W SSE TRACE R 1mΩ TRACE L 2nH 4.7μF ESR.1Ω LOAD 2V/DIV V V LOAD, R LOAD = 1Ω V IN, 5V/DIV 197A TA1 5V 1k 1pF 1μs/DIV 197A TA1b 197afa 1

2 LT197A ABSOLUTE MAXIMUM RATINGS (Note 1) Suppy Votage (V CC to )... 36V Positive High Current Suppy (V )... to V CC Negative High Current Suppy( )... to V Ampifier Output ()... to V Current Sense Pins (SSE,, )... to V Logic Outputs (,, )... to V CC Input Votage (, IN)....3V to 36V Input Current... 1mA Current Contro Inputs (, )... to 7V Enabe Logic Input... to V CC... to V CC Output Short-Circuit Duration... Indefinite Operating Temperature Range (Note 2)...4 C to 85 C Specified Temperature Range (Note 3) LT197AC... C to 7 C LT197AI... 4 C to 85 C Maximum Junction Temperature C Storage Temperature Range C to 15 C Lead Temperature (Sodering, 1 sec)... 3 C PIN CONFIGURATION SSE V CC 7 8 IN 9 1 TOP VIEW V ABLE FE PACKAGE 2-LEAD PLASTIC TSSOP T JMAX = 15 C, θ JA = 4 C/W (NOTE 8) EXPOSED PAD (PIN 21) IS CONNECTED TO ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT197ACFE#PBF LT197ACFE#TRPBF LT197AFE 2-Lead Pastic TSSOP C to 7 C LT197AIFE#PBF LT197AIFE#TRPBF LT197AFE 2-Lead Pastic TSSOP 4 C to 85 C Consut LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a abe on the shipping container. Consut LTC Marketing for information on non-standard ead based finish parts. For more information on ead free part marking, go to: For more information on tape and ree specifications, go to: ELECTRICAL CHARACTERISTICS The denotes the specifications which appy over the fu operating temperature range, otherwise specifications are at T A = 25 C. See Test Circuit for standard test conditions. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Op Amp Characteristics V OS Input Offset Votage 2 6 μv C < T A < 7 C 4 C < T A < 85 C 1 13 μv μv Input Offset Votage Drift (Note 4) μv/ C I OS Input Offset Current V CM = V 1 1 na I B Input Bias Current V CM = V 6 16 na Input Noise Votage.1Hz to 1Hz 3 μv P-P 2 197afa

3 LT197A ELECTRICAL CHARACTERISTICS The denotes the specifications which appy over the fu operating temperature range, otherwise specifications are at T A = 25 C. See Test Circuit for standard test conditions. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS e n Input Noise Votage Density 1kHz 15 nv/ Hz i n Input Noise Current Density 1kHz 3 pa/ Hz R IN Input Resistance Common Mode Differentia Mode C IN Input Capacitance Pin 8 and Pin 9 to Ground 6 pf V CM Input Votage Range Typica V Guaranteed by CMRR Test V CMRR Common Mode Rejection Ratio < V CM < 12V db 5 1 kω kω PSRR Power Suppy Rejection Ratio = = 5V, V CC = V = 3V to 3V = = 5V, V CC = 3V, V = 2.5V to 3V = = 3V to 3V, V CC = V = 5V = 3V, = 2.5V to 3V, V CC = V = 5V A VOL Large-Signa Votage Gain R L = 1k, 12.5V < V < 12.5V R L = 1Ω, 12.5V < V < 12.5V R L = 1Ω, 5V < V < 5V, V = = 8V V OL Output Sat Votage Low V OL = V R L = 1, V CC = V = 15V, = = 15V R L = 1, V CC = = 15V, V = = 5V db db db db 15 V/mV V/mV 12 V/mV V/mV 45 V/mV V/mV 2.5 V V V OH Output Sat Votage High V OH = V V R L = 1, V CC = V = 15V, = = 15V R L = 1, V CC = = 15V, V = = 5V I SC Output Short-Circuit Current Output Low, R SSE = Ω Output High, R SSE = Ω V V SR Sew Rate 1V < V < 1V, R L = 1k V/μs FPBW Fu Power Bandwidth V = 1V PEAK (Note 5) 11 khz GBW Gain-Bandwidth Product f = 1kHz 3.6 MHz t S Setting Time.1%, V = V to 1V, A V = 1, R L = 1k 8 μs Current Sense Characteristics V SSE(MIN) Minimum Current Sense Votage = = V mv.1 1 mv V SSE(4%) Current Sense Votage 4% of Fu Scae = =.2V mv V SSE(1%) Current Sense Votage 1% of Fu Scae = =.5V mv V SSE(FS) Current Sense Votage 1% of Fu Scae = = 5V mv mv I BI Current Limit Contro Input Bias Current, Pins μa I Input Current V < (, ) < 5V 5 5 na I Input Current V < (, ) < 5V 5 5 na I SSE SSE Input Current = = V = 5V, = V = V, = 5V = = 5V Current Sense Change with Output Votage = = 5V, 12.5V < V < 12.5V ±.1 % ma ma na μa μa μa Current Sense Change with Suppy Votage = = 5V, 6V < (V CC, V ) < 18V 2.5V < V < 18V, V CC = 18V 18V < (, ) < 2.5V 18V < < 2.5V, = 18V ±.5 ±.1 ±.5 ±.1 % % % % 197afa 3

4 LT197A ELECTRICAL CHARACTERISTICS The denotes the specifications which appy over the fu operating temperature range, otherwise specifications are at T A = 25 C. See Test Circuit for standard test conditions. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Current Sense Bandwidth 2 MHz R CSF Resistance to Ω Logic I/O Characteristics Logic Output Leakage,, V = 15V 1 μa Logic Low Output Leve I = 5mA (Note 6).2.4 V Logic Output Current Limit 25 ma V ABLE Enabe Logic Threshod V I ABLE Enabe Pin Bias Current 1 1 μa I SUPPLY Tota Suppy Current V CC, V and, Connected 7 13 ma I CC V CC Suppy Current V CC, V and, Separate 3 7 ma I CC(STBY) Suppy Current Disabed V CC, V and, Connected, V ABLE.8V ma t ON Turn-On Deay (Note 7) 1 μs t OFF Turn-Off Deay (Note 7) 1 μs Note 1: Stresses beyond those isted under Absoute Maximum Ratings may cause permanent damage to the device. Exposure to any Absoute Maximum Rating condition for extended periods may affect device reiabiity and ifetime. Note 2: The LT197AC is guaranteed functiona over the operating temperature range of 4 C and 85 C. Note 3: The LT197AC is guaranteed to meet specified performance from C to 7 C. The LT197AC is designed, characterized and expected to meet specified performance from 4 C to 85 C but is not tested or QA samped at these temperatures. The LT197AI is guaranteed to meet specified performance from 4 C to 85 C. Note 4: This parameter is not 1% tested. Note 5: Fu power bandwidth is cacuated from sew rate measurements: FPBW = SR/(2 π V P ) Note 6: The ogic ow output eve of pin is guaranteed by correating the output eve of pin and pin over temperature. Note 7: Turn-on and turn-off deay are measured from V ABLE crossing 1.6V to the pin at 9% of norma output votage. Note 8: Therma resistance varies depending upon the amount of PC board meta attached to the device. If the maximum dissipation of the package is exceeded, the device wi go into therma shutdown and be protected. TYPICAL PERFORMANCE CHARACTERISTICS V OS Warm-Up Drift V IO vs Time Input Bias Current vs V CM vs Suppy Votage Tota Suppy Current TIME (1ms/DIV) 197A G1 V INPUT BIAS CURRT (na) 1 14 V S = ±15V I CC I V 125 C C I BIAS I BIAS 2 55 C 18 I EE I V C C C MODE INPUT VOLTAGE (V) SUPPLY VOLTAGE (±V) TOTAL SUPPLY CURRT (ma) 197A G2 197A G afa

5 TYPICAL PERFORMANCE CHARACTERISTICS LT197A SUPPLY CURRT (ma) Suppy Current vs Suppy Votage I VCC I VEE I V I V.5 T A = 25 C V CC = V = = SUPPLY VOLTAGE (±V) 187A G4 OP-LOOP GAIN (db) Open-Loop Gain and Phase vs Frequency 3 1 1k GAIN PHASE 1k 1k 1M 1M 1M FREQUCY (Hz) 197A G PHASE MARGIN (DEG) PHASE MARGIN (DEG) Phase Margin vs Suppy Votage A V = 1 R F = R G = 1k T A = 25 C V = V S / TOTAL SUPPLY VOLTAGE (V) 197A G6 GAIN BANDWIDTH (MHz) Gain Bandwidth vs Suppy Votage Gain vs Frequency Gain vs Frequency with C LOAD A V = 1 VOLTAGE GAIN (db) A V = 1 V S = ±15V V S = ±5V VOLTAGE GAIN (db) V S = ±15V A V = 1 3nF 1nF nf 1nF TOTAL SUPPLY VOLTAGE (V) 4 1k 1k 1M 1M FREQUCY (Hz) 4 1k 1k 1M 1M FREQUCY (Hz) 197A G7 197A G8 197A G9 PUT IMPEDANCE (Ω) k Output Impedance Disabed Output Impedance Sew Rate vs Suppy Votage V S = ±15V A V = 1 1k A V = 1 A V = 1 1k 1M 1M 1M FREQUCY (Hz) 197A G1 PUT IMPEDANCE (Ω) 6k 1k 1k 1k k V S = ±15V V ABLE =.8V 1k 1k 1M 1M 1M FREQUCY (Hz) 197A G11 SLEW RATE (V/μs) A V = 1 R F = R G = 1k T A = 25 C FALLING RISING SUPPLY VOLTAGE (±V) A G12 197afa 5

6 LT197A TYPICAL PERFORMANCE CHARACTERISTICS 2.5 Sew Rate vs Temperature Large-Signa Response, A V = 1 Large-Signa Response, A V = 1 V S = ±15V FALLING SLEW RATE (V/μs) RISING 5V/DIV 1V V 1V 5V/DIV 1V V 1V TEMPERATURE ( C) R L = 1k 2μs/DIV 197A G14 R L = 1k C L = 1pF 2μs/DIV 197A G15 197A G13 Sma-Signa Response, A V = 1 Sma-Signa Response, A V = 1 Output Overdriven 2mV/DIV 2mV/DIV V 5V/DIV V V IN 5V/DIV V R L = 1k 5ns/DIV 197A G16 R L = 1k 2μs/DIV 197A G17 C L = 1pF V S = ±5V A V = 1 2μs/DIV 197A G18 OVERSHOOT (%) Undistorted Output Swing % Overshoot vs C LOAD vs Frequency V S = ±15V A V = 1 A V = 1 1 1k 1k C LOAD (pf) PUT SWING (V P-P ) V S = ±15V A V = 5 1% THD 1 1k 1k 1k FREQUCY (Hz) V SSE (mv) Fu Range Current Sense Transfer Curve V CSNK = V CSRC (V) SOURCING CURRT SINKING CURRT 197A G19 197A G2 197A G afa

7 TYPICAL PERFORMANCE CHARACTERISTICS LT197A V SSE (mv) Low Leve Current Sense Transfer Curve SOURCING CURRT SINKING CURRT LOGIC PUT VOLTAGE (V) Logic Output Leve vs Sink Current (Output Low) 1. V = 15V.9 = 15V 125 C 25 C 55 C PUT CURRT (ma) Maximum Output Current vs Temperature V = 15V = 15V SOURCE SINK V CSNK = V CSRC (mv) SINK CURRT (ma) TEMPERATURE ( C) 197A G22 197A G23 197A G24 I PEAK (ma) Safe Operating Area I AT 1% DUTY CYCLE SUPPLY VOLTAGE (V) 197A G25 PUT STAGE CURRT (ma) Output Stage Quiescent Current vs Suppy Votage I V I V 125 C 25 C 55 C 55 C 25 C 125 C SUPPLY VOLTAGE (±V) 197A G26 SUPPLY CURRT (ma) Contro Stage Quiescent Current vs Suppy Votage I CC I EE 125 C 25 C 55 C 55 C 25 C 125 C SUPPLY VOLTAGE (±V) 197A G27 TOTAL SUPPLY CURRT, I CC I V (μa) Suppy Current vs Suppy Votage in Shutdown 8 V ABLE = V C 25 C 55 C SUPPLY VOLTAGE (V) 197A G28 197afa 7

8 LT197A PIN FUNCTIONS (Pins 1, 1, 11, 2, 21): Minus Suppy Votage. connects to the substrate of the integrated circuit die, and therefore must aways be the most negative votage appied to the part. Decoupe to ground with a ow ESR capacitor. may be a negative votage or it may equa ground potentia. Any or a of the pins may be used. Unused pins must remain open. (Pin 2): Output Stage Negative Suppy. may equa or may be smaer in magnitude. Ony output stage current fows out of, a other current fows out of. may be used to drive the base/gate of an externa power device to boost the ampifier s output current to eves above the rated 5mA of the on-chip output devices. Uness used to drive boost transistors, shoud be decouped to ground with a ow ESR capacitor. (Pin 3): Ampifier Output. The pin provides the force function as part of a Kevin sensed oad connection. is normay connected directy to an externa oad current sense resistor and the SSE pin. Ampifier feedback is directy connected to the oad and the other end of the current sense resistor. The oad connection is aso wired directy to the pin to monitor the oad current. The pin is current imited to ±8mA typica. This current imit protects the output transistor in the event that connections to the externa sense resistor are opened or shorted which disabes the precision current imit function. SSE (Pin 4): Positive Current Sense Pin. This ead is normay connected to the driven end of the externa sense resistor. Sourcing current imit operation is activated when the votage V SSE (V SSE V ) equas 1/1 of the programming contro votage at (Pin 13). Sinking current imit operation is activated when the votage V SSE equas 1/1 of the programming contro votage at (Pin 12). (Pin 5): Current Sense Fiter Pin. This pin is normay not used and shoud be eft open or shorted to the pin. The pin can be used to adapt the response time of the current sense ampifiers with a 1nF to 1nF capacitor connected to the input. An interna 1k resistor sets the fiter time constant. (Pin 6): Negative Current Sense Pin. This pin is normay connected to the oad end of the externa sense resistor. Sourcing current imit operation is activated when the votage V SSE (V SSE V ) equas 1/1 of the programming contro votage at (Pin 13). Sinking current imit operation is activated when the votage V SSE equas 1/1 of the programming contro votage at (Pin 12). V CC (Pin 7): Positive Suppy Votage. A circuitry except the output transistors draw power from V CC. Tota suppy votage from V CC to must be between 3.5V and 36V. V CC must aways be greater than or equa to V. V CC shoud aways be decouped to ground with a ow ESR capacitor. (Pin 8): Inverting Input of Ampifier. may be any votage from.3v to 36V. and IN remain high impedance at a times to prevent current fow into the inputs when current imit mode is active. Care must be taken to ensure that or IN can never go to a votage beow.3v even during transient conditions or damage to the circuit may resut. A Schottky diode from to can provide camping if other eements in the circuit can aow to go beow. IN (Pin 9): Noninverting Input of Ampifier. IN may be any votage from.3v to 36V. and IN remain high impedance at a times to prevent current fow into the inputs when current imit mode is active. Care must be taken to ensure that or IN can never go to a votage beow.3v even during transient conditions or damage to the circuit may resut. A Schottky diode from to IN can provide camping if other eements in the circuit can aow IN to go beow afa

9 PIN FUNCTIONS (Pin 12): Sink Current Limit Contro Votage Input. The current sink imit ampifier wi activate when the sense votage between SSE and equas 1. V VCSNK /1. may be set between V and V 6V. The transfer function between and V SSE is inear except for very sma input votages at < 6mV. V SSE imits at a minimum set point of 4mV typica to ensure that the sink and source imit ampifiers do not try to operate simutaneousy. To force zero output current, the ABLE pin can be taken ow. (Pin 13): Source Current Limit Contro Votage Input. The current source imit ampifier wi activate when the sense votage between SSE and equas V VCSRC /1. may be set between V and V 6V. The transfer function between and V SSE is inear except for very sma input votages at < 6mV. V SSE imits at a minimum set point of 4mV typica to ensure that the sink and source imit ampifiers do not try to operate simutaneousy. To force zero output current, the ABLE pin can be taken ow. (Pin 14): Contro and ABLE inputs and fag outputs are referenced to the pin. may be at any potentia between and V CC 3V. In typica appications, is connected to ground. ABLE (Pin 15): ABLE Digita Input Contro. When taken ow this TTL-eve digita input turns off the ampifier output and drops suppy current to ess than 1mA. Use the ABLE pin to force zero output current. Setting = = V aows I = ±4mV/R SSE to fow in or out of V. (Pin 16): Sourcing Current Limit Digita Output Fag. is an open-coector digita output. pus ow whenever the sourcing current imit ampifier assumes contro of the output. This pin can sink up to 1mA of LT197A current. The current imit fag is off when the source current imit is not active., and may be wired OR together if desired. may be eft open if this function is not monitored. (Pin 17): Sinking Current Limit Digita Output Fag. is an open-coector digita output. pus ow whenever the sinking current imit ampifier assumes contro of the output. This pin can sink up to 1mA of current. The current imit fag is off when the source current imit is not active., and may be wired OR together if desired. may be eft open if this function is not monitored. (Pin 18): Therma Shutdown Digita Output Fag. is an open-coector digita output. pus ow whenever the interna therma shutdown circuit activates, typicay at a die temperature of 16 C. This pin can sink up to 1mA of output current. The fag is off when the die temperature is within norma operating temperatures., and may be wired OR together if desired. may be eft open if this function is not monitored. Therma shutdown activation shoud prompt the user to evauate eectrica oading or therma environmenta conditions. V (Pin 19): Output Stage Positive Suppy. V may equa V CC or may be smaer in magnitude. Ony output stage current fows through V, a other current fows into V CC. V may be used to drive the base/gate of an externa power device to boost the ampifier s output current to eves above the rated 5mA of the on-chip output devices. Uness used to drive boost transistors, V shoud be decouped to ground with a ow ESR capacitor. Exposed Pad (Pin 21): The exposed backside of the package is eectricay connected to the pins on the IC die. The package base shoud be sodered to a heat spreading pad on the PC board that is eectricay connected to. 197afa 9

10 LT197A BLOCK DIAGRAM AND TEST CIRCUIT R F 1k V CC V V 15V R G 1k 5V V IN 1k 1k 1k IN ABLE GM1 ABLE D1 D2 I SNK I SRC 1 V SNK V SRC R FIL 1k Q1 Q2 SSE 1, 1, 11, R CS 1Ω 15V R LOAD 1k 197ATC APPLICATIONS INFORMATION The LT197A power op amp with precision controabe current imit is a fexibe votage and current source modue. The drawing on the front page of this data sheet is representative of the basic appication of the circuit, however many aternate uses are possibe with proper understanding of the subcircuit capabiities. CIRCUIT DESCRIPTION Main Operationa Ampifier Subcircuit bock GM1, the 1X unity-gain current buffer and output transistors Q1 and Q2 form a standard operationa ampifier. This ampifier has ±5mA current output capabiity and a 3.6MHz gain-bandwidth product. Most appications of the LT197A wi use this op amp in the main signa path. A conventiona op amp circuit configurations are supported. Inverting, noninverting, fiter, summation or noninear circuits may be impemented in a conventiona manner. The output stage incudes current imiting at ±8mA to protect against faut conditions. The input stage has high differentia breakdown of 36V minimum between and IN. No current wi fow at the inputs when differentia input votage is present. This feature is important when the precision current sense ampifiers I SINK and I SRC become active. Current Limit Ampifiers Ampifier stages I SINK and I SRC are very high transconductance ampifier stages with independenty controed offset votages. These ampifiers monitor the votage between input pins SSE and which usuay sense the votage across a sma externa current sense resistor. The transconductance ampifiers outputs connect to the same high impedance node as the main input stage GM1 ampifier. Sma votage differences between SSE and, smaer than the user set / afa

11 APPLICATIONS INFORMATION and /1 in magnitude, cause the current imit ampifiers to decoupe from the signa path. This is functionay indicated by diodes D1 and D2 in the Bock Diagram. When the votage V SSE increases in magnitude sufficient to equa or overcome one of the offset votages /1 or /1, the appropriate current imit ampifier becomes active and because of its very high transconductance, takes contro from the input stage, GM1. The output current is reguated to a vaue of I = V SSE /R SSE = ( or )/(1 R SSE ). The time required for the current imit ampifiers to take contro of the output is typicay 4μs. Linear operation of the current imit sense ampifier occurs with the inputs SSE and ranging between V CC 1.5V and 1.5V. Most appications wi connect pins SSE and together, with the oad on the opposite side of the externa sense resistor and pin. Feedback to the inverting input of GM1 shoud be connected from to. Ground side sensing of oad current may be empoyed by connecting the oad between pins and SSE. Pin woud be connected to ground in this instance. Load current woud be reguated in exacty the same way as the conventiona connection. However, votage mode accuracy woud be degraded in this case due to the votage across R SSE. Creative appications are possibe where pins SSE and monitor a parameter other than oad current. The operating principe that at most one of the current imit stages may be active at one time, and that when active, the current imit stages take contro of the output from GM1, can be used for many different signas. Current Limit Threshod Contro Buffers Input pins and are used to set the response threshods of current imit ampifiers I SINK and I SRC. Each of these inputs may be independenty driven by a votage of V to 5V above the reference pin. The V to 5V input votage is attenuated by a factor of 1 and appied as an offset to the appropriate current imit ampifier. AC signas may be appied to these pins. The AC bandwidth from a V C pin to the output is typicay 2MHz. For proper operation of the LT197A, these contro inputs cannot be eft foating. LT197A For ow V CC suppy appications it is important to keep the maximum input contro votages, and, at east 2.5V beow the V CC potentia. This ensures inear contro of the current imit threshod. Reducing the current imit sense resistor vaue aows high output current from a smaer contro votage which may be necessary if the V CC suppy is ony 5V. The transfer function from V C to the associated V OS is inear from about.1v to 5V in, or 1mV to 5mV at the current imit ampifier inputs. An intentiona noninearity is buit into the transfer functions at ow eves. This noninearity ensures that both the sink and source imit ampifiers cannot become active simutaneousy. Simutaneous activation of the imit ampifiers coud resut in uncontroed outputs. As shown in the Typica Performance Characteristics curves, the contro inputs have a hockey stick shape, to keep the minimum imit threshod at 4mV for each imit ampifier. Figure 1 iustrates an interesting use of the current sense input pins. Here the current imit contro ampifiers are used to produce a symmetricay imited output votage swing. Instead of monitoring the output current, the output votage is divided down by a factor of 2 and appied to the SSE input, with the input grounded. When the threshod votage between SSE and (V CLAMP /1) is reached, the current imit stage takes contro of the output and camps it a eve of ±2 V CLAMP. With contro inputs and tied together, a singe poarity input votage sets the same and output imit votage for symmetrica imiting. In this circuit the output wi current imit at the buit-in fai-safe eve of typicay 8mA. ABLE Contro The ABLE input pin puts the LT197A into a ow suppy current, high impedance output state. The ABLE pin responds to TTL threshod eves with respect to the pin. Puing the ABLE pin ow is the best way to force zero current at the output. Setting = = V aows the output current to remain as high as ±4mV/R SSE. 197afa 11

12 LT197A APPLICATIONS INFORMATION V CLAMP OV TO 5V V IN R G IN VCC V LT197A SSE 12V R3 3k Figure 1. Symmetrica Output Votage Limiting R F ±CLAMP REACHED 8mV TO 1V 8mV TO 1V PUT CLAMPS AT 2 V CLAMP R1 21.5k R L R2 1.13k 197A F1 5V ABLE DISABLE V 5V V IN V 1V/DIV V 1V/DIV V V IN =.5V V IN =.5V 5μs/DIV 12V IN VCC V LT197A SSE R S 1Ω R L 1Ω In appications such as circuit testers (ATE), it may be preferabe to appy a predetermined test votage with a preset current imit to a test node simutaneousy. The ABLE pin can be used to provide this gating action as shown in Figure 2. Whie the LT197A is disabed, the oad is essentiay foating and the input votage and current imit contro votages can be set to produce the oad test eves. Enabing the LT197A then drives the oad. The LT197A enabes and disabes in just a few microseconds. The actua enabe and disabe times at the oad are a function of the oad reactance. Operating Status Fags The LT197A has three digita output indicators;, and. These outputs are open-coector drivers referred to the pin. The outputs have 36V capabiities and can sink in excess of 1mA. and indicate activation of the associated current imit ampifier. The output indicates excessive die temperature has caused the circuit to enter therma shutdown. The three digita outputs may be wire OR d together, monitored individuay or eft open. These outputs do not affect circuit operation, but provide an indication of the present operationa status of the chip. 12 R G 1k R F 1k Figure 2. Using the ABLE pin 197A F2 For sow varying output signas, the assertion of a ow eve at the current imit output fags occurs when the current imit threshod is reached. For fast moving signas where the LT197A output is moving at the sew imit, typicay 1.6V/μs, the fag assertion can be somewhat premature at typicay 75% of the actua current imit vaue. The operating status fags are designed to drive LEDs to provide a visua indication of current imit and therma conditions. As such, the transition edges to and from the active ow state are not particuary sharp and may exhibit some uncertainty. Adding some positive feedback to the current imit contro inputs heps to sharpen these transitions. With the vaues shown in Figure 3, the current imit threshod is reduced by approximatey.5% when either current imit status fag goes ow. With sharp ogic transitions, the status outputs can be used in a system contro oop to take protective measures when a current imit condition is detected automaticay. 197afa

13 APPLICATIONS INFORMATION LT197A CURRT LIMIT CONTROL VOLTAGE (.1V TO 5V) R1 1Ω R2 1Ω R3 2k R4 2k I SOURCE FLAG I SINK FLAG I 5mA 5mA I MAX I LOW V IN 12V IN VCC V LT197A SSE WH CURRT LIMIT IS FLAGGED, I LIMIT TRESHOLD IS REDUCED BY.5% R S 1Ω R L R2 39.2k 5mA R1 54.9k 12V R3 2.55k V CC I MAX S V CC I LOW S R G 197A F3 Figure 3. Adding Positive Feedback to Sharpen the Transition Edges of the Current Limit Status Fags The current imit status fag can aso be used to produce a dramatic change in the current imit vaue of the ampifier. Figure 4 iustrates a snap-back current imiting characteristic. In this circuit, a simpe resistor network initiay sets a high vaue of current imit (5mA). The circuit operates normay unti the signa is arge enough to enter current imit. When either current imit fag goes ow, the current imit contro votage is reduced by a factor of 1. This then forces a ow eve of output current (5mA) unti the signa is reduced in magnitude. When the oad current drops beow the ower eve, the current imit is then restored to the higher vaue. This action is simiar to a sef resettabe fuse that trips at dangerousy high current eves and resets ony when conditions are safe to do so. THERMAL MANAGEMT Minimizing Power Dissipation The LT197A can operate with up to 36V tota suppy votage with output currents up to ±5mA. The amount of power dissipated in the chip coud approach 18W under worst-case conditions. This amount of power wi cause die temperature to rise unti the circuit enters therma R F V IN R G 1k IN VCC V LT197A SSE R F 1k R S 1Ω Figure 4. Snap-Back Current Limiting 197A F4 shutdown. Whie the therma shutdown feature prevents damage to the circuit, norma operation is impaired. Therma design of the LT197A operating environment is essentia to getting maximum utiity from the circuit. The first concern for therma management is minimizing the heat which must be dissipated. The separate power pins V and can be a great aid in minimizing on-chip power. The output pin can swing to within 1.V of V or even under maximum output current conditions. Using separate power suppies, or votage reguators, to set V and to their minimum vaues for the required output swing wi minimize power dissipation. The suppies V CC and may aso be reduced to a minima vaue, but these suppy pins do not carry high currents, and the power saving is much ess. V CC and must be greater than the maximum output swing by 1.5V or more. R L 197afa 13

14 LT197A APPLICATIONS INFORMATION When and V are provided separatey from V CC and, care must be taken to ensure that and V are aways ess than or equa to the main suppies in magnitude. Protection Schottky diodes may be required to ensure this in a cases, incuding power on/off transients. Operation with reduced V and suppies does not affect any performance parameters except maximum output swing. A DC accuracy and AC performance specifications guaranteed with V CC = V and = are sti vaid with the reduced output signa swing range. Heat Sinking The power dissipated in the LT197A die must have a path to the environment. With 1 C/W therma resistance in free air with no heat sink, the package power dissipation is imited to ony 1W. The 2-pin TSSOP package with exposed copper underside is an efficient heat conductor if it is effectivey mounted on a PC board. Therma resistances as ow as 4 C/W can be obtained by sodering the bottom of the package to a arge copper pattern on the PC board. For operation at 85 C, this aows up to 1.625W of power to be dissipated on the LT197A. At 25 C operation, up to 3.125W of power dissipation can be achieved. The PC board heat spreading copper area must be connected to. Figure 5 shows exampes of PCB meta being used for heat spreading. These are provided as a reference for what might be expected when using different combinations of meta area on different ayers of a PCB. These exampes are with a 4-ayer board using 1oz copper on each ayer. The most effective ayers for spreading heat are those cosest to the LT197A junction. Sodering the exposed therma pad of the TSSOP package to the board produces a therma resistance from junction-to-case of approximatey 3 C/W. As a minimum, the area directy beneath the package on a PCB ayers can be used for heat spreading. However, imiting the area to that of the meta heat sinking pad is not very effective. Expanding the area on various ayers significanty reduces the overa therma resistance. The addition of vias (sma 13 mi hoes which fi during PCB pating) connecting a ayers of meta aso heps reduce the operating temperature of the LT197A. These are aso shown in Figure 5. It is important to note that the meta panes used for heat sinking are connecting eectricay to. These panes must be isoated from any other power panes used in the PCB design. Another effective way to contro the power ampifier operating temperature is to use airfow over the board. Airfow can significanty reduce the tota therma resistance as aso shown in Figure 5. DRIVING REACTIVE LOADS Capacitive Loads The LT197A is much more toerant of capacitive oading than most operationa ampifiers. In a worst-case configuration as a votage foower, the circuit is stabe for capacitive oads ess than 2.5nF. Higher gain configurations improve the C LOAD handing. If very arge capacitive oads are to be driven, a resistive decouping of the ampifier from the capacitive oad is effective in maintaining stabiity and reducing peaking. The current sense resistor, usuay connected between the output pin and the oad can serve as a part of the decouping resistance. Inductive Loads Load inductance is usuay not a probem at the outputs of operationa ampifiers, but the LT197A can be used as a high output impedance current source. This condition may be the main operating mode, or when the circuit enters a protective current imit mode. Just as oad capacitance degrades the phase margin of norma op amps, oad inductance causes a peaking in the oop response of the feedback controed current source. The inductive oad may be caused by ong ead engths at the ampifier output. If the ampifier wi be driving inductive oads or ong ead engths (greater than 4 inches) a 5pF capacitor from the pin to the ground pane wi cance the inductive oad and ensure stabiity afa

15 APPLICATIONS INFORMATION LT197A STILL AIR JA PACKAGE TOP LAYER 2ND LAYER 3RD LAYER BOTTOM LAYER TSSOP 1 C/W TSSOP 5 C/W TSSOP 45 C/W 197A F5a 1 Typica Reduction in JA with Laminar Airfow Over the Device % REDUCTION RELATIVE TO JA IN STILL AIR REDUCTION IN JA (%) AIRFLOW (LINEAR FEET PER MINUTE, fpm) 197A F5b Figure 5. Exampes of PCB Meta Used for Heat Dissipation. Driver Package Mounted on Top Layer. Heat Sink Pad Sodered to Top Layer Meta. Meta Areas Drawn to Scae of Package Size 197afa 15

16 LT197A APPLICATIONS INFORMATION 5V V IN R1 95.3K LT V 5V SOURCING SINKING 12V 2.5V 12V IN VCC V LT197A SSE C1 5pF D1 1N41 R S 1Ω D2 1N41 197A F6 ±5mA MAGNETIC TRANSDUCER Figure 6. Current Moduation of a Magnetic Transducer OPTIONAL TEST PIN ON/OFF CONTROL APPLY LOAD DRIVE 5V V Hi-Z VCC 5V CLR VREF DAC A CODE C CODE D V = 15V ( ±15V 124 ) I SOURCE(MAX) = 4mA TO 5mA S I SINK(MAX) = 4mA TO 5mA S 18V CS/LD SCK DI 3-WIRE SERIAL INTERFACE DECODER DAC B DAC C DAC D R1 3.4k R3 3.4k R2 1.2k R5 3k IN VCC V LT197A SSE R6 3k R S 1Ω 1μF FORCE SSE.1μF TEST PIN LOAD LTC1664 QUAD 1-BIT DAC 18V R4 1.2k 1μF.1μF 197A F7 16 Figure 7. Digitay Controed Anaog Pin Driver 197afa

17 APPLICATIONS INFORMATION Figure 6 shows the LT197A driving an inductive oad with a controed amount of current. This oad is shown as a generic magnetic transducer, which coud be used to create and moduate a magnetic fied. Driving the current imit contro inputs directy forces a current through the oad that coud range up to 2MHz in moduation. Camp diodes are added to protect the LT197A output from arge inductive fyback potentias caused by rapid di/dt changes. Suppy Bypassing The LT197A can suppy arge currents from the power suppies to a oad at frequencies up to 4MHz. Power suppy impedance must be kept ow enough to deiver these currents without causing suppy rais to droop. Low ESR capacitors, such as.1μf or 1μF ceramics, ocated cose to the pins are essentia in a appications. When arge, high speed transient currents are present additiona capacitance may be needed near the chip. Check suppy rais with a scope and if signa reated rippe is seen on the suppy rai, increase the decouping capacitor as needed. To ensure proper start-up biasing of the LT197A, it is recommended that the rate of change of the suppy votages at turn-on be imited to be no faster than 6V/μs. Appication Circuit Ideas The digitay controed anaog pin driver is shown in Figure 7. A of the contro signas are provided by an LTC 1664 quad, 1-bit DAC by way of a 3-wire seria interface. The LT197A is configured as a simpe difference ampifier with a gain of 3. This gain is required to produce ±15V from the V to 5V outputs from DACs C and D. To provide votage headroom, the suppies for the LT197A are set to the maximum vaue of ±18V. As ±18V is the absoute maximum rating of suppy votage for the LT197A, care must be taken to not aow the suppy votage to increase. DACs A and B separatey contro the sinking and sourcing current imit to the oad over the range of ±4mA to ±5mA. An optiona on/off contro for the pin driver using the ABLE input is shown. If aways enabed the ABLE pin shoud be tied to V CC. In some appications it may be necessary to know what the current into the oad is at any time. Figure 8 shows an LT197A LT1787 high side current sense ampifier monitoring the current through sense resistor R S. The LT1787 is biased from the suppy to accommodate the common mode input range of ±1V. The sense resistor is scaed down to provide a 1mV maximum differentia signa to the current sense ampifier to preserve inearity. The LT188 ampifier provides gain and eve shifting to produce a V to 5V output signa (2.5V DC ±5mV/mA) with up to 1kHz fu-scae bandwidth. An A/D converter coud then digitize this instantaneous current reading to provide digita feedback from the circuit. The LT197A is just as easy to use as a standard operationa ampifier. Basic ampification of a precision reference votage creates a very simpe bench DC power suppy as shown in Figure 9. The buit-in power stage produces an adjustabe V to 25V at 4mA to 1mA of output current. Votage and current adjustments are derived from the LT V reference. The output current capabiity is 5mA, but this suppy is restricted to 1mA for power dissipation reasons. The worst-case output votage for maximum power dissipated in the LT197A output stage occurs if the output is shorted to ground or set to a votage near zero. Limiting the output current to 1mA sets the maximum power dissipation to 3W. To aow the output to range a the way to V, an LTC146 charge pump inverter is used to deveop a 5V suppy. This produces a negative rai for the LT197A which has to sink ony the quiescent current of the ampifier, typicay 7mA. Using a second LT197A, a V to ±12V dua tracking power suppy is shown in Figure 1. The midpoint of two 1k resistors connected between the and outputs is hed at V by the LT1881 dua op amp servo feedback oop. To maintain V, both outputs must be equa and opposite in poarity, thus they track each other. If one output reaches current imit and drops in votage, the other output foows to maintain a symmetrica and votage across a common oad. Again, the output current imit is ess than the fu capabiity of the LT197A due to therma reasons. Separate current imit indicators are used on each LT197A because one output ony sources current and the other ony sinks current. Both devices can share the same therma shutdown indicator, as the output fags can be OR ed together. 197afa 17

18 LT197A APPLICATIONS INFORMATION V CC V TO 1V 12V IN VCC V LT197A SSE R S.2Ω LT1787 V S V S R G R F 2k R LOAD BIAS R1 6.4k R4 255k 12V R2 1k LT188 V 2.5V ±5mV/mA R3 2k 1kHz FULL CURRT BANDWIDTH V TO 5V A/D OPTIONAL DIGITAL FEEDBACK 197A F8 Figure 8. Sensing Output Current R1 2.1k R2 4k R3 1k CURRT LIMIT ADJUST R5 5.49k 3V DC LT R4 1k PUT VOLTAGE ADJUST IN VCC V LT197A SSE 5V LOAD FAULT R S 1Ω V V TO 25V 4mA TO 1mA C3 1μF GND R G 2.55k R F 1.2k LTC146 C1 1μF C2 1μF 197A F9 18 Figure 9. Simpe Bench Power Suppy 197afa

19 APPLICATIONS INFORMATION LT197A R6 18.2k R7 3k 15V R8 3k.1 1μF 18V R1 6.19k R3 23.2k R2 1k 5V REF R5 13k V ADJUST CURRT LIMIT VCC V LT197A SSE IN 15V THERMAL FAULT C1 1μF R S1 1Ω C2 1μF R9 1k 1% V TO 12V 4mA TO 15mA LT R4 1k CURRT LIMIT ADJUST R12 1k 1/2 LT1881 R11 1k R k 15V 1/2 LT V OPTIONAL SYMMETRY ADJUST 1Ω GROUND R14 1.7k R15 3k 15V CURRT LIMIT VCC V LT197A SSE IN TO PIN OF R S2 1Ω 197A F1 C3 1μF R1 1k 1% V TO 4mA TO 15mA 15V 1μF.1μF Figure 1. Dua Tracking Bench Power Suppy 197afa 19

20 LT197A APPLICATIONS INFORMATION Another simpe inear power ampifier circuit is shown in Figure 11. This uses the LT197A as a inear driver of a DC motor with speed contro. The abiity to source and sink the same amount of output current provides for bidirectiona rotation of the motor. Speed contro is managed by sensing the output of a tachometer buit on to the motor. A typica feedback signa of 3V/1rpm is compared with the desired speed-set input votage. Because the LT197A is unity-gain stabe, it can be configured as an integrator to force whatever votage across the motor as necessary to match the feedback speed signa with the set input signa. Additionay, the current imit of the ampifier can be adjusted to contro the torque and sta current of the motor. For reiabiity, a feedback scheme simiar to that shown in Figure 4 can be used. Assuming that a staed rotor wi generate a current imit condition, the sta current imit can be significanty reduced to prevent excessive power dissipation in the motor windings. OV TO 5V TORQUE/STALL CURRT CONTROL R1 1.2k R2 1k R3 1.2k 15V 15V REVERSE R4 49.9k FORWARD 15V IN VCC V LT197A SSE 15V R5 49.9k C1 1μF R S 1Ω 12V DC MOTOR GND TACH FEEDBACK 3V/1rpm 197A F11 Figure 11. Simpe Bidirectiona DC Motor Speed Controer For motor speed contro without using a tachometer, the circuit in Figure 12 shows an approach. Using the enabe feature of the LT197A, the drive to the motor can be removed periodicay. With no drive appied, the spinning motor presents a back EMF votage proportiona to its rotationa speed. The LT1782 is a tiny rai-to-rai ampifier with a shutdown pin. The ampifier is enabed during this interva to sampe the back EMF votage across the motor. This votage is then buffered by one-haf of an LT1638 dua op amp and used to provide the feedback to the LT197A integrator. When re-enabed the LT197A wi adjust the drive to the motor unti the speed feedback votage, compared to the speed-set input votage, settes the output to a fixed vaue. A V to 5V signa for the motor speed input contros both rotationa speed and direction. The other haf of the LT1638 is used as a simpe puse osciator to contro the periodic samping of the motor back EMF. Figure 13 shows how easy it is to boost the output current of the LT197A. This ±5A power stage uses compementary externa N- and P-channe MOSFETs to provide the additiona current. The output stage power suppy inputs, V and, are used to provide gate drive as needed. With higher output currents, the sense resistor R CS, is reduced in vaue to maintain the same easy current imit contro. This Cass B power stage is intended for DC and ow frequency, <1kHz, appications as crossover distortion becomes evident at higher frequencies. Figure 13 shows some optiona resistor dividers between the output connections and the current sense inputs. They are required ony if the oad of this power stage is removed or at a very ow current eve. Large power devices with no oad on them can saturate and pu the output votage very cose to the power suppy rais. The current sense ampifiers operate propery with input votages at east 1V away from the V CC and suppy rais. In boosted current appications, it may be necessary to attenuate the maximum output votage eves by 1V before connecting to the sense input pins. This ony sighty deceases the current imit threshods afa

21 APPLICATIONS INFORMATION LT197A 12V MOTOR SPEED CONTROL V REV OV TO 5V TORQUE/STALL CURRT CONTROL FWD 5V STOP R1 1k R2 2k IN V CC V R3 2k FAULT/STALL LT197A SSE COM C1 4.7μF R S 1Ω 12V DC MOTOR R14 1k R6 49.9k R4 1k 12V 2.5V AT 1mA 1μF 1/2 LT1638 R15 1Ω C2.1μF SHDN LT1782 R7 1k R5 12k 12V 12V R13 1k R12 1k 1/2 LT1638 R8 2k R1 D1 82.5k 1N4148 R9 2k R11 D2 9.9k 1N4148 C3.1μF 197A F12 Figure 12. Simpe Bidirectiona DC Motor Speed Controer Without a Tachometer 197afa 21

22 LT197A PACKAGE DESCRIPTION Pease refer to for the most recent package drawings. FE Package 2-Lead Pastic TSSOP (4.4mm) (Reference LTC DWG # Rev I) Exposed Pad Variation CA 4.95 (.195) * ( ) 4.95 (.195) SEE NOTE (.18) (.252) (.18) BSC RECOMMDED SOLDER PAD LAY * ( ).65 BSC.25 REF (.47) MAX.9.2 (.35.79).5.75 (.2.3) NOTE: 1. CONTROLLING DIMSION: MILLIMETERS MILLIMETERS 2. DIMSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE.65 (.256) BSC ( ) TYP 4. RECOMMDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMT *DIMSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED.15mm (.6") PER SIDE.5.15 (.2.6) FE2 (CA) TSSOP REV I afa

23 LT197A REVISION HISTORY REV DATE DESCRIPTION PAGE NUMBER A 6/12 Corrected D1, D2 orientation in Bock Diagram 1 Changed suppy votage in Figure Information furnished by Linear Technoogy Corporation is beieved to be accurate and reiabe. However, no responsibiity is assumed for its use. Linear Technoogy Corporation makes no representation that the interconnection of its circuits as described herein wi not infringe on existing patent rights. 197afa 23

24 LT197A APPLICATIONS INFORMATION CURRT LIMIT CONTROL VOLTAGE V TO 5V V CC 15V R1 1k V CC ABLE IN R2 1Ω IRF953 1μF.1μF V LT197A SSE * * R4 1Ω R5 1Ω R CS.1Ω 5W V IN R G 2.2k R F 2.2k * * LOAD 15V R3 1Ω *OPTIONAL, SEE TEXT 1μF IRF53.1μF 197A F13 Figure 13. A V = 1 Ampifier with Discrete Power Devices to Boost Output Current to 5A RELATED PARTS PART NUMBER DESCRIPTION COMMTS LT11 Fast ±15mA Power Buffer 2MHz Bandwidth, 75V/μs Sew Rate LT126 25mA/6MHz Current Feedback Ampifier Shutdown Mode, Adjustabe Suppy Current LT A/35MHz Current Feedback Ampifier Stabe with C L = 1,pF LT1999 High Votage Bidirectiona Current Sense Ampifier 5V to 8V Input Votage Range 24 LT 612 REV A PRINTED IN USA Linear Technoogy Corporation 163 McCarthy Bvd., Mipitas, CA (48) FAX: (48) LINEAR TECHNOLOGY CORPORATION afa