APPLICATIONS n Driving A/D Converters n Low Voltage Signal Processing n Active Filters n Rail-to-Rail Buffer Amplifi ers n Video Line Driver

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1 FEATURES n 3dB Bandwidth: 3MHz, A V = n Gain-Bandwidth Product: 8MHz, A V n Sew Rate: 3V/μs n Wide Suppy Range:.V to.v n Large Output Current: 8mA n Low Distortion, MHz: 9dBc n Input Common Mode Range Incudes Both Rais n Output Swings Rai-to-Rai n Input Offset Votage, Rai-to-Rai:. Max n Common Mode Rejection: 89dB Typ n Power Suppy Rejection: 87dB Typ n Open-Loop Gain: V/ Typ n Shutdown Pin: LT89 n Singe in 8-Pin SO and -Pin SOT-3 Packages n Dua in 8-Pin SO and MSOP Packages n Operating Temperature Range: 4 C to 8 C n Low Profi e (mm) SOT-3 (ThinSOT ) Package APPLICATIONS n Driving A/D Converters n Low Votage Signa Processing n Active Fiters n Rai-to-Rai Buffer Ampifi ers n Video Line Driver L, LT, LTC, LTM, Linear Technoogy and the Linear ogo are registered trademarks of Linear Technoogy Corporation. ThinSOT is a trademark of Linear Technoogy Corporation. A other trademarks are the property of their respective owners. LT89/LT8 Singe/Dua 8MHz, 3V/µs Rai-to-Rai Input and Output Low Distortion Op Amps DESCRIPTION The LT 89/LT8 are singe/dua ow distortion rai-torai input and output op amps with a 3V/μs sew rate. These ampifiers have a 3dB bandwidth of 3MHz at unity-gain, a gain-bandwidth product of 8MHz (A V ) and an 8mA output current to fit the needs of ow votage, high performance signa conditioning systems. The LT89/LT8 have an input range that incudes both suppy rais and an output that swings within of either suppy rai to maximize the signa dynamic range in ow suppy appications. The LT89/LT8 have very ow distortion ( 9dBc) up to MHz that aows them to be used in high performance data acquisition systems. The LT89/LT8 maintain their performance for suppies from.v to.v and are specified at 3V, V and ±V suppies. The inputs can be driven beyond the suppies without damage or phase reversa of the output. The LT89 is avaiabe in the 8-pin SO package with the standard op amp pinout and the -pin SOT-3 package. The LT8 features the standard dua op amp pinout and is avaiabe in 8-pin SO and MSOP packages. These devices can be used as a pug-in repacement for many op amps to improve input/output range and performance. TYPICAL APPLICATION Distortion vs Frequency V IN V P-P R k + V LT89 V R k High Speed ADC Driver R3 49.9Ω V LTC 4 +A IN PGA GAIN = C A REF =.48V IN 47pF V 89 TAa BITS Msps DISTORTION (db) A V = + V IN = V P-P R L = Ω, ND R L = Ω, 3RD R L = k, 3RD R L = k, ND 3 FREQUENCY (MHz) 89 TAb 89fa

2 LT89/LT8 ABSOLUTE MAXIMUM RATINGS Tota Suppy Votage (V + to V )...V Input Votage (Note )... ±V S Input Current (Note )... ±ma Output Short-Circuit Duration (Note 3)... Indefinite Operating Temperature Range (Note 4)... 4 C to 8 C (Note ) Specifi ed Temperature Range (Note )... 4 C to 8 C Junction Temperature... C Storage Temperature Range... C to C Lead Temperature (Sodering, sec)...3 C PIN CONFIGURATION OUT V +IN 3 TOP VIEW V + SHDN 4 IN S PACKAGE -LEAD PLASTIC TSOT-3 T JMAX = C, θ JA = 4 C/W (Note 9) OUT A IN A +IN A V 3 4 TOP VIEW 8 V + 7 OUT B IN B +IN B MS8 PACKAGE 8-LEAD PLASTIC MSOP T JMAX = C, θ JA = 3 C/W (Note 9) SHDN IN +IN 3 V 4 TOP VIEW NC V+ OUT NC S8 PACKAGE 8-LEAD PLASTIC SO T JMAX = C, θ JA = C/W (Note 9) OUT A IN A +IN A 3 V 4 A TOP VIEW 8 7 V + OUT B IN B +IN B S8 PACKAGE 8-LEAD PLASTIC SO T JMAX = C, θ JA = C/W (Note 9) B ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT89CS#PBF LT89CS#TRPBF LTKY -Lead Pastic TSOT-3 C to 7 C LT89IS#PBF LT89IS#TRPBF LTUF -Lead Pastic TSOT-3 4 C to 8 C LT89CS8#PBF LT89CS8#TRPBF 89 8-Lead Pastic SO C to 7 C LT89IS8#PBF LT89IS8#TRPBF 89I 8-Lead Pastic SO 4 C to 8 C LT8CMS8#PBF LT8CMS8#TRPBF LTRF 8-Lead Pastic MSOP C to 7 C LT8IMS8#PBF LT8IMS8#TRPBF LTTQ 8-Lead Pastic MSOP 4 C to 8 C LT8CS8#PBF LT8CS8#TRPBF 8 8-Lead Pastic SO C to 7 C LT8IS8#PBF LT8IS8#TRPBF 8I 8-Lead Pastic SO 4 C to 8 C Consut LTC Marketing for parts specifi ed with wider operating temperature ranges. Consut LTC Marketing for information on non-standard ead based fi nish parts. For more information on ead free part marking, go to: For more information on tape and ree specifi cations, go to: 89fa

3 LT89/LT8 ELECTRICAL CHARACTERISTICS T A = C. V S = V, V; V S = 3V, V; V SHDN = open; V CM = V OUT = haf suppy, uness otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OS Input Offset Votage V CM = V + LT89 SO-8.. V CM = V LT89 SO-8.. V CM = V + V CM = V ΔV OS Input Offset Shift V CM = V to V + LT89 SO-8.3 V CM = V to V +.3 Input Offset Votage Match (Channe-to-Channe) (Note ) I B Input Bias Current V CM = V + V CM = V +.V ΔI B Input Bias Current Shift V CM = V +.V to V Input Bias Current Match (Channe-to-Channe) (Note ) V CM = V + V CM = V +.V I OS Input Offset Current V CM = V + V CM = V +.V ΔI OS Input Offset Current Shift V CM = V +.V to V +.. e n Input Noise Votage Density f = khz nv/ Hz i n Input Noise Current Density f = khz pa/ Hz C IN Input Capacitance pf A VOL Large-Signa Votage Gain V S = V, V O =.V to 4.V, R L = k to V S / V S = V, V O = V to 4V, R L = Ω to V S / V S = 3V, V O =.V to.v, R L = k to V S / CMRR Common Mode Rejection Ratio V S = V, V CM = V to V + V S = 3V, V CM = V to V + CMRR Match (Channe-to-Channe) (Note ) V S = V, V CM = V to V + V S = 3V, V CM = V to V + Input Common Mode Range V V + V PSRR Power Suppy Rejection Ratio V S =.V to V, V CM = V 7 87 db PSRR Match (Channe-to-Channe) (Note ) V S =.V to V, V CM = V 87 db Minimum Suppy Votage (Note ).3. V V OL Output Votage Swing LOW (Note 7) No Load I SINK = ma I SINK = ma V OH Output Votage Swing HIGH (Note 7) No Load I SOURCE = ma I SOURCE = ma I SC Short-Circuit Current V S = V V S = 3V I S Suppy Current per Ampifi er. 7 ma Suppy Current, Shutdown V S = V, V SHDN =.3V V S = 3V, V SHDN =.3V I SHDN SHDN Pin Current V S = V, V SHDN =.3V V S = 3V, V SHDN =.3V Output Leakage Current, Shutdown V SHDN =.3V. 7 V L SHDN Pin Input Votage Low.3 V V H SHDN Pin Input Votage High V S. V t ON Turn-On Time V SHDN =.3V to 4.V, R L = 8 ns 4 ±4 ± ±8 ± V/ V/ V/ db db db db ma ma ma ma 89fa 3

4 LT89/LT8 ELECTRICAL CHARACTERISTICS T A = C. V S = V, V; V S = 3V, V; V SHDN = open; V CM = V OUT = haf suppy, uness otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS t OFF Turn-Off Time V SHDN = 4.V to.3v, R L = ns GBW Gain-Bandwidth Product Frequency = MHz MHz SR Sew Rate V S = V, A V =, R L = k, V O = 4V P-P 3 V/μs FPBW Fu Power Bandwidth V S = V, V OUT = 4V P-P 3. MHz THD Tota Harmonic Distortion V S = V, A V =, R L = k, V O = V P-P, f C = MHz 8 db t S Setting Time.%, V S = V, V STEP = V, A V =, R L = Ω 7 ns ΔG Differentia Gain (NTSC) V S = V, A V =, R L = Ω. % Δθ Differentia Phase (NTSC) V S = V, A V =, R L = Ω. Deg The denotes the specifi cations which appy over the C T A 7 C temperature range. V S = V, V; V S = 3V, V; V SHDN = open; V CM = V OUT = haf suppy, uness otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OS Input Offset Votage V CM = V + LT89 SO-8 3. V CM = V LT89 SO-8 3. V CM = V + V CM = V V OS TC Input Offset Votage Drift (Note 8) V CM = V + V CM = V ΔV OS Input Offset Votage Shift V CM = V to V + LT89 SO-8 V CM = V to V + Input Offset Votage Match (Channe-to-Channe) (Note ) I B Input Bias Current V CM = V +.V V CM = V +.4V μv/ C μv/ C V CM = V, V CM = V ΔI B Input Bias Current Shift V CM = V +.4V to V +.V 4 Input Bias Current Match (Channe-to-Channe) (Note ) V CM = V +.V V CM = V +.4V I OS Input Offset Current V CM = V +.V V CM = V +.4V.. ΔI OS Input Offset Current Shift V CM = V +.4V to V +.V.4 A VOL Large-Signa Votage Gain V S = V, V O =.V to 4.V, R L = k to V S / V S = V, V O = V to 4V, R L = Ω to V S / V S = 3V, V O =.V to.v, R L = k to V S / CMRR Common Mode Rejection Ratio V S = V, V CM = V to V + V S = 3V, V CM = V to V + CMRR Match (Channe-to-Channe) (Note ) V S = V, V CM = V, V CM = V + 8 V S = 3V, V CM = V, V CM = V + 4 Input Common Mode Range V V + V PSRR Power Suppy Rejection Ratio V S =.V to V, V CM = V 7 83 db PSRR Match (Channe-to-Channe) (Note ) V S =.V to V, V CM = V 4 83 db Minimum Suppy Votage (Note ).3. V V OL Output Votage Swing LOW (Note 7) No Load I SINK = ma I SINK = ma V/ V/ V/ db db db db 4 89fa

5 LT89/LT8 ELECTRICAL CHARACTERISTICS The denotes the specifi cations which appy over the C T A 7 C temperature range. V S = V, V; V S = 3V, V; V SHDN = open; V CM = V OUT = haf suppy, uness otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OH Output Votage Swing HIGH (Note 7) No Load I SOURCE = ma I SOURCE = ma I SC Short-Circuit Current V S = V V S = 3V I S Suppy Current per Ampifi er ma Suppy Current, Shutdown V S = V, V SHDN =.3V V S = 3V, V SHDN =.3V I SHDN SHDN Pin Current V S = V, V SHDN =.3V V S = 3V, V SHDN =.3V Output Leakage Current, Shutdown V SHDN =.3V V L SHDN Pin Input Votage Low.3 V V H SHDN Pin Input Votage High V S. V t ON Turn-On Time V SHDN =.3V to 4.V, R L = 8 ns t OFF Turn-Off Time V SHDN = 4.V to.3v, R L = ns GBW Gain-Bandwidth Product Frequency = MHz 4 MHz SR Sew Rate V S = V, A V =, R L = k, V O = 4V P-P V/μs FPBW Fu Power Bandwidth V S = V, V OUT = 4V P-P MHz ±4 ±3 37 ±7 ± ma ma ma ma The denotes the specifi cations which appy over the 4 C T A 8 C temperature range. V S = V, V; V S = 3V, V; V SHDN = open; V CM = V OUT = haf suppy, uness otherwise noted. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OS Input Offset Votage V CM = V + LT89 SO-8 3. V CM = V LT89 SO-8 3. V CM = V + V CM = V V OS TC Input Offset Votage Drift (Note 8) V CM = V + V CM = V ΔV OS Input Offset Votage Shift V CM = V to V + LT89 SO-8 V CM = V Input Offset Votage Match (Channe-to-Channe) (Note ) I B Input Bias Current V CM = V +.V V CM = V +.4V μv/ C μv/ C V CM = V +, V CM = V ΔI B Input Bias Current Shift V CM = V +.4V to V +.V 9 47 Input Bias Current Match (Channe-to-Channe) (Note ) V CM = V +.V V CM = V +.4V I OS Input Offset Current V CM = V +.V V CM = V +.4V ΔI OS Input Offset Current Shift V CM = V +.4V to V +.V.8 7. A VOL Large-Signa Votage Gain V S = V, V O =.V to 4.V, R L = k to V S / V S = V, V O = V to 4V, R L = Ω to V S / V S = 3V, V O =.V to.v, R L = k to V S / V/ V/ V/ 89fa

6 LT89/LT8 ELECTRICAL CHARACTERISTICS The denotes the specifi cations which appy over the 4 C T A 8 C temperature range. V S = V, V; V S = 3V, V; V SHDN = open; V CM = V OUT = haf suppy, uness otherwise noted. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CMRR Common Mode Rejection Ratio V S = V, V CM = V to V + V S = 3V, V CM = V to V + CMRR Match (Channe-to-Channe) (Note ) V S = V, V CM = V to V + V S = 3V, V CM = V to V + Input Common Mode Range V V + V PSRR Power Suppy Rejection Ratio V S =.V to V, V CM = V 9 83 db PSRR Match (Channe-to-Channe) (Note ) V S =.V to V, V CM = V 3 83 db Minimum Suppy Votage (Note ).3. V V OL Output Votage Swing LOW (Note 7) No Load I SINK = ma I SINK = ma V OH Output Votage Swing HIGH (Note 7) No Load I SOURCE = ma I SOURCE = ma I SC Short-Circuit Current V S = V V S = 3V I S Suppy Current per Ampifi er ma Suppy Current, Shutdown V S = V, V SHDN =.3V V S = 3V, V SHDN =.3V I SHDN SHDN Pin Current V S = V, V SHDN =.3V V S = 3V, V SHDN =.3V Output Leakage Current, Shutdown V SHDN =.3V 3 V L SHDN Pin Input Votage Low.3 V V H SHDN Pin Input Votage High V S. V t ON Turn-On Time V SHDN =.3V to 4.V, R L = 8 ns t OFF Turn-Off Time V SHDN = 4.V to.3v, R L = ns GBW Gain-Bandwidth Product Frequency = MHz 4 MHz SR Sew Rate V S = V, A V = -, R L = k, V O = 4V P-P 8 V/μs FPBW Fu Power Bandwidth V S = V, V OUT = 4V P-P 4 MHz ±3 ± ±7 ± db db db db ma ma ma ma T A = C., V SHDN = open, V CM = V, V OUT = V, uness otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OS Input Offset Votage V CM = V + LT89 SO V CM = V LT89 SO V CM = V + V CM = V ΔV OS Input Offset Votage Shift V CM = V to V + LT89 SO-8.3 V CM = V to V +.3 Input Offset Votage Match (Channe-to-Channe) (Note ) V CM = V +, V CM = V I B Input Bias Current V CM = V + V CM = V +.V fa

7 ELECTRICAL CHARACTERISTICS T A = C., V SHDN = open, V CM = V, V OUT = V, uness otherwise noted. LT89/LT8 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ΔI B Input Bias Current Shift V CM = V +.V to V Input Bias Current Match (Channe-to-Channe) (Note ) V CM = V + V CM = V +.V I OS Input Offset Current V CM = V + V CM = V +.V ΔI OS Input Offset Current Shift V CM = V +.V to V e n Input Noise Votage Density f = khz nv/ Hz i n Input Noise Current Density f = khz pa/ Hz C IN Input Capacitance f = khz pf A VOL Large-Signa Votage Gain V O = 4V to 4V, R L = k V O =.V to.v, R L = Ω CMRR Common Mode Rejection Ratio V CM = V to V db CMRR Match (Channe-to-Channe) (Note ) V CM = V to V db Input Common Mode Range V V + V PSRR Power Suppy Rejection Ratio V + =.V to V, V = V 7 87 db PSRR Match (Channe-to-Channe) (Note ) V + =.V to V, V = V 9 db V OL Output Votage Swing LOW (Note 7) No Load I SINK = ma I SINK = ma V OH Output Votage Swing HIGH (Note 7) No Load I SOURCE = ma I SOURCE = ma I SC Short-Circuit Current ± ±8 ma I S Suppy Current per Ampifi er ma Suppy Current, Shutdown V SHDN =.3V..3 ma I SHDN SHDN Pin Current V SHDN =.3V 4 7 Output Leakage Current, Shutdown V SHDN =.3V. 7 V L SHDN Pin Input Votage Low.3 V V H SHDN Pin Input Votage High V +. V t ON Turn-On Time V SHDN =.3V to 4.V, R L = 8 ns t OFF Turn-Off Time V SHDN = 4.V to.3v, R L = ns GBW Gain-Bandwidth Product Frequency = MHz 8 MHz SR Sew Rate A V =, R L = k, V O = ±4V, 7 3 V/μs Measured at V O = ±3V FPBW Fu Power Bandwidth V OUT = 8V P-P 4 MHz THD Tota Harmonic Distortion A V =, R L = k, V O = V P-P, f C = MHz 9 db t S Setting Time.%, V STEP = 8V, A V =, R L = Ω 34 ns ΔG Differentia Gain (NTSC) A V =, R L = Ω. % Δθ Differentia Phase (NTSC) A V =, R L = Ω. Deg V/ V/ 89fa 7

8 LT89/LT8 ELECTRICAL CHARACTERISTICS The denotes the specifi cations which appy over the C T A 7 C temperature range., V SHDN = open, V CM = V, V OUT = V, uness otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OS Input Offset Votage V CM = V + LT89 SO-8 3. V CM = V LT89 SO-8 3. V CM = V + V CM = V V OS TC Input Offset Votage Drift (Note 8) V CM = V + V CM = V μv/ C μv/ C ΔV OS Input Offset Votage Shift V CM = V to V + LT89 SO-8..7 V CM = V to V Input Offset Votage Match (Channe-to-Channe) V CM = V to V +.. (Note ) I B Input Bias Current V CM = V +.V.. V CM = V +.4V 37. ΔI B Input Bias Current Shift V CM = V +.4V to V +.V 7. Input Bias Current Match (Channe-to-Channe) (Note ) V CM = V +.V V CM = V +.4V I OS Input Offset Current V CM = V +.V V CM = V +.4V ΔI OS Input Offset Current Shift V CM = V +.4V to V +.V. 8. A VOL Large-Signa Votage Gain V O = 4V to 4V, R L = k V O =.V to.v, R L = Ω CMRR Common Mode Rejection Ratio V CM = V to V db CMRR Match (Channe-to-Channe) (Note ) V CM = V to V db Input Common Mode Range V V + V PSRR Power Suppy Rejection Ratio V + =.V to V, V = V 7 83 db PSRR Match (Channe-to-Channe) (Note ) V + =.V to V, V = V 4 83 db V OL Output Votage Swing LOW (Note 7) No Load I SINK = ma I SINK = ma V OH Output Votage Swing HIGH (Note 7) No Load I SOURCE = ma I SOURCE = ma I SC Short-Circuit Current ±4 ±7 ma I S Suppy Current per Ampifi er 7. ma Suppy Current, Shutdown V SHDN =.3V.. ma I SHDN SHDN Pin Current V SHDN =.3V 4 8 Output Leakage Current, Shutdown V SHDN =.3V 3 V L SHDN Pin Input Votage Low.3 V V H SHDN Pin Input Votage High V +. V t ON Turn-On Time V SHDN =.3V to 4.V, R L = 8 ns t OFF Turn-Off Time V SHDN = 4.V to.3v, R L = ns GBW Gain-Bandwidth Product Frequency = MHz 8 7 MHz SR Sew Rate A V =, R L = k, V O = ±4V, 4 3 V/μs Measured at V O = ±3V FPBW Fu Power Bandwidth V OUT = 8V P-P MHz V/ V/ 8 89fa

9 LT89/LT8 ELECTRICAL CHARACTERISTICS The denotes the specifi cations which appy over the 4 C T A 8 C temperature range., V SHDN = open, V CM = V, V OUT = V, uness otherwise noted. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OS Input Offset Votage V CM = V + LT89 SO V CM = V LT89 SO V CM = V + V CM = V v V OS TC Input Offset Votage Drift (Note 8) V CM = V + V CM = V ΔV OS Input Offset Votage Shift V CM = V to V + LT89 SO-8 V CM = V to V + Input Offset Votage Match (Channe-to-Channe) (Note ) I B Input Bias Current V CM = V +.V V CM = V +.4V μv/ C μv/ C V CM = V to V ΔI B Input Bias Current Shift V CM = V +.4V to V +.V Input Bias Current Match (Channe-to-Channe) (Note ) V CM = V +.V V CM = V +.4V I OS Input Offset Current V CM = V +.V V CM = V +.4V ΔI OS Input Offset Current Shift V CM = V +.4V to V +.V.8. A VOL Large-Signa Votage Gain V O = 4V to 4V, R L = k V O =.V to.v, R L = Ω CMRR Common Mode Rejection Ratio V CM = V to V db CMRR Match (Channe-to-Channe) (Note ) V CM = V to V + 8 db Input Common Mode Range V V + V PSRR Power Suppy Rejection Ratio V + =.V to V, V = V 9 83 db PSRR Match (Channe-to-Channe) (Note ) V + =.V to V, V = V 3 83 db V OL Output Votage Swing LOW (Note 7) No Load I SINK = ma I SINK = ma V OH Output Votage Swing HIGH (Note 7) No Load I SOURCE = ma I SOURCE = ma I SC Short-Circuit Current ±3 ±7 ma I S Suppy Current per Ampifi er 9 ma Suppy Current, Shutdown V SHDN =.3V.. ma I SHDN SHDN Pin Current V SHDN =.3V 4 9 Output Leakage Current, Shutdown V SHDN =.3V 4 V L SHDN Pin Input Votage Low.3 V V H SHDN Pin Input Votage High V +. V t ON Turn-On Time V SHDN =.3V to 4.V, R L = 8 ns t OFF Turn-Off Time V SHDN = 4.V to.3v, R L = ns GBW Gain-Bandwidth Product Frequency = MHz 8 MHz SR Sew Rate A V =, R L = k, V O = ±4V, V/μs Measured at V O = ±3V FPBW Fu Power Bandwidth V OUT = 8V P-P 8. MHz V/ V/ 89fa 9

10 LT89/LT8 ELECTRICAL CHARACTERISTICS Note : Stresses beyond those isted under Absoute Maximum Ratings may cause permanent damage to the device. Exposure to any Absoute Maximum Rating condition for extended periods may affect device reiabiity and ifetime. Note : The inputs are protected by back-to-back diodes. If the differentia input votage exceeds.4v, the input current shoud be imited to ess than ma. Note 3: A heat sink may be required to keep the junction temperature beow the absoute maximum rating when the output is shorted indefinitey. Note 4: The LT89C/LT89I and LT8C/LT8I are guaranteed functiona over the operating temperature range of 4 C and 8 C. Note : The LT89C/LT8C are guaranteed to meet specifi ed performance from C to 7 C. The LT89C/LT8C are designed, characterized and expected to meet specifi ed performance from 4 C to 8 C but are not tested or QA samped at these temperatures. The LT89I/LT8I are guaranteed to meet specifi ed performance from 4 C to 8 C. Note : Minimum suppy votage is guaranteed by power suppy rejection ratio test. Note 7: Output votage swings are measured between the output and power suppy rais. Note 8: This parameter is not % tested. Note 9: Therma resistance varies depending upon the amount of PC board meta attached to the V pin of the device. θ JA is specifi ed for a certain amount of oz of copper meta trace connecting to the V pin as described in the therma resistance tabes in the Appications Information section. Note : Matching parameters are the difference between the two ampifi ers of the LT8. 89fa

11 TYPICAL PERFORMANCE CHARACTERISTICS LT89/LT8 V OS Distribution, V CM = V (PNP Stage) V S = V, V V OS Distribution, V CM = V (NPN Stage) V S = V, V ΔV OS Shift for V CM = V to V V S = V, V PERCENT OF UNITS (%) 4 3 PERCENT OF UNITS (%) 4 3 PERCENT OF UNITS (%) 3 3 INPUT OFFSET VOLTAGE () 3 3 INPUT OFFSET VOLTAGE () INPUT OFFSET VOLTAGE () 89 G 89 G 89 G3 SUPPLY CURRENT (ma) Suppy Current vs Suppy Votage T A = C T A = C T A = C OFFSET VOLTAGE () Offset Votage vs Input Common Mode T A = C T A = C T A = C V S = V, V TYPICAL PART INPUT BIAS CURRENT () Input Bias Current vs Common Mode Votage V S = V, V T A = C T A = C T A = C T A = C T A = C T A = C TOTAL SUPPLY VOLTAGE (V). 3 4 INPUT COMMON MODE VOLTAGE (V) COMMON MODE VOLTAGE (V) 89 G4 89 G 89 G INPUT BIAS CURRENT () Input Bias Current vs Temperature V S = V, V V CM = V V CM = V TEMPERATURE ( C) 89 G7 OUTPUT LOW SATURATION VOLTAGE (V).... Output Saturation Votage vs Load Current (Output Low) V S = V, V T A = C T A = C T A = C. LOAD CURRENT (ma) 89 G8 OUTPUT HIGH SATURATION VOLTAGE (V).... Output Saturation Votage vs Load Current (Output High) V S = V, V T A = C T A = C T A = C. LOAD CURRENT (ma) 89 G9 89fa

12 LT89/LT8 TYPICAL PERFORMANCE CHARACTERISTICS CHANGE IN OFFSET VOLTAGE () Minimum Suppy Votage V CM = V +.V T A = C T A = C T A = C TOTAL SUPPLY VOLTAGE (V) OUTPUT SHORT-CIRCUIT CURRENT (ma) Output Short-Circuit Current vs Power Suppy Votage T A = C T A = C T A = C SINKING T A = C SOURCING T A = C 8 T A = C POWER SUPPLY VOLTAGE (±V) SUPPLY CURRENT (ma) Suppy Current vs SHDN Pin Votage V S = V, V T A = C T A = C T A = C 3 4 SHDN PIN VOLTAGE (V) 89 G 89 G 89 G SHDN PIN CURRENT () SHDN Pin Current vs SHDN Pin Votage Open-Loop Gain Open-Loop Gain V S = V, V T A = C T A = C T A = C INPUT VOLTAGE () V S = 3V, V R L = k R L = Ω SHDN PIN VOLTAGE (V) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) INPUT VOLTAGE () V S = V, V R L = k R L = Ω 89 G3 89 G4 89 G INPUT VOLTAGE () Open-Loop Gain OUTPUT VOLTAGE (V) R L = k R L = Ω 89 G OFFSET VOLTAGE () Offset Votage vs Output Current T A = C T A = C T A = C OUTPUT CURRENT (ma) 89 G7 CHANGE IN OFFSET VOLTAGE (μv) Warm-Up Drift vs Time (LT89S8) T A = C 4 V S = V, V V S = 3V, V 8 4 TIME AFTER POWER UP (SEC) 89 G8 89fa

13 TYPICAL PERFORMANCE CHARACTERISTICS LT89/LT8 Input Noise Votage vs Frequency VS = V, V 9 Input Noise Current vs Frequency V S = V, V 8.Hz to Hz Output Votage Noise NOISE VOLTAGE (nv/ Hz) PNP ACTIVE V CM =.V NPN ACTIVE V CM = 4.V FREQUENCY (khz) CURRENT NOISE (pa/ Hz) 8 4. NPN ACTIVE V CM = 4.V PNP ACTIVE V CM =.V FREQUENCY (khz) OUTPUT VOLTAGE (μv/div) TIME (s/div) 89 G9 89 G 89 G GAIN BANDWIDTH (MHz) Gain Bandwidth and Phase Margin vs Suppy Votage T A = C R L = k GAIN BANDWIDTH PHASE MARGIN 4 8 TOTAL SUPPLY VOLTAGE (V) PHASE MARGIN (DEG) GAIN BANDWIDTH (MHz) Gain Bandwidth and Phase Margin vs Temperature PHASE MARGIN V S = 3V, V GAIN BANDWIDTH V S = 3V, V 7 TEMPERATURE ( C) PHASE MARGIN (DEG) SLEW RATE (V/μs) Sew Rate vs Temperature V S = V, V A V = R F = R G = k R L = k RISING AND FALLING SLEW RATE TEMPERATURE ( C) 7 89 G 89 G3 89 G4 GAIN (db) 4 3 Gain and Phase vs Frequency Cosed-Loop Gain vs Frequency Cosed-Loop Gain vs Frequency V S = 3V, V V S = 3V, V GAIN PHASE C L = pf 4 R L = k k M M M G FREQUENCY (Hz) 8 4 PHASE (DEG) GAIN (db) A V = + V S = 3V k M M M M FREQUENCY (Hz) GAIN (db) A V = + V S = 3V k M M M M FREQUENCY (Hz) 89 G 89 G 89 G7 89fa 3

14 LT89/LT8 TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT IMPEDANCE (Ω). Output Impedance vs Frequency V S = V, V A V = A V = A V =. k M M M M FREQUENCY (Hz) 89 G8 COMMON MODE REJECTION RATIO (db) k Common Mode Rejection Ratio vs Frequency k M M M M FREQUENCY (Hz) V S = V, V 89 G9 POWER SUPPLY REJECTION RATIO (db) k Power Suppy Rejection Ratio vs Frequency k NEGATIVE SUPPLY k M M M FREQUENCY (Hz) V S = V, V T A = C POSITIVE SUPPLY 89 G3 OVERSHOOT (%) Series Output Resistor vs Capacitive Load V S = V, V A V = + R S = Ω, R L = R S = Ω, R L = R L = R S = Ω CAPACITIVE LOAD (pf) 89 G3 OVERSHOOT (%) Series Output Resistor vs Capacitive Load V S = V, V A V = + R L = R S = Ω R S = Ω R L = R S = Ω R L = CAPACITIVE LOAD (pf) 89 G3 INPUT SIGNAL GENERATION (V/DIV) OUTPUT SETTLING RESOLUTION (/DIV).% Setting Time ns/div) V OUT = ±4V A V = R L = Ω t S = ns (SETTLING TIME) 89 G33 DISTORTION (db) Distortion vs Frequency Distortion vs Frequency Distortion vs Frequency A V = + V O = V P-P R L = Ω, ND R L = Ω, 3RD R L = k, 3RD R L = k, ND 3 FREQUENCY (MHz) 89 G34 DISTORTION (db) A V = + V O = V P-P V S = V R L = k, ND R L = Ω, ND R L = Ω, 3RD R L = k, 3RD 3 FREQUENCY (MHz) 89 G3 DISTORTION (db) A V = + V O = V P-P R L = Ω, ND R L = k, ND R L = Ω, 3RD R L = k, 3RD 3 FREQUENCY (MHz) 89 G3 4 89fa

15 TYPICAL PERFORMANCE CHARACTERISTICS LT89/LT8 DISTORTION (db) Distortion vs Frequency A V = + V O = V P-P V S = V R L = Ω, ND R L = k, ND R L = Ω, 3RD R L = k, 3RD OUTPUT VOLTAGE SWING (V P-P ) Maximum Undistorted Output Signa vs Frequency V S = V A V = A V = FREQUENCY (MHz) 3.9. FREQUENCY (MHz) 89 G37 89 G38 ±V Large-Signa Response ±V Sma-Signa Response V Large-Signa Response A V = + R L = k ns/div) 89 G39 A V = + R L = k ns/div) 89 G4 A V = + R L = k ns/div) 89 G4 V Sma-Signa Response Output Overdriven Recovery Shutdown Response V IN (V/DIV) V SHDN V) V OUT (V/DIV) V) V) V OUT V) A V = + R L = k ns/div) 89 G4 V S = V, V A V = + ns/div) 89 G43 V S = V, V A V = + R L = Ω ns/div) 89 G44 89fa

16 LT89/LT8 APPLICATIONS INFORMATION Rai-to-Rai Characteristics The LT89/LT8 have an input and output signa range that incudes both negative and positive power suppy. Figure depicts a simpifi ed schematic of the ampifi er. The input stage is comprised of two differentia ampifiers, a PNP stage Q/Q and a NPN stage Q3/Q4 that are active over different ranges of common mode input votage. The PNP differentia pair is active for common mode votages between the negative suppy to approximatey.v beow the positive suppy. As the input votage moves coser toward the positive suppy, the transistor Q wi steer the tai current I to the current mirror Q/Q7, activating the NPN differentia pair and causing the PNP pair to become inactive for the rest of the input common mode range up to the positive suppy. A pair of compementary common emitter stages Q4/Q form the output stage, enabing the output to swing from rai-to-rai. The capacitors C and C form the oca feedback oops that ower the output impedance at high frequency. These devices are fabricated on Linear Technoogy s proprietary high speed compementary bipoar process. Power Dissipation The LT89/LT8 ampifiers combine high speed with arge output current in a sma package, so there is a need to ensure that the die s junction temperature does not exceed C. The LT89 is housed in an SO-8 package or a -ead SOT-3 package and the LT8 is in an SO-8 or 8-ead MSOP package. A packages have the V suppy pin fused to the ead frame to enhance the therma conductance when connecting to a ground pane or a arge meta trace. Meta trace and pated through-hoes can be used to spread the heat generated by the device to the backside of the PC board. For exampe, on a 3/3" FR-4 board with oz copper, a tota of square miimeters connected to Pin 4 of LT8 in an SO-8 package (33 square miimeters on each side of the PC board) wi bring the therma resistance, θ JA, to about 8 C/W. Without extra meta trace connected to the V pin to provide a heat sink, the therma resistance wi be around C/W. More information on therma resistance for a packages with various meta areas connecting to the V pin is provided in Tabes, and 3 for therma consideration. V + V + R k Q Q7 V + V R3 R4 R SHDN ESDD D9 R7 k +IN ESDD ESDD D I Q Q Q3 C Q V ESDD IN D D D8 D7 D Q4 Q3 Q V BIAS Q Q C C V I OUT ESDD4 V ESDD3 V + D3 D4 Q Q9 Q8 BUFFER AND OUTPUT BIAS BIAS GENERATION Q7 Q C Q4 V R R 89 F Figure. LT89 Simpifi ed Schematic Diagram 89fa

17 LT89/LT8 APPLICATIONS INFORMATION Tabe. LT89 -Lead SOT-3 Package COPPER AREA TOPSIDE (mm ) BOARD AREA (mm ) THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 7 3 C/W 4 C/W C/W C/W Device is mounted on topside. Tabe. LT89/LT8 SO-8 Package COPPER AREA TOPSIDE (mm ) BACKSIDE (mm ) BOARD AREA (mm ) THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) C/W C/W C/W 3 C/W C/W Device is mounted on topside. Tabe 3. LT8 8-Lead MSOP Package COPPER AREA TOPSIDE (mm ) BACKSIDE (mm ) BOARD AREA (mm ) THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 4 4 C/W C/W 3 C/W 3 3 C/W 4 C/W Device is mounted on topside. Junction temperature T J is cacuated from the ambient temperature T A and power dissipation P D as foows: T J = T A + (P D θ JA ) The power dissipation in the IC is the function of the suppy votage, output votage and the oad resistance. For a given suppy votage, the worst-case power dissipation P D(MAX) occurs at the maximum suppy current with the output votage at haf of either suppy votage (or the maximum swing is ess than / the suppy votage). P D(MAX) is given by: P D(MAX) = (V S I S(MAX) ) + (V S /) /R L Exampe: An LT8 in SO-8 mounted on a mm area of PC board without any extra heat spreading pane connected to its V pin has a therma resistance of C/W, θ JA. Operating on ±V suppies with both ampifi ers simutaneousy driving Ω oads, the worst-case power dissipation is given by: P D(MAX) = ( ma) + (.) / =. +. =.7W The maximum ambient temperature that the part is aowed to operate is: T A = T J (P D(MAX) C/W) = C (.7W C/W) = 7 C To operate the device at higher ambient temperature, connect more meta area to the V pin to reduce the therma resistance of the package as indicated in Tabe. Input Offset Votage The offset votage wi change depending upon which input stage is active and the maximum offset votage is guaranteed to be ess than 3. The change of V OS over the entire input common mode range (CMRR) is ess than. on a singe V and 3V suppy. Input Bias Current The input bias current poarity depends upon a given input common votage at whichever input stage is operating. When the PNP input stage is active, the input bias currents f ow out of the input pins and fow into the input pins when the NPN input stage is activated. Because the input offset current is ess than the input bias current, matching the source resistances at the input pin wi reduce tota offset error. Output The LT89/LT8 can deiver a arge output current, so the short-circuit current imit is set around 9mA to prevent damage to the device. Attention must be paid to keep the junction temperature of the IC beow the absoute maximum rating of C (refer to the Power Dissipation section) when the output is continuousy short-circuited. 89fa 7

18 LT89/LT8 APPLICATIONS INFORMATION The output of the ampifier has reverse-biased diodes connected to each suppy. If the output is forced beyond either suppy, unimited current wi f ow through these diodes. If the current is transient and imited to severa hundred miiamps, no damage to the device wi occur. Overdrive Protection When the input votage exceeds the power suppies, two pairs of crossing diodes, D to D4, wi prevent the output from reversing poarity. If the input votage exceeds either power suppy by 7, diodes D/D or D3/D4 wi turn on, keeping the output at the proper poarity. For the phase reversa protection to perform propery, the input current must be imited to ess than ma. If the ampifi er is severey overdriven, an externa resistor shoud be used to imit the overdrive current. The LT89/LT8 s input stages are aso protected against differentia input votages of.4v or higher by back-to-back diodes, D/D8, that prevent the emitterbase breakdown of the input transistors. The current in these diodes shoud be imited to ess than ma when they are active. The worst-case differentia input votage usuay occurs when the input is driven whie the output is shorted to ground in a unity-gain confi guration. In addition, the ampifier is protected against ESD strikes up to 3kV on a pins by a pair of protection diodes on each pin that are connected to the power suppies as shown in Figure. Capacitive Load The LT89/LT8 is optimized for high bandwidth and ow distortion appications. It can drive a capacitive oad about pf in a unity-gain confi guration and more with higher gain. When driving a arger capacitive oad, a resistor of Ω to Ω shoud be connected between the output and the capacitive oad to avoid ringing or osciation. The feedback shoud sti be taken from the output so that the resistor wi isoate the capacitive oad to ensure stabiity. Graphs on capacitive oads indicate the transient response of the ampifier when driving capacitive oad with a specified series resistor. Feedback Components When feedback resistors are used to set up gain, care must be taken to ensure that the poe formed by the feedback resistors and the tota capacitance at the inverting input does not degrade stabiity. For instance, the LT89 in a noninverting gain of, set up with two k resistors and a capacitance of 3pF (device pus PC board), wi probaby ring in transient response. The poe that is formed at MHz wi reduce phase margin by 34 degrees when the crossover frequency of the ampifier is around 7MHz. A capacitor of 3pF or higher connected across the feedback resistor wi eiminate any ringing or osciation. SHDN Pin The LT89 has a SHDN pin to reduce the suppy current to ess than.ma. When the SHDN pin is pued ow, it wi generate a signa to power down the device. If the pin is eft unconnected, an interna pu-up resistor of k wi keep the part fuy operating as shown in Figure. The output wi be high impedance during shutdown, and the turn-on and turn-off time is ess than ns. Because the inputs are protected by a pair of back-to-back diodes, the input signa wi feed through to the output during shutdown mode if the ampitude of signa between the inputs is arger than.4v. 8 89fa

19 TYPICAL APPLICATIONS Driving A/D Converters The LT89/LT8 have a 7ns setting time to.% of a V step signa and Ω output impedance at MHz making it idea for driving high speed A/D converters. With the rai-to-rai input and output and ow suppy votage operation, the LT89 is aso desirabe for singe suppy appications. As shown in Figure, the LT89 drives a Msps, -bit ADC, the LTC4. The owpass fiter, R3 and C, reduces the noise and distortion products that might come from the input signa. High quaity capacitors LT89/LT8 and resistors, an NPO chip capacitor and meta-fim surface mount resistors, shoud be used since these components can add to distortion. The votage gitch of the converter, due to its samping nature, is buffered by the LT89 and the abiity of the ampifier to sette it quicky wi affect the spurious-free dynamic range of the system. Figure to Figure 7 depict the LT89 driving the LTC4 at different configurations and votage suppies. The FFT responses show better than 9dB of SFDR for a ±V suppy, and 8dB on a V singe suppy for the.394mhz signa. V IN V P-P R k + V LT89 V R k R3 49.9Ω +A IN C A IN 47pF V LTC4 PGA GAIN = REF =.48V V 89 F BITS Msps AMPLITUDE (db) 4 8 A V = + f SAMPLE = Msps f IN =.394MHz SFDR = 9dB 3 4 FREQUENCY (MHz) 89 F3 Figure. Noninverting A/D Driver Figure Point FFT Response V IN V P-P k k V LT Ω 47pF +A IN A IN V LTC4 PGA GAIN = REF =.48V BITS Msps AMPLITUDE (db) 4 8 A V = f SAMPLE = Msps f IN =.394MHz SFDR = 9dB V V 89 F4 3 4 FREQUENCY (MHz) 89 F Figure 4. Inverting A/D Driver Figure. 49 Point FFT Response 89fa 9

20 LT89/LT8 TYPICAL APPLICATIONS V IN V P-P ON.V DC 3 + V 7 LT Ω 47pF V LTC4 +A IN PGA GAIN = REF = 4.9V A IN V CM BITS Msps AMPLITUDE (db) 4 8 V S = V A V = + f SAMPLE = Msps f IN =.394MHz SFDR = 8dB k 3 89 F k.μf μf 3 4 FREQUENCY (MHz) 89 F7 Figure. Singe Suppy A/D Driver Figure Point FFT Response V 4 V S = V V IN C 33μF R T 7Ω + R k R k + 3 R3 k + LT89 C μf 7 4 R4 k C4 3pF C3 μf + R 7Ω 7Ω COAX CABLE R LOAD 7Ω 89 F8 V OUT VOLTAGE GAIN (db) FREQUENCY (MHz) 89 F9 Figure 8. V Singe Suppy Video Line Driver Figure 9. Video Line Driver Frequency Response Singe Suppy Video Line Driver The LT89 is a wideband rai-to-rai op amp with a arge output current that aows it to drive video signas in ow suppy appications. Figure 8 depicts a singe suppy video ine driver with AC couping to minimize the quiescent power dissipation. Resistors R and R are used to eve-shift the input and output to provide the argest signa swing. A gain of is set up with R3 and R4 to restore the signa at V OUT, which is attenuated by db due to the matching of the 7Ω ine with the back-terminated resistor, R. The back termination wi eiminate any refection of the signa that comes from the oad. The input termination resistor, R T, is optiona it is used ony if matching of the incoming ine is necessary. The vaues of C, C and C3 are seected to minimize the droop of the uminance signa. In some ess stringent requirements, the vaue of capacitors coud be reduced. The 3dB bandwidth of the driver is about 9MHz on V suppy and the amount of peaking wi vary upon the vaue of capacitor C4. 89fa

21 PACKAGE DESCRIPTION MS8 Package 8-Lead Pastic MSOP (Reference LTC DWG # -8- Rev F) LT89/LT8.889 ±.7 (.3 ±.).3 (.) MIN (..3).4 ±.38 (. ±.) TYP. (.) BSC 3. ±. (.8 ±.4) (NOTE 3) 8 7. (.) REF RECOMMENDED SOLDER PAD LAYOUT GAUGE PLANE.8 (.7).4 (.) DETAIL A DETAIL A NOTE:. DIMENSIONS IN MILLIMETER/(INCH). DRAWING NOT TO SCALE TYP.3 ±. (. ±.) SEATING PLANE 4.9 ±. (.93 ±.). (.43) MAX..38 (.9.) TYP. (.) BSC DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED.mm (.") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED.mm (.") PER SIDE. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE.mm (.4") MAX 3. ±. (.8 ±.4) (NOTE 4).8 (.34) REF. ±.8 (.4 ±.) MSOP (MS8) 37 REV F 89fa

22 LT89/LT8 PACKAGE DESCRIPTION S Package -Lead Pastic TSOT-3 (Reference LTC DWG # -8-3 Rev B). MAX.9 REF.9 BSC (NOTE 4). REF 3.8 MAX. REF.4 MIN.8 BSC..7 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR.9 BSC.3.4 PLCS (NOTE 3).8.9. BSC DATUM A. MAX...3. REF.9. (NOTE 3) NOTE:. DIMENSIONS ARE IN MILLIMETERS. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR. MOLD FLASH SHALL NOT EXCEED.4mm. JEDEC PACKAGE REFERENCE IS MO-93.9 BSC S TSOT-3 3 REV B 89fa

23 PACKAGE DESCRIPTION S8 Package 8-Lead Pastic Sma Outine (Narrow. Inch) (Reference LTC DWG # -8-) LT89/LT8. BSC.4 ± (4.8.4) NOTE MIN. ± (.79.97)..7 ( ) NOTE 3.3 ±. TYP RECOMMENDED SOLDER PAD LAYOUT (.3.4).. (.4.8) 4 8 TYP.3.9 (.34.7).4. (..4).. (.4.7) NOTE: INCHES. DIMENSIONS IN (MILLIMETERS).4.9 (.3.483) TYP. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED." (.mm). (.7) BSC SO8 33 Information furnished by Linear Technoogy Corporation is beieved to be accurate and reiabe. However, no responsibiity is assumed for its use. Linear Technoogy Corporation makes no representation that the interconnection of its circuits as described herein wi not infringe on existing patent rights. 89fa 3

24 LT89/LT8 TYPICAL APPLICATION Singe 3V Suppy, 4MHz, 4th Order Butterworth Fiter Benefi ting from a ow votage suppy operation, ow distortion and rai-to-rai output of LT89, a ow distortion fi ter that is suitabe for antiaiasing can be buit as shown in Figure. On a 3V suppy, the fi ter has a passband of 4MHz with.v P-P signa and a stopband that is greater than 7dB to frequency of MHz. 3Ω 47pF 74Ω pf V IN 3Ω V S Ω pf / LT8 + 74Ω Ω 47pF / LT8 + V OUT 89 F Figure. Singe 3V Suppy, 4MHz, 4th Order Butterworth Fiter GAIN (db) V S = 3V, V V IN =.V P-P 9 k k M M M FREQUENCY (Hz) 89 F Figure. Fiter Frequency Response RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT39 4MHz Current Feedback Ampifi er 8V/μs Sew Rate, Shutdown LT3/LT33 Dua/Quad 4MHz, 4V/μs Rai-to-Rai Input and Output Op Amps High DC Accuracy,.3 V OS(MAX), 7mA Output Current, Max Suppy Current.mA per Ampifi er LT3/LT3 Dua/Quad 3MHz, V/μs Rai-to-Rai Input and Output Op Amps High DC Accuracy, μv V OS(MAX), 7mA Output Current, Max Suppy Current 4.4mA per Ampifi er LT8/LT87 Singe/Dua 3MHz, 4V/μs Rai-to-Rai Input and Output Op Amps High DC Accuracy, μv V OS(MAX), Low Noise 3.nV/ Hz, Low Distortion 8dBc at MHz 4 89fa LT 79 REV A PRINTED IN USA Linear Technoogy Corporation 3 McCarthy Bvd., Mipitas, CA (48) 43-9 FAX: (48) LINEAR TECHNOLOGY CORPORATION