LT V, Ultralow Noise, Precision Op Amp. Applications. Typical Application Precision Low Noise Buffer

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1 LT618 36V, Utraow Noise, Precision Op Amp Features Utraow Votage Noise 3nV P-P Noise:.1Hz to 1Hz 1.2nV/ Hz Typica at Hz Maximum Offset Votage: μv Maximum Offset Votage Drift:.μV/ C CMRR: 124 (Minimum) A VOL : 132 (Minimum) Sew Rate: 3V/μs Gain-Bandwidth Product: 1MHz Wide Suppy Range: 8V to 33V Utraow THD: 11 at Hz Unity Gain Stabe Low Power Shutdown: 6.2µA SOIC-8E and 4mm 3mm 12-Lead DFN Packages 4.kV HBM and 2kV CDM Toerant Appications ADC Driver Appications Low Noise Precision Signa Processing Mutipexed Appications DAC Buffer Precision Data Acquisition Active Fiters Professiona Audio Description The LT 618 is a 36V precision operationa ampifier with exceent noise performance. With a.1hz to 1Hz noise of ony 3nV P-P, the LT618 is an outstanding choice for appications where 1/f noise impacts system performance. The LT618 has exceent DC performance with a maximum offset votage of µv and a maximum offset votage drift of.µv/ C. The input offset votage remains ow over the entire common-mode input range, providing a minimum CMRR of 124. Open oop gain is typicay 142 enabing the part to achieve inearity better than 1ppm. The proprietary circuit topoogy of the LT618 provides exceent sew rate and setting time without compromising noise or DC precision. An enabe pin aows the LT618 to be put in a ow power shutdown mode, reducing the typica suppy current to ony 6.2µA. A reference pin for the enabe pin is aso provided, which simpifies the interface between externa circuitry and the LT618. The LT618 is avaiabe in 8-ead SOIC and 12-ead 4mm 3mm DFN packages, both of which incude an exposed pad to reduce therma resistance. The LT618 is specified over the 4 C to 8 C and 4 C to 12 C temperature ranges. L, LT, LTC, LTM, Linear Technoogy and the Linear ogo are registered trademarks of Linear Technoogy Corporation. A other trademarks are the property of their respective owners. Typica Appication Precision Low Noise Buffer V 1µF.1Hz to 1Hz Votage Noise.1µF 1nV/DIV 3nV P-P VIN LT618.1µF VOUT = V = V V 1µF 618 TA1a For more information 1s/DIV 618 TA1b 618f 1

2 LT618 Absoute Maximum Ratings Tota Suppy Votage (V to V )...36V Input Votage (IN, IN,, )... (V.3V) to (V.3V) Input Current (IN, IN,, )... ±1mA Differentia Input Current (IN, IN)...±2mA Output Current (Note 2)... ma RMS Output Short-Circuit Duration...Thermay Limited Pin Configuration (Note 1) Operating and Specified Temperature Range I-Grade...4 C to 8 C H-Grade... 4 C to 12 C Maximum Junction Temperature... 1 C Storage Temperature Range... 6 C to 1 C S8E Lead Temperature (Sodering, 1 sec)...3 C TOP VIEW 1 IN 2 IN 3 V 4 TOP VIEW V OUT NC S8E PACKAGE 8-LEAD PLASTIC SO θ JA = 36 C/W, θ JC = 9 C/W EXPOSED PAD (PIN 9) MUST BE CONNECTED TO V OR FLOATED SEE "PIN FUNCTIONS FOR DETAILS NC IS NOT INTERNALLY CONNECTED V OUT NC NC 1 IN 9 IN 8 NC 7 V DE12(1) PACKAGE 12(1)-LEAD (4mm 3mm) PLASTIC DFN θ JA = 43 C/W, θ JC = 12 C/W EXPOSED PAD (PIN 13) MUST BE CONNECTED TO V OR FLOATED SEE "PIN FUNCTIONS FOR DETAILS NC IS NOT INTERNALLY CONNECTED PINS 2 AND 4 ARE REMOVED Order Information ( LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT618IS8E#PBF LT618IS8E#TRPBF Lead Pastic S8E Exposed Pad 4 C to 8 C LT618IDE#PBF LT618IDE#TRPBF Lead (4mm 3mm) Pastic DFN 4 C to 8 C LT618HS8E#PBF LT618HS8E#TRPBF Lead Pastic S8E Exposed Pad 4 C to 12 C LT618HDE#PBF LT618HDE#TRPBF Lead (4mm 3mm) Pastic DFN 4 C to 12 C Consut LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a abe on the shipping container. For more information on ead free part marking, go to: For more information on tape and ree specifications, go to: Some packages are avaiabe in unit rees through designated saes chaes with #TRMPBF suffix. 2 For more information 618f

3 LT618 Eectrica Characteristics The denotes the specifications which appy over the fu operating temperature range, otherwise specifications and a typica vaues are at T A = 2 C. V =, V =, V CM = V OUT = V, V = 1.7V, V = V uness otherwise noted. V S is defined as (V V ). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OS Input Offset Votage S8E Package DFN Package ±7 ± ±7 ±8 ±7 ±9 V OS / Temp Input Offset Votage Drift (Note 3) S8E Package ±.2 ±. µv/ C I OS Input Offset Current I B Input Bias Current DFN Package ±.2 ±. µv/ C T A = 4 C to 8 C T A = 4 C to 12 C e n Input Noise Votage Density f = 1Hz f = Hz i n Input Noise Current Density f = Hz, Unbaanced Source f = Hz, Baanced Source C IN Input Capacitance Common Mode Differentia Mode R IN Input Resistance Common Mode Differentia Mode V ICM Common-Mode Input Range (Note 4) CMRR Common-Mode Rejection Ratio V ICM = 12V to 12V ± Input Noise Votage.1Hz to 1Hz 3 nv P-P 1.2 nv/ Hz 1.2 nv/ Hz PSRR Power Suppy Rejection Ratio V S = 8V to 33V A VOL Large-Signa Votage Gain R L = Ω, V OUT = 1V to 1V V OL Output Swing Low (V OUT V ) No Load I SINK = 1mA µv µv µv µv na na na na na pa/ Hz pa/ Hz pf pf MΩ kω Guaranteed by CMRR V 3 V 3 V I SINK = 2mA V OH Output Swing High (V V OUT ) No Load 42 I SOURCE = 1mA I SOURCE = 2mA I SC Short-Circuit Current V OUT = V, Sourcing 4 9 ma V OUT = V, Sinking 6 1 ma SR Sew Rate, 1V Step 2 3 V/µs 1 V/µs, V Step 2 V/µs GBW Gain-Bandwidth Product f = khz T A = 4 C to 8 C T A = 4 C to 12 C MHz MHz MHz V S Suppy Votage Range Guaranteed by PSRR 8 33 V For more information 618f 3

4 LT618 Eectrica Characteristics The denotes the specifications which appy over the fu operating temperature range, otherwise specifications and a typica vaues are at T A = 2 C. V =, V =, V CM = V OUT = V, V = 1.7V, V = V uness otherwise noted. V S is defined as (V V ). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS I S Suppy Current In Active Mode T A = 4 C to 8 C T A = 4 C to 12 C In Shutdown Mode, V =.8V THD Tota Harmonic Distortion R L = 6Ω, f = Hz, V OUT = 3V RMS, R L = 6Ω, f = Hz, V OUT = 3V RMS, R L = 6Ω, f = Hz, V OUT = 2V P-P, R L = 6Ω, f = Hz, V OUT = 2V P-P, t S Setting Time V Step.1% (16-Bit),, R L = 2k, C L = 1pF 1V Step.1% (16-Bit),, R L = 2k, C L = 1pF t ON Enabe Time, Setted to 1% 2 μs V Pin Votage Range V V 3 V I Pin Current 7 14 na I Pin Current 7 14 na V L Pin Input Low Votage Reative to.8 V V H Pin Input High Votage Reative to 1.7 V ma ma ma µa µa µs µs Eectrica Characteristics The denotes the specifications which appy over the fu operating temperature range, otherwise specifications and a typica vaues are at T A = 2 C. V = V, V = V, V CM = V OUT = V, V = 1.7V, V = V uness otherwise noted. V S is defined as (V V ). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OS Input Offset Votage S8E Package ±7 ± µv ±7 µv DFN Package ±8 ±7 µv ±9 µv V OS / Temp Input Offset Votage Drift (Note 3) S8E Package ±.2 ±. µv/ C DFN Package ±.2 ±. µv/ C I OS Input Offset Current ±6 na 6 6 na I B Input Bias Current na T A = 4 C to 8 C T A = 4 C to 12 C na na Input Noise Votage.1Hz to 1Hz 3 nv P-P e n Input Noise Votage Density f = 1Hz f = Hz i n Input Noise Current Density f = Hz, Unbaanced Source f = Hz, Baanced Source C IN Input Capacitance Common Mode Differentia Mode R IN Input Resistance Common Mode Differentia Mode nv/ Hz nv/ Hz pa/ Hz pa/ Hz pf pf MΩ kω V ICM Common-Mode Input Range (Note 4) Guaranteed by CMRR V 3 V 3 V CMRR Common-Mode Rejection Ratio V ICM = 2V to 2V For more information 618f

5 LT618 Eectrica Characteristics The denotes the specifications which appy over the fu operating temperature range, otherwise specifications and a typica vaues are at T A = 2 C. V = V, V = V, V CM = V OUT = V, V = 1.7V, V = V uness otherwise noted. V S is defined as (V V ). PSRR Power Suppy Rejection Ratio V S = 8V to 33V A VOL Large-Signa Votage Gain R L = Ω, V OUT = 2V to 2V V OL Output Swing Low (V OUT V ) No Load I SINK = 1mA I SINK = 2mA V OH Output Swing High (V V OUT ) No Load 42 I SOURCE = 1mA I SOURCE = 2mA I SC Short-Circuit Current V OUT = V, Sourcing 4 8 ma V OUT = V, Sinking 4 6 ma SR Sew Rate, 4V Step, 2V Step GBW Gain-Bandwidth Product f = khz T A = 4 C to 8 C T A = 4 C to 12 C V/µs V/µs 14. MHz MHz MHz V S Suppy Votage Range Guaranteed by PSRR 8 33 V I S Suppy Current In Active Mode T A = 4 C to 8 C T A = 4 C to 12 C In Shutdown Mode, V =.8V THD Tota Harmonic Distortion R L = 1Ω, f = Hz, V OUT = 1.41V RMS, R L = 1Ω, f = Hz, V OUT = 1.41V RMS, t ON Enabe Time, Setted to 1% 3 μs V Pin Votage Range V V 3 V I Pin Current 7 14 na I Pin Current 7 14 na V L Pin Input Low Votage Reative to.8 V V H Pin Input High Votage Reative to 1.7 V Note 1: Stresses beyond those isted under Absoute Maximum Ratings may cause permanent damage to the device. Exposure to any Absoute Maximum Rating condition for extended periods may affect device reiabiity and ifetime. Note 2: The LT618 is capabe of producing peak output currents in excess of ma. Current density imitations within the IC require the continuous RMS current suppied by the output (sourcing or sinking) over the operating ifetime of the part be imited to under ma (Absoute Maximum). Proper heat sinking may be required to keep the junction temperature beow the absoute maximum rating. Refer to Figure 9, and the Safe Operating Area section of the data sheet for more information. Note 3: Guaranteed by design. Note 4: The LT618 input stage is imited to operating between V 3V and V 3V. Exceeding this input common mode range wi cause a significant increase in input bias current, reduction of open oop gain and degraded stabiity. ma ma ma µa µa For more information 618f

6 LT618 Typica Performance Characteristics T A = 2 C, V =, V =, V = 1.7V, V = V, R L = Ω uness otherwise noted. PERCTAGE OF UNTIS (%) Typica Distribution of Input Offset Votage 633 PARTS SOIC8E PACKAGE INPUT OFFSET VOLTAGE (µv) 618 G1 PERCTAGE OF UNITS (%) Typica Distribution of Input Offset Votage 26 PARTS DFN PACKAGE INPUT OFFSET VOLTAGE (µv) 618 G2 PERCTAGE OF UNITS (%) Typica Distribution of Input Offset Votage Drift 128 PARTS SOIC8E PACKAGE INPUT OFFSET VOLTAGE DRIFT (µv/ C) 618 G3 PERCTAGE OF UNITS (%) Typica Distribution of Input Offset Votage Drift 123 PARTS DFN PACKAGE CHANGE IN OFFSET VOLTAGE (2µV/DIV) Input Offset Votage Warm-Up Drift SOIC8E PACKAGE TYPICAL PARTS 1s/DIV 618 G INPUT OFFSET VOLTAGE (µv) Input Offset Votage vs Suppy Votage TYPICAL PARTS INPUT OFFSET VOLTAGE DRIFT (µv/ C) 618 G TOTAL SUPPLY VOLTAGE (V) 618 G6 INPUT OFFSET VOLTAGE (µv) Input Offset Votage vs Input Common Mode Votage INPUT COMMON MODE VOLTAGE (V) 618 G9 INPUT BIAS CURRT (na) Input Bias Current vs Temperature TYPICAL PARTS TEMPERATURE ( C) 618 G1 6 For more information 618f

7 Typica Performance Characteristics T A = 2 C, V =, V =, V = 1.7V, V = V, R L = Ω uness otherwise noted. LT618 OP LOOP GAIN () Open-Loop Gain and Phase vs Frequency OP LOOP PHASE (DEGREES) OP LOOP GAIN () Open-Loop Gain vs Load 1 V OUT = ±1V M 1M1M FREQUCY (Hz) 618 G LOAD CURRT (ma) 618 G8.1Hz to 1Hz Votage Noise 1 Votage Noise Density vs Frequency 1 Integrated Votage Noise (.1Hz to Frequency Indicated) 1nV/DIV 1s/DIV 618 G11 VOLTAGE NOISE DSITY (nv/ Hz) 1 1 RMS VOLTAGE NOISE (µv) M 1M1M FREQUCY (Hz) 618 G M 1M FREQUCY (Hz) 618 G13 CURRT NOISE DSITY (pa/ Hz) Current Noise Density vs Frequency UNBALANCED BALANCED M FREQUCY (Hz) 618 G14 MAXIMUM UNDISTORTED OUTPUT VOLTAGE (V P-P ) Maximum Undistorted Output Ampitude vs Frequency THD < FREQUCY (khz) 618 G1 For more information 618f 7

8 LT618 Typica Performance Characteristics T A = 2 C, V =, V =, V = 1.7V, V = V, R L = Ω uness otherwise noted. Large-Signa Transient Response (V Step) Large-Signa Transient Response (1V Step) Sma-Signa Transient Response 1pF 6pF 1V/DIV 2V/DIV /DIV pf 1µs/DIV 618 G16 1µs/DIV 618 G17 1ns/DIV 618 G18 OVERSHOOT (%) Overshoot vs Capacitive Load V s = ±V V s = ± CAPACITIVE LOAD (pf) 618 G19 SLEW RATE (V/µs) Sew Rate vs Temperature (V Step) FALLING EDGE RISING EDGE TEMPERATURE ( C) 618 G2 SLEW RATE (V/µs) Sew Rate vs Temperature (1V Step) FALLING EDGE RISING EDGE TEMPERATURE ( C) 618 G21 SLEW RATE (V/µs) Sew Rate vs Input Step V S = ±18V FALLING EDGE RISING EDGE COMMON MODE REJECTION RATIO () CMRR vs Frequency INPUT STEP SIZE (V PP ) 618 G22 1M 1M 1M FREQUCY (Hz) 618 G23 8 For more information 618f

9 Typica Performance Characteristics T A = 2 C, V =, V =, V = 1.7V, V = V, R L = Ω uness otherwise noted. LT618 GAIN() Cosed Loop Gain vs Frequency C L = pf C L = 1pF C L = 1pF R F = 3Ω FREQUCY (MHz) 618 G26 POWER SUPPLY REJECTION RATIO () PSRR vs Frequency PSRR PSRR M 1M1M FREQUCY (Hz) 618 G27 TOTAL HARMONIC DISTORTION NOISE () THD Noise vs Frequency, V OUT = 3V RMS R L = 6Ω R L = 2kΩ FREQUCY (khz) 618 G26 TOTAL HARMONIC DISTORTION NOISE () THD Noise vs Frequency, V OUT = 3V RMS R F = R L = 6Ω R L = 2kΩ FREQUCY (khz) 618 G27 OUTPUT ERROR (1ppm/DIV) DC Linearity R LOAD = 6Ω INPUT VOLTAGE(V) 618 G28 SUPPLY CURRT (ma) Suppy Current vs Suppy Votage 12 C 8 C 2 C 4 C SUPPLY VOLTAGE (V) 618 G31 SHUTDOWN SUPPLY CURRT (µa) Shutdown Suppy Current vs Temperature V S = 3V V S = 1V TEMPERATURE ( C) 618 G32 V V V/DIV V OUT V V/DIV I(V ) A ma/div Enabe/Disabe Response V IN = 1V pp AT 7kHz 1µs/DIV 618 G33 For more information 618f 9

10 LT618 Typica Performance Characteristics T A = 2 C, V =, V =, V = 1.7V, V = V, R L = Ω uness otherwise noted. OUTPUT LOW SATURATION VOLTAGE (V) Output Saturation Votage vs Sink Current (Output Low) 12 C 8 C 2 C 4 C SINKING LOAD CURRT (ma) 618 G34 OUTPUT HIGH SATURATION VOLTAGE (V) Output Saturation Votage vs Source Current (Output High) 12 C 8 C 4 C 2 C SOURCING LOAD CURRT (ma) 618 G3 Positive Output Overdrive Recovery Negative Output Overdrive Recovery OUTPUT V/DIV INPUT 2/DIV V INPUT 2/DIV V OUTPUT V/DIV 2 µs/div 618 G36 2 µs/div 618 G37 1 For more information 618f

11 LT618 Pin Functions (SOIC-8E/DFN) (Pin 1/Pins 12): Reference for Pin. It is normay tied to ground. must be in the range from V to V 3V. If grounded, V must be 3V. The pin threshod is specified with respect to the pin. caot be foated. IN (Pin 2/Pin 1): Inverting Input of the Ampifier. IN (Pin 3/Pin 9): Noninverting Input of the Ampifier. V (Pin 4/Pin 7): Negative Power Suppy. Bypass capacitors shoud be paced as cose as possibe between the LT618 suppy pins and ground to ensure proper bypassing. Additiona bypass capacitance may be used between the power suppy pins. OUT (Pin 6/Pin ): Ampifier Output. In shutdown mode, the ampifier s output is not high impedance (see Appications section). V (Pin 7/Pin 3): Positive Power Suppy. Bypass capacitors shoud be paced as cose as possibe between the LT618 suppy pins and ground to ensure proper bypassing. Additiona bypass capacitance may be used between the power suppy pins. (Pin 8/Pin 1): Enabe Input. This pin must be coected high, normay to V, for the ampifier to be functiona. is active high with the threshod approximatey two diodes above. caot be foated. The shutdown threshod votage is specified with respect to the votage on the pin. NC (Pin /Pins 6, 8, 11): Not internay coected. Exposed Pad (Pin 9/Pin 13): The exposed pad is eectricay coected to V, but shoud not be used to provide power to the part. Use the V pin to provide power. The exposed pad can be coected to V or foated. Coecting the exposed pad to the V pane wi improve therma performance (see Safe Operating Area section). Simpified Schematic V LOAD IN IN 2.8Ω 2.8Ω OUTPUT DRIVE CIRCUITRY OUT k k V 618 SS For more information 618f 11

12 LT618 Appications Information Overview The proprietary circuitry used in the LT618 provides a unique combination of precision specifications incuding utraow 1/f noise, ow broadband noise, ow offset and enhanced sew rate without degrading CMRR. The combination of DC specifications and fast setting time aows the LT618 to sove demanding signa chain requirements. Attention to board ayout, suppy bypassing and heat sinking must be observed to ensure that the fu performance of the LT618 is reaized. The suppy current of the LT618 increases with arge differentia input votages. Normay, this does not impact the LT618 because the ampifier is forcing the two inputs to be at the same potentia. Conditions which cause continuous differentia input votage to appear shoud be avoided in order to avoid excessive die heating of the LT618. This incudes but is not imited to: operation as a comparator, excessive oading on the output and overdriving the input. Preserving Input Precision Preserving the input accuracy of the LT618 requires that the appication circuit and PC board ayout do not introduce errors comparabe to or greater than the 7µV typica offset of the ampifier. Temperature differentias across the input coections can generate thermocoupe votages of tens of microvots so the coections of the input eads shoud be short, cose together and away from heat dissipating components. Air currents across the board can aso generate temperature differentias. In precision appications it is aso important to consider ampifier oading when seecting feedback resistor vaues as we as the oads on the device as these wi appear in parae and affect input offset. See the Feedback Components section for more detais. Noise The ampifier votage noise (e n ), positive input current noise (i np ), negative input current noise (i ), source resistance (R S ), and feedback resistors (R1) and (R2) are individua votage noise contributors. The tota noise (e not ) appearing at the output of the LT618 wi be the root sum square of a the individua votage noise contributors (Figure 1). e not = e 2 no e rso G v = 1 R2 R1 e no =e n G V e rso =e nrs G V = e inpo =i np R S G V e r1o =e nr1 R2 R1 = e r2o =e nr2 = e io =i R2 2 2 e inpo e 2 2 r1o e r2o 4kTR2 4kTR S G V R2 4kTR1 R1 2 e io The tota input referred votage noise (e nit ) is cacuated by dividing the tota output referred votage noise (e not ) by the ampifier gain. e nit = e not G V R1 R S e nr1 e nrs i i np e n R2 LT618 e nr2 e not 618 F1 Figure 1. LT618 Noise Contributors 12 For more information 618f

13 LT618 Appications Information High Dynamic Input Impedance Op amps often have protection diodes camping the two inputs within a diode votage of each other as seen in Figure 2. During arge votage transitions on the input, these diodes can conduct, since the output caot respond instantaneousy. This can cause circuitry in front of the ampifier as we as the ampifier s own output stage to get overoaded. Often there may be series input resistors (either integrated or discrete) to imit this current, but on extremey ow noise parts such as the LT618, that is not desirabe. The unique input circuitry of the LT618 does not have this typica diode configuration, but rather a series Zener diode configuration as shown in Figure 3. For V input steps, the LT618 has much higher impedance during transients and aows the user to reduce or eiminate the current imiting resistors, preserving ow noise. Figure 4 shows how input bias current increases with differentia input votage for the traditiona protection scheme and the LT618 protection scheme. V INPUT STEP V INPUT STEP CURRT LIMITING RESISTOR NEEDED CURRT LIMITING RESISTOR NOT NEEDED R F LT618 OUTPUT 618 F2 Figure 2. Typica Op Amp Diode Input Protection OUTPUT 618 F3 INPUT BIAS CURRT (µa) LT618 I B TYPICAL OP AMP I B LT618 I B TYPICAL OP AMP I B DIFFERTIAL INPUT VOLTAGE (V) 618 F4 Figure 4. Typica Op Amp vs LT618 Input Protection Shutdown Operation The LT618 shutdown function has been designed to be easiy controed from singe suppy ogic or microcontroers. To enabe the LT618 when V = V the enabe pin must be driven above 1.7V. Conversey, to enter the ow power shutdown mode the enabe pin must be driven beow.8v. In a ± dua suppy appication where V =, the enabe pin must be driven above 13.3V to enabe the LT618. If the enabe pin is driven beow 14.2V the LT618 enters the ow power shutdown mode. Note that to enabe the LT618 the enabe pin votage can range from 13.3V to whereas to disabe the LT618 the enabe pin can range from to 14.2V. Figure shows exampes of enabe pin contro. Whie in shutdown, the output of the LT618 is not high impedance. The LT618 is typicay capabe of coming out of shutdown within 2μs. This is usefu in power sensitive appications where duty cyced operation is empoyed. In these appications the system is in ow power mode the majority of the time, but then needs to wake up quicky and sette for an acquisition before being powered back down to save power. Figure 3. LT618 Series Zener Diode Input Protection For more information 618f 13

14 LT618 Appications Information 13.3V TO 1.7V TO 1.7V TO 3V 1.7V TO 8V 2.3V TO 4V ON ON ON ON ON TO 14.2V OV TO.8V V TO.8V V TO.8V 4V TO 3.2V OFF OFF 3V OFF 8V OFF 4V OFF TO V OR LOGIC TO V OR LOGIC TO V OR LOGIC TO V OR LOGIC TO V OR LOGIC LT618 LT618 LT618 LT618 LT618 4V HIGH VOLTAGE SPLIT SUPPLIES HIGH VOLTAGE SPLIT SUPPLIES HIGH VOLTAGE SINGLE SUPPLY LOW VOLTAGE SINGLE SUPPLY LOW VOLTAGE SPLIT SUPPLIES 618 F Figure. LT618 Enabe Pin Contro Exampes Output Leakage in Shutdown Mode In shutdown mode, the LT618 s output is not high impedance and may conduct a sma amount of current due to on-chip eakages. This current can interact with the input protection diodes or any other circuitry coected to the output. Consider the case of a unity gain buffer shown in Figure 6. When the LT618 is paced in shutdown mode, eakage current fows from the V OUT pin through the input protection diodes causing V OUT to be around 6V. If the output pin is oaded to ground in the same exampe, the output woud be I LEAKAGE R LOAD above ground. Figure 7 shows the resuting current as the V OUT is swept. In addition, transient votage appied to the LT618 output whie in shutdown mode may cause the output devices to momentariy conduct. Feedback Components To optimize the stabiity and noise performance of the LT618, care must be taken when seecting feedback components. For higher resistance vaues, the poe formed by the inverting parasitic input capacitance and feedback resistors wi tend to degrade stabiity; a ead compensation capacitor across the feedback resistor may be used to eiminate ringing or osciation. Larger vaue feedback I LEAKAGE V OUT 618 F6 Figure 6. Output Leakage in Shutdown Mode I LEAKAGE (µa) C 9 C 2 C 12 C APPLIED V OUT (V) 618 F7 Figure 7. Output Impedance in Shutdown Mode Configured as a Buffer 14 For more information 618f

15 Appications Information LT618 C F GAIN R G Ω 2k 2Ω 1Ω 1Ω Ω Ω R F Ω 2k 8Ω 9Ω C F pf pf RTI NOISE, f = Hz (nv/ Hz) R F R G C PAR LT618 VOUT 618 F8 Figure 8. Suggested Feedback Components for Low Noise Stabe Operation resistors wi aso contribute more therma noise and further degrade performance (see Appications Information, Noise section). Lower vaue resistances wi tend to improve on these conditions, however, excessive ampifier oading may occur as the feedback network wi appear in parae with the oad resistance the LT618 is required to drive. Figure 8 shows suggested feedback components for maintaining good oop stabiity and noise performance. Capacitive Loads The LT618 can easiy drive capacitive oads up to 1pF in unity gain. The capacitive oad driving capabiity increases as the ampifier is used in higher gain configurations. A sma series resistance between the output and the oad further increases the amount of capacitance that the ampifier can drive. Safe Operating Area The safe operating area, or SOA shown in Figure 9, iustrates the votage, current and temperature conditions where the LT618 can be reiaby operated. The SOA takes into account the ambient temperature and the power dissipated by the device. This incudes the product of the oad current and the difference between the suppy and output votage, and the quiescent current and suppy votage. The LT618 is safe when operated within the boundaries shown in Figure 9. Therma resistance junction to case, θ JC, is rated at a constant 9 C/W. Therma resistance junction to ambient θ JA, is dependent on board ayout and any additiona heat sinking. Coecting the exposed pad to V wi reduce θ JA and improve therma performance. The curves in Figure 9 show the direct effect of θ JA on SOA. LOAD CURRT (ma) 6 CURRT DSITY LIMITED θ JA = 36 C/W T A = 12 C 4 4 θ JA = 43 C/W 3 3 θ JA = C/W JUNCTION TEMPERATURE LIMITED SUPPLY VOLTAGE LOAD VOLTAGE (V) Figure 9. Safe Operating Area 618 F9 For more information 618f 1

16 LT618 Typica Appications Low Noise, Low Distortion khz Wien Bridge Osciator with 3% Frequency Trim and Injection Lock 2k 3.24k 68nF FILM 464Ω FREQ TRIM #327 BULB 28V 1W 11Ω 68nF FILM 2Ω LT618 2pF 324Ω OUT LT Ω S/D 1nF 49.9Ω OUT HD2 = 131c HD3 = 18c INJECTION LOCK INPUT 432Ω* * ADJUST FOR AMPLITUDE 618 TA2 FREQUCY TRIM RANGE: ±3% INJECTION LOCK: ±.% AT V PK DRIVE INJECTION ATTUATION: 41 2nd, 44 3rd Low Noise Extended Output Swing 1M TIA Photodiode Ampifier 24V 6.19k.1µF 1M I PD V PHOTO DIODE SFH213 = V = V D S V JFET NXP BF862 1.k.pF LT618 V S = 24V/V BW = khz 618 TA3 V OUT ~.4V I PD 1M 16 For more information 618f

17 Typica Appications V R SSE.1Ω R11 1Ω V SSE Low Noise Precision Current Monitor LT618 LT1678 R1 R2* R4* LT1678 R3* k R* k V OUT V REF LT TA *LT4-6 THE LT618 IN THIS CIRCUIT PROVIDES LOW NOISE, LOW DISTORTION AMPLIFICATION OF A SMALL SSE VOLTAGE DERIVED FROM A LOW IMPEDANCE SOURCE ACROSS A WIDE INPUT COMMON MODE RANGE. THE SECOND STAGE DIFFERTIAL AMPLIFIER WITH VARIABLE REFERCE REJECTS THE INPUT COMMON MODE VOLTAGE. AN OPTIONAL LT1678 BUFFER AMPLIFIER FURTHER ISOLATES THE SOURCE FROM LOADING BY R4 AND R. THE GAIN IS V/V, WITH BANDWIDTH APPROXIMATELY Hz AND INPUT REFERRED NOISE 1.4nV/ Hz. Low Noise, High CMRR Instrumentation Ampifier V IN LT k REFA REFB REFC 19k 38k 23.7k 19k V IN 19k 49.9Ω 19k OUT V OUT 49.9k IN 19k REF V REF LT618 V IN 19k 38k 23.7k REFA REFB REFC SHDN V LT TA GAIN = 2V/V INPUT REFERRED NOISE = 2.1nV/ Hz CMRR = 1 3 BANDWIDTH = 7.kHz For more information 618f 17

18 LT618 Package Description Pease refer to for the most recent package drawings. S8E Package 8-Lead Pastic SOIC (Narrow.1 Inch) Exposed Pad (Reference LTC DWG # Rev C). (1.27) BSC.4 ±. (1.143 ±.127) (4.81.4) NOTE 3. (.13) MAX (6.22) MIN.89 (2.26) REF.16 ±. (4.6 ±.127) ( ) ( ) ( ) NOTE 3.3 ±. (.76 ±.127) TYP.118 (2.99) REF RECOMMDED SOLDER PAD LAYOUT ( ).8.1 (.23.24).1.2 (.24.8) 4 8 TYP.3.69 ( ) (.11.24).. (..13).16. ( ) NOTE: INCHES 1. DIMSIONS IN (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED.1" (.24mm) 4. STANDARD LEAD STANDOFF IS 4mis TO 1mis (DATE CODE BEFORE 42). LOWER LEAD STANDOFF IS mis TO mis (DATE CODE AFTER 42) (.3.483) TYP. (1.27) BSC S8E 11 REV C 18 For more information 618f

19 Package Description Pease refer to for the most recent package drawings. LT618 DE12(1) Package 12-Lead Pastic DFN (4mm 3mm) Variation DE12(1) with 2 Pins Removed. Fip Chip (Reference LTC DWG # Rev Ø) 3.6 ±. 2.1 ±. 3. ±..7 ±..2 ±. 2.2 ±. PACKAGE OUTLINE.2 ±.. BSC RECOMMDED SOLDER PAD PITCH AND DIMSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4. ±.1 (2 SIDES) ±.1 PIN 1 TOP MARK (NOTE ).2 REF 3. ±.1 (2 SIDES).7 ± REF.2 ±. 3. ±.1. ± ±.. BSC BOTTOM VIEW EXPOSED PAD (UE12(1) DFN 314 REV O NOTE: 1. DRAWING NOT TO SCALE 2. ALL DIMSIONS ARE IN MILLIMETERS 3. DIMSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PREST, SHALL NOT EXCEED.1mm ON ANY SIDE 4. EXPOSED PAD SHALL BE SOLDER PLATED. SHADED AREA IS ONLY A REFERCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Information furnished by Linear Technoogy Corporation is beieved to be accurate and reiabe. However, no responsibiity is assumed for its use. Linear Technoogy Corporation makes no representation that the intercoection For more of its circuits information as described herein wi not infringe on existing patent rights. 618f 19

20 LT618 Typica Appications Driving LTC with ±1V Input Signa (f IN = 1Hz, 1FS, 8ksps) 1V/A V 1V 1V/A V V IN 1V LT618 R F R G R F R G R1 C1 2k 2k V REF = V 499Ω LT1637 LT4-4 V V V IN IN V 2.V V REF LTC SAR ADC GND V DD 2-BIT 499Ω 1µF V 618 TA6 A V (V/V) COMPONT VALUES SNR () THD () SFDR () 1 R F = Ω, R G = OP, R1 = Ω, C1 = OP R F = 9Ω, R G = 1Ω, R1 = 1Ω, C1 =.1µF Reated Parts PART NUMBER DESCRIPTION COMMTS LT128 Utraow Noise, Precision High Speed Op Amp, A V 2 Stabe LT1128 Utraow Noise, Precision High Speed Op Amp, Stabe.1Hz to 1Hz Noise = 3nV P-P, e n =.8nV/ Hz, V OS = 4µV, SR = /µs, GBW = 7MHz, I S = 7.4mA.1Hz to 1Hz Noise = 3nV P-P, e n =.8nV/ Hz, V OS = 4µV, SR = 6V/µs, GBW = 2MHz, I S = 7.4mA LT111 Utraow Noise, Low Distortion, Audio Op Amp DC to 2kHz Noise =.µv P-P, e n =.9nV/ Hz, V OS = 2µV, SR = /µs, GBW = 7MHz, I S = 8.mA LT137 Low Noise, High Speed Precision Op Amp, A V Stabe LT17 Low Noise, High Speed Precision Op Amp, Stabe.1Hz to 1Hz Noise = 6nV P-P, e n = 2.nV/ Hz, V OS = 2µV, SR = /µs, GBW = 6MHz, I S = 2.7mA.1Hz to 1Hz Noise = 6nV P-P, e n = 2.nV/ Hz, V OS = 2µV, SR = 2.V/µs, GBW = 8MHz, I S = 2.7mA LT1468 Low Noise, 16-Bit Op Amp.1Hz to 1Hz Noise =.3µV P-P, e n = nv/ Hz, V OS = 7µV, SR = 22V/µs, GBW = 9MHz, I S = 3.9mA LT62 Low Power, Enhanced Sew Op Amp.1Hz to 1Hz Noise = 1.1µV P-P, e n = 46nV/ Hz, V OS = 3µV, SR = V/µs, GBW = 4kHz, I S = 1µA LT623 Micropower, Enhanced Sew Op Amp.1Hz to 1Hz Noise = 3.µV P-P, e n = 132nV/ Hz, V OS = 3µV, SR = 1.4V/µs, GBW = 4kHz, I S = 2µA LTC27 High Votage, Low Noise, Zero Drift Ampifier DC to 1Hz Noise = 2nV P-P, e n = 11nV/ Hz, V OS = 4µV, SR =.4V/µs, GBW = 1.MHz, I S =.8mA LTC624 Low Noise, CMOS Ampifier.1Hz to 1Hz Noise = nv P-P, e n = 7nV/ Hz, V OS = 12µV, SR = 1V/µs, GBW = 18MHz, I S = 1.8mA LT623 Low Noise, Rai-to-Rai Output Ampifier.1Hz to 1Hz Noise = 18nV P-P, e n = 1.1nV/ Hz, V OS = µv, SR = 6V/µs, GBW = 21MHz, I S = 3.1mA 2 Linear Technoogy Corporation 163 McCarthy Bvd., Mipitas, CA For more information (48) FAX: (48) f LT 816 PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 216