LTC6652 Precision Low Drift Low Noise Buffered Reference FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION

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1 FEATURES n Low Drift: A Grade 5ppm/ C Max B Grade ppm/ C Max n High Accuracy: A Grade ±.5%, B Grade ±.% n Low Noise: ppm p-p (.Hz to Hz) n Fuy Specifi ed Over 4 C to 5 C Temperature Range n Sinks and Sources Current: ±5mA n Low Power Shutdown: <μa Maximum n Low Dropout: 3mV n No Externa Load Capacitor Required n Wide Suppy Range to 3.V n 8-Lead MSOP Package APPLICATIONS n Automotive Contro and Monitoring n High Temperature Industria n High Resoution Data Acquisition Systems n Instrumentation and Process Contro n Precision Reguators n Medica Equipment DESCRIPTION LTC665 Precision Low Drift Low Noise Buffered Reference The LTC 665 is a precision, ow drift, ow noise reference that is fuy specified over the 4 C to 5 C temperature range, making it an idea choice for automotive or high temperature appications. High order curvature compensation aows this reference to achieve a ow drift of ess than 5ppm/ C with a predictabe temperature characteristic and an output votage accuracy of ±.5% The LTC665 ow dropout series reference can be powered from a 3.V suppy and run down to 3mV above the output votage. The LTC665 reference comes in an MSOP package. It boasts ow noise, exceent oad reguation, source and sink capabiities and exceptiona ine rejection, making it a superior choice for demanding precision appications. It aso has a shutdown mode for ow power appications and no output capacitor is required. L, LT, LTC and LTM are registered trademarks of Linear Technoogy Corporation. A other trademarks are the property of their respective owners. TYPICAL APPLICATION Basic Connection.5 Output Votage Temperature Drift.8V 3.V C IN.μF LTC SHDN GND.5V C OUT μf (OPTIONAL) 665 TAa REFERENCE VOLTAGE (V) TEMPERATURE ( C) 665 TAb

2 ABSOLUTE MAXIMUM RATINGS (Note ) Input Votage to GND....3V to 3.V SHDN to GND....3V to ( +.3V) Output Votage....3V to ( +.3V) Output Short-Circuit Duration... Indefinite Operating Temperature Range... 4 C to 5 C Storage Temperature Range (Note ) C to 5 C Lead Temperature Range (Sodering, sec)... 3 C PIN CONFIGURATION DNC SHDN GND 3 4 TOP VIEW 8 GND* 7 GND* 6 5 GND* MS8 PACKAGE 8-LEAD PLASTIC MSOP T JMAX = 5 C, θ JA = C/W DNC: DO NOT CONNECT *CONNECT THE PINS TO DEVICE GND (PIN 4) ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC665AHMS8-.5#PBF LTC665AHMS8-.5#TRPBF LTCQV 8-Lead Pastic MSOP 4 C to 5 C LTC665BHMS8-.5#PBF LTC665BHMS8-.5#TRPBF LTCQV 8-Lead Pastic MSOP 4 C to 5 C Consut LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a abe on the shipping container. Consut LTC Marketing for information on non-standard ead based fi nish parts. For more information on ead free part marking, go to: For more information on tape and ree specifi cations, go to: AVAILABLE OPTIONS OUTPUT VOLTAGE INITIAL ACCURACY TEMPERATURE COEFFICIENT.5.5% 5ppm/ C.% ppm/ C Note: Other votage options are in deveopment. Consut factory for status. ORDER PART NUMBER LTC665AHMS8-.5 LTC665BHMS8-.5

3 ELECTRICAL CHARACTERISTICS LTC665 The denotes the specifi cations which appy over the fu operating temperature range, otherwise specifi cations are at T A = 5 C, = +.5V, uness otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Output Votage LTC665A.5.5 % LTC665B.. % Output Votage Temperature Coeffi cient (Note 3) LTC665A LTC665B 4 5 ppm/ C ppm/ C Line Reguation V +.5V V 3.V, SHDN = V 6 5 ppm/v OUT IN IN 8 ppm/v Load Reguation (Note 4) I SINK = 5mA 5 5 ppm/ma 45 ppm/ma I SOURCE = 5mA 75 ppm/ma ppm/ma Minimum Operating Votage (Note 5) I OUT = 5mA, Error.%.8 V Output Short-Circuit Current Short to GND ma Short to 6 ma Shutdown Pin (SHDN) Logic High Input Votage Logic High Input Current Logic Low Input Votage Logic Low Input Current No Load. 35. Suppy Current μa 56 μa Shutdown Current. μa Output Votage Noise (Note 6).Hz f Hz ppm P-P Hz f khz 3 ppm RMS Turn-On Time.% Setting 4 μs Long Term Drift of Output Votage (Note 7) 6 ppm/ khr Hysteresis (Note 8) Δ T = 4 C to 5 C 5 ppm.8 V μa V μa Note : Stresses beyond those isted under Absoute Maximum Ratings may cause permanent damage to the device. Exposure to any Absoute Maximum Rating condition for extended periods may affect device reiabiity and ifetime. Note : If the parts are stored outside of the specifi ed temperature range, the output may shift due to hysteresis. Note 3: Temperature coeffi cient is measured by dividing the max change in output votage by the specifi ed temperature range. Note 4: Load reguation is measured on a puse basis from no oad to the specified oad current. Output changes due to die temperature change must be taken into account separatey. Note 5: Excudes oad reguation errors. Note 6: Peak-to-peak noise is measured with a 3-poe highpass at.hz and 4-poe owpass fiter at Hz. The unit is encosed in a sti-air environment to eiminate thermocoupe effects on the eads. The test time is seconds. RMS noise is measured on a spectrum anayzer in a shieded environment where the intrinsic noise of the instrument is removed to determine the actua noise of the device. Note 7: Long term stabiity typicay has a ogarithmic characteristic and therefore, changes after hours tend to be much smaer than before that time. Tota drift in the second thousand hours is normay ess than one third that of the fi rst thousand hours with a continuing trend toward reduced drift with time. Long-term stabiity wi aso be affected by differentia stresses between the IC and the board materia created during board assemby. Note 8: Hysteresis in output votage is created by package stress that differs depending on whether the IC was previousy at a higher or ower temperature. Output votage is aways measured at 5 C, but the IC is cyced to the hot or cod temperature imit before successive measurements. Hysteresis is roughy proportiona to the square of the temperature change. For instruments that are stored at we controed temperatures (within or 3 degrees of operationa temperature) it s usuay not a dominant error source. 3

4 TYPICAL PERFORMANCE CHARACTERISTICS REFERENCE VOLTAGE (V) Output Votage Temperature Drift Line Reguation Load Reguation (Sourcing) 3 TYPICAL PARTS TEMPERATURE ( C) OUTPUT VOLTAGE (V) C 5 C 4 C INPUT VOLTAGE (V) OUTPUT VOLTAGE CHANGE (ppm) C OUTPUT CURRENT (ma) 4 C 5 C 665 G 665 G 665 G3 7 Load Reguation (Sinking) Suppy Current vs Input Votage. Shutdown Current vs Suppy Votage OUTPUT VOLTAGE CHANGE (ppm) C 5 C 4 C OUTPUT CURRENT (ma) SUPPLY CURRENT (μa) C 5 C 4 C INPUT VOLTAGE (V) 4 SUPPLY CURRENT (μa) C 5 C 4 C SUPPLY VOLTAGE (V) 665 G4 LTC33 TPC5 665 G6 POWER SUPPLY REJECTION RATIO (db) Power Suppy Rejection Ratio vs Frequency C OUT = μf. FREQUENCY (khz) C OUT = μf C OUT = μf 665 G7 OUTPUT IMPEDANCE ( ) Output Impedance vs Frequency C OUT = F C OUT = F C OUT = F... FREQUENCY (khz) 665 G8 OUTPUT CURRENT (ma)... Minimum - Differentia (Sourcing) 5 C 5 C, 4 C.. INPUT-OUTPUT VOLTAGE (V) 665 G9

5 TYPICAL PERFORMANCE CHARACTERISTICS Minimum - Differentia (Sinking) Low Frequency.Hz to Hz Transient Noise 4 Output Votage Noise Spectrum OUTPUT CURRENT (ma) 5 C OUTPUT NOISE (μv/div) NOISE VOLTAGE (nv/ Hz) C 4 C.. INPUT-OUTPUT VOLTAGE (V) TIME ( SECOND/DIV).. FREQUENCY (khz) 665 G 665 G 665 G NUMBER OF UNITS Typica Distribution for LTC UNITS LTC665A LIMITS OUTPUT CAPACITOR μf μf.μf nf nf pf LTC Stabiity with Output Capacitance REGION OF MARGINAL STABILITY V TRIP (V) SHDN Input Votage Threshods vs V TH(UP) V TH(DN) OUTPUT VOLTAGE (V) 665 G5 NO CAP 5 5 LOAD CURRENT (ma) 665 G (V) 665 G3 5

6 PIN FUNCTIONS DNC (Pin ): Do Not Connect. (Pin ): Power Suppy. The minimum suppy input is.8v. The maximum suppy is 3.V. Bypassing with a.μf capacitor to GND wi improve PSRR. SHDN (Pin 3): Shutdown Input. This active ow input powers down the device to <μa. For norma operation tie this pin to. GND (Pin 4): Device Ground. (Pin 6): Output Votage. An output capacitor is not required. For some appications, a capacitor between.μf to μf can be beneficia. See the graphs in the Typica Performance Characteristics section for further detais. GND (Pins 5,7,8): Interna function. Ground this pin. BLOCK DIAGRAM SHDN 3 BANDGAP GND 665 BD APPLICATIONS INFORMATION Bypass and Load Capacitors The LTC665 votage reference does not require an input capacitor, but a.μf capacitor ocated cose to the part improves power suppy rejection. The LTC665 votage reference is stabe with or without a capacitive oad. For appications where an output capacitor is beneficia, a vaue of.μf to μf is recommended depending on oad conditions. The Typica Performance Characteristics section incudes a pot iustrating a region of margina stabiity. Either no or ow vaue capacitors for any oad current are acceptabe. For oads that sink current or ight oads that source current, a.μf to μf capacitor has stabe operation. For heavier oads that source current a.5μf to μf capacitor range is recommended. The transient response for a.5v step on with and without an output capacitor is shown in Figures and 3, respectivey. The LTC votage reference is guaranteed to source and sink up to 5mA. The test circuit for transient oad step response is shown in Figure. Figures 4 and 5 show a 5mA source and sink oad step response without a oad capacitor, respectivey. Start-Up The start-up characteristic of the LTC665 is shown in Figures 8 and 9. Note that the turn-on time is affected by the vaue of the output capacitor. 6

APPLICATIONS INFORMATION LTC665 3V C IN.μF, 3 6 Ω LTC665-.5 4, 5, 7, 8 C L μf Figure. Transient Load Test Circuit V GEN.

Transient Response Without Output Capacitor Figure 5. LTC665-.5 Sinking Current Without Output Capacitor 3.

Transient Response with μf Output Capacitor C OUT = μf 5μs/DIV 665 F6 Figure 6. LTC665-.

7 APPLICATIONS INFORMATION LTC665 3V C IN.μF, 3 6 Ω LTC , 5, 7, 8 C L μf Figure. Transient Load Test Circuit V GEN.5V 665 F 3.5V 3V 5mA I OUT ma 5mV/DIV mv/div C OUT = μf 5μs/DIV 665 F C OUT = μf 5μs/DIV 665 F5 Figure. Transient Response Without Output Capacitor Figure 5. LTC Sinking Current Without Output Capacitor 3.5V 3V ma I OUT 5mA 5mV/DIV mv/div C OUT = μf 5μs/DIV 665 F3 Figure 3. Transient Response with μf Output Capacitor C OUT = μf 5μs/DIV 665 F6 Figure 6. LTC Sourcing Current with Output Capacitor ma I OUT 5mA 5mA I OUT ma mv/div 5mV/DIV C OUT = μf 5μs/DIV 665 F4 C OUT = μf 5μs/DIV 665 F7 Figure 4. LTC Sourcing Current Without Output Capacitor Figure 7. LTC Sinking Current with Output Capacitor 7

APPLICATIONS INFORMATION V/DIV.8V 3.V C μf R k LTC665-.5 SHDN V/DIV TO μc N7 665 F C μf C OUT = μf μs/div 665 F8 Figure. Open-Drain Shutdown Circuit Figure 8.

Start-Up Response with μf Output Capacitor In Figure 8, rippe momentariy appears just after the eading edge of powering on.

8 APPLICATIONS INFORMATION V/DIV.8V 3.V C μf R k LTC SHDN V/DIV TO μc N7 665 F C μf C OUT = μf μs/div 665 F8 Figure. Open-Drain Shutdown Circuit Figure 8. Start-Up Response Without Output Capacitor V/DIV SHDN V/DIV V/DIV V/DIV I LOAD = 5mA ms/div 665 F C OUT = μf μs/div 665 F9 Figure. Shutdown Response with 5mA Load Figure 9. Start-Up Response with μf Output Capacitor In Figure 8, rippe momentariy appears just after the eading edge of powering on. This brief one time event is caused by caibration circuitry during initiaization. When an output capacitor is used, the rippe is virtuay undetectabe as shown in Figure 9. Shutdown Mode Shutdown mode is enabed by tying SHDN ow which paces the part in a ow power state (i.e., <μa). In shutdown mode, the output pin takes the vaue of 5kΩ. For norma operation, SHDN shoud be greater than or equa to.v. For use with a microcontroer, use a pu-up resistor to and an open-drain output driver as shown in Figure. The LTC665 s response into and out of shutdown mode is shown in Figure. The trip threshods on SHDN have some dependence on the votage appied to as shown in the Typica Performance Characteristics section. Be carefu to avoid eaving SHDN at a votage between the threshods as this wi ikey cause an increase in suppy current due to shoot-through current. Long-Term Drift Long-term drift cannot be extrapoated from acceerated high temperature testing. This erroneous technique gives drift numbers that are widy optimistic. The ony way ong-term drift can be determined is to measure it over the time interva of interest. The LTC665 ong-term drift data was coected on more than parts that were sodered into PC boards simiar to a rea word appication. The boards were then paced into a constant temperature oven with T A = 33 C, their outputs were scanned reguary and measured with an 8.5 digit DVM. Long-term drift is shown beow in Figure. 8

9 APPLICATIONS INFORMATION 8 LTC MS8 PACKAGE 3 TYPICAL PARTS T A = 33 C C TO 5 C 4 C TO 5 C ppm 6 4 NUMBER OF UNITS HOURS 665 F DISTRIBUTION (ppm) 665 F3 Figure. Long Term Drift Hysteresis The hysteresis data shown in Figure 3 represents the worst-case data coected on parts from 4 C to 5 C. The output is capabe of dissipating reativey high power, i.e., for the LT665-.5, P D =.7V 5.5mA = 58.85mW. The therma resistance of the MS8 package is C/W and this dissipation causes a.8 C interna rise. This coud increase the junction temperature above 5 C and may cause the output to shift due to therma hysteresis. PC Board Layout The mechanica stress of sodering a surface mount votage reference to a PC board can cause the output votage to shift and temperature coeffi cient to change. These two changes are not correated. For exampe, the votage may shift, but the temperature coeffi cient may not. To reduce the effects of stress-reated shifts, mount the reference near the short edge of the PC board or in a corner. In addition, sots can be cut into the board on two sides of the device. Figure 3. Hysteresis Pot 4 C to 5 C The capacitors shoud be mounted cose to the package. The GND and traces shoud be as short as possibe to minimize I R drops. Excessive trace resistance directy impacts oad reguation. Power Dissipation Power dissipation in the LTC665 is dependent on, oad current, and package. The LTC665 package has a therma resistance, or θ JA, of C/W. A curve that iustrates aowed power dissipation vs temperature for this package is shown in Figure 4. The power dissipation of the LTC665-.5V as a function of input votage is shown in Figure 5. The top curve shows power dissipation with a 5mA oad and the bottom curve shows power dissipation with no oad. When operated within its specified imits of = 3.V and sourcing 5mA, the LTC consumes just under 6mW at room temperature. At 5 C the quiescent current wi be sighty higher and the power consumption increases to just over 6mW. The power-derating curve in Figure 4 shows the LTC can safey dissipate 5mW at 5 C about haf the maximum power consumption of the package. 9

10 APPLICATIONS INFORMATION T A = 5 C DISSIPATION (W) POWER (W) mA LOAD.. NO LOAD TEMPERATURE ( C) 665 F (V) 665 F5 Figure 4. Maximum Recommended Dissipation for LTC665 Figure 5. Typica Power Dissipation of the LTC665 TYPICAL APPLICATIONS Extended Suppy Range Reference Extended Suppy Range Reference 4V TO 3V R LTC R 33k R 4.7k ON SEMI MMBT555 6V TO 6V BZX84C8 C.μF 665 TA C OPTIONAL BZX84C8 LTC C.μF 665 TA3 C OPTIONAL Boosted Output Current V + ( +.8V) C F R N95 LTC C F 665 TA4

11 PACKAGE DESCRIPTION MS8 Package 8-Lead Pastic MSOP (Reference LTC DWG # Rev F).889 ±.7 (.35 ±.5) LTC (.6) MIN (.6.36).4 ±.38 (.65 ±.5) TYP.65 (.56) BSC 3. ±. (.8 ±.4) (NOTE 3) (.5) REF RECOMMENDED SOLDER PAD LAYOUT GAUGE PLANE.8 (.7).54 (.) DETAIL A DETAIL A NOTE:. DIMENSIONS IN MILLIMETER/(INCH). DRAWING NOT TO SCALE 6 TYP.53 ±.5 (. ±.6) SEATING PLANE 4.9 ±.5 (.93 ±.6). (.43) MAX..38 (.9.5) TYP.65 (.56) BSC DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED.5mm (.6") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED.5mm (.6") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE.mm (.4") MAX 3. ±. (.8 ±.4) (NOTE 4).86 (.34) REF.6 ±.58 (.4 ±.) MSOP (MS8) 37 REV F Information furnished by Linear Technoogy Corporation is beieved to be accurate and reiabe. However, no responsibiity is assumed for its use. Linear Technoogy Corporation makes no representation that the interconnection of its circuits as described herein wi not infringe on existing patent rights.

12 TYPICAL APPLICATION Improved Reference Suppy Rejection in a Data Converter Appication LTC657 V CC DATA 6 D/A VDAC GND REF R 5k C. F C F SHDN GND LTC665 C OUT F V V V3 V4 REF LTC65 A/D GND 6 D OUT 665 TA5 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT46 Micropower Series References.75% Max, ppm/ C Max, ma Output Current LT46 Micropower Series Low Dropout.4% Max, 3ppm/ C Max, 5mA Output Current LT79 Micropower Precision Series References.5% Max, ppm/ C Max, 6μA Suppy, SOT3 Package LT665 Micropower Reference with Buffer Ampifi er.5% Max, 5.6μA Suppy, SOT3 Package LT666 Tiny Micropower Series Reference.% Max, ppm/ C Max, ma Output Current, mm mm DFN LT 7 PRINTED IN USA Linear Technoogy Corporation 63 McCarthy Bvd., Mipitas, CA (48) 43-9 FAX: (48) LINEAR TECHNOLOGY CORPORATION 7

FEATURES APPLICATIONS TYPICAL APPLICATION

FEATURES APPLICATIONS TYPICAL APPLICATION FEATURES n Reguates Whie Sourcing or Sinking Current n Provides Termination for up to 27 SCSI Lines n μa Quiescent Current n Utraow Power Shutdown Mode n Current Limit and Therma Shutdown Protection n