MP2002 Low Input Voltage 500mA Linear Regulator

Transcription

1 The Future of Analog IC Technology DESCRIPTION The MP2002 is a low-current, low-dropout linear regulator operating over a single input supply between.v to.v. The output voltage of the MP2002 is adjustable via an external resistor divider. The MP2002 can supply up to 00mA of load current. The enable pin () allows the part to be put into a low current shutdown mode (=0). The MP2002 features thermal overload and current limit protection. It is available in an -pin QFN (2 x mm) package MP2002 Low Input Voltage 00mA Linear Regulator FEATURES Power Good Open Collector Output Operates from.v.v Input Low 00mV Dropout at 00mA Output Stable with Very Small Ceramic Capacitors 2% Feedback Reference Adjustable Output Voltage Option from 0.V to V using an External Resistor Divider Better Than 0.00%/mA Load Regulation Low 00μA Ground Current Internal Thermal Protection Current Limit Protection µa Typical Quiescent Current at Shutdown Available in a Tiny 2 x mm -pin QFN Package APPLICATIONS Low Current Regulators Battery Powered Systems Cellular Phones All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. MPS and The Future of Analog IC Technology are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION MP2002 R UT V Power Good R2 MP2002 Rev..2

2 ORDERG FORMATION Part Number* Package Top Marking MP2002DD QFN (2 x mm) L7 * For Tape & Reel, add suffix Z (eg. MP2002DD Z) For RoHS Compliant Packaging, add suffix LF (eg. MP2002DD LF Z) PACKAGE REFERCE TOP VIEW NC 2 7 NC EXPOSED PAD ON BACKSIDE Connect to ABSOLUTE MAXIMUM RATGS (),, to...-0.v to +7V to...-0.v to +0.V...-0.V to + 0.V Continuous Power Dissipation (T A = +2 C) (2).2.27W Junction Temperature...0 C Lead Temperature...20 C Storage Temperature... - C to +0 C Recommended Operating Conditions () Input Voltage...V to.v Output Voltage...0.V to V Load Current...00mA Maximum Operating Junction Temp. (T J ). -0 C to +2 C Thermal Resistance () θ JA θ JC QFN (2 x mm) C/W Notes: ) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature T J (MAX), the junction-toambient thermal resistance θ JA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by P D (MAX)=(T J (MAX)- T A )/ θ JA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. ) The device is not guaranteed to function outside of its operating conditions. ) Measured on JESD-7 -layer board. MP2002 Rev

3 ELECTRICAL CHARACTERISTICS =.V, UT =.2V, C =.7µF, C = 2.2µF, T A = +2 C, unless otherwise noted. Parameter Symbol Condition Min Typ () Max Units Operating Voltage I = ma.. V Ground Pin Current I = ma (7) 00 µa I = 00mA ma Shutdown Current V = 0V, = V 7 µa Regulation Voltage C T A + C V Dropout Voltage () I = 00mA 290 mv Line Regulation I = ma, () = (UT + 0.V) to.v 0.00 %/V Load Regulation I = ma to 00mA, = UT + 0.V 0.00 %/ma Power Good Output Voltage Low (9) L I sink = 0.mA 0. V Input High Voltage.2 V Input Low Voltage 0. V Input Bias Current V =.V, V 0.0 μa Thermal Protection C Current Limit 0 70 ma Notes: ) Parameter is guaranteed by design, not production tested. ) Resistors for UT measurement are 0k, k, % 7) The ground current does not include current through feedback current ) Dropout Voltage is defined as the input to output differential when the output voltage drops % below its nominal value 9) VFEEDBACK is 90% of the regulated value with 0k pull-up to V MP2002 Rev..2

4 TYPICAL PERFORMANCE CHARACTERISTICS C=2.2μF, C2 =.7μF, C=nF, T A = +2 C, unless otherwise noted. (Reference Figure 2) Voltage Dropout vs Current Line Regulation Load Regulation VDROP (V) =.V-.V VO (V) VO (V) =.V CURRT(mA) 0. 2 PUT VOLTAGE (V) CURRT (ma).0 C Load Regulation.2 Line Regulation. Load Regulation.0..2 (V) =2.V (V).0.79 (V)..0 =2.V.792 =V =.V CURRT (ma) PUT VOLTAGE (V) CURRT (ma) -0 C Load Regulation Line Regulation Load Regulation (V) =V =2.V =.V (V) (V) =.V CURRT (ma) PUT VOLTAGE (V) CURRT (ma) MP2002 Rev..2

5 TYPICAL PERFORMANCE CHARACTERISTICS C=2.2μF, C2 =.7μF, C=nF, T A = +2 C, unless otherwise noted. (Reference Figure 2) Supply Current Shut Down Current Line Transient 70 0 = 2V to V, =.V, V =, = 0mA, with Resisitor Load V/div mV/div ms/div. PUT VOLTAGE (V) PUT VOLTAGE (V) PSRR vs Frequency V vs Temperature Load Transient PSRR (db) V (mv) FREQUCY (Hz) =.V, V =, =ma TEMPERATURE (C) 00mV/div. 0.2A/div. = 2.V, =.V, V =, = 0 to 00mA, with Resistor Load Power Good OFF Enable Turn On Enable Turn Off =.V, =.V, V =, = 0.7A, with Resisitor Load =.V, = 0.V, V = 0V to.v, = 200mA, with Resistor Load =.V, = 0.V, V =.V to 0V, = 200mA, with Resistor Load V/div. 0.A/div. 0.V/div. 0.2A/div. 0.V/div. 0.2A/div. ms/div. MP2002 Rev..2

6 TYPICAL PERFORMANCE CHARACTERISTICS C=2.2μF, C2 =.7μF, C=nF, T A = +2 C, unless otherwise noted. (Reference Figure 2) Power Good ON = 2.V, =.V, V =, = 0.A, with Resistor Load Thermal Protection = V = V, =.V, = 0.A Short Circuit Protection = V, =.V, V = V/div. V/div. V/div. 0.2A/div. /div. 0./div. A/div. ms/div. Short Circuit Recovery = V, =.V, = V V/div. A/div. MP2002 Rev..2

7 P FUNCTIONS Pin # Name Description Regulator Output. is the output of the linear regulator. Bypass to with a.7μf or greater capacitor. 2 NC No connect. Power Good Open Collector Output Feedback Input. Connect a resistive voltage divider from to to set the output voltage. feedback threshold is 0.V. Enable Input. Drive higher than.2v to turn on the MP2002, drive lower than 0.V to turn it off., Exposed Ground. Exposed pad must be connected to plane. pad 7 NC No connect. Power Source Input. supplies the internal power to the MP2002 and is the source of the pass transistor. Bypass to with a 2.2μF or greater capacitor. OPERATION The MP2002 is a low-current, low-voltage, high- PSRR, low-dropout, linear regulator. It is intended for use in devices that require very low voltage, low quiescent current power and high PSRR such as wireless modems, pagers, and cellular phones. The MP2002 uses a PNP pass element and features internal thermal shutdown and an internal current limit circuit. C THERMAL PROTECT R UT -- C V REF R2 V R Figure Block Diagram of Ultra Low Noise Adjustable Output Regulator MP2002 Rev

8 APPLICATION FORMATION Setting the Output Voltage The MP2002 has an adjustable output voltage, set via an external resistor divider (R and R2 in Figure 2). V R = R2 V V where V = 0.V (The feedback threshold voltage.) Example: For 2.utput and R2=0kΩ R= 0k = 0kΩ 0. A standard 0kΩ (±%) resistor can be selected for R. Table lists the selected R values for some typical output voltages (assuming R2 = 0kΩ). Power Good The power good pin is an open collector output completed with a pull up resistor (0kΩ recommended). The pull up resistor can be tied to a supply within the voltage range of the pin (0V to.v). For example, the pull up resistor can be tied to the input voltage when it is being monitored by an IC powered from this input voltage. It monitors the output voltage, and if the output voltage is 0% below its regulation point, the pin becomes low. Table Adjustable Output Voltage R Values (R2=0kΩ) UT (V) R (Ω).2 k. 20k. 2k 2 0k 2. 0k 2. k 0k. k 70k 90k Bypass Capacitors For lower noise, the reference voltage can be bypassed by an external capacitor. A low ESR capacitor, such as the ceramic type, will provide the best performance. MP2002 Rev..2

9 PCB Layout Guide PCB layout is very important to achieve good regulation, ripple rejection, transient response and thermal performance. It is highly recommended to duplicate EVB layout for optimum performance. If change is necessary, please follow these guidelines and take Figure 2 for reference. ) Input and output bypass ceramic capacitors are suggested to be put close to the Pin and Pin respectively. 2) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the chip as possible. ) Connect, and especially respectively to a large copper area to cool the chip to improve thermal performance and long-term reliability. C R MP2002 R R2 C C2.V C2 R C NC 2 7 NC R R2 C Top Layer Figure 2 PCB Layout Bottom Layer MP2002 Rev

10 TYPICAL APPLICATION CIRCUIT MP2002 C nf.v Figure Typical Application Circuit with Fix Pinout MP2002 Rev

11 PACKAGE FORMATION QFN (2mm x mm) P ID MARKG P ID SEE DETAIL A P ID DEX AREA BSC.0.70 TOP VIEW BOTTOM VIEW 0.20 REF P ID OPTION A 0.0x TYP. P ID OPTION B R0.20 TYP SIDE VIEW DETAIL A 2.90 NOTE: ) ALL DIMSIONS ARE MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT CLUDE MOLD FLASH. ) LEAD COPLANARITY SHALL BE 0.0 MILLIMETER MAX. ) DRAWG CONFORMS TO JEDEC MO-229, VARIATION VCED-2. ) DRAWG IS NOT TO SCALE RECOMMDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP2002 Rev..2