4/15, IMP mA/160mA Super Low w Dropout opout CMOS ery y Life Extending Shutdown Mode. 60mA/110mA/1 POWER MANAGEMENT. Key Features.
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1 POWER MANAGEMENT ma/110ma/1 0mA/1mA Super Low w Dropout opout CMOS Regulators s with h Batter ery y Life Extending Shutdown Mode The IMP2014, IMP2015 and high performance CMOS low dropout voltage regulators offer superior dropout voltage performance and load regulation characteristics as compared to the pin compatible TC1014/1015/1185 devices offered by TelCom Semiconductor. Dropout voltage performance has been improved by up to 40%. Load regulation and power supply PSRR have been optimized. Load regulation is typically 0.32% and PSRR is 53dB at 1kHz. A logic input controlled shutdown mode extends system battery life by reducing quiescent current to 0.2µA maximum. The shutdown mode can be initiated by a system microcontroller. The regulators were designed with ease of use and stability in mind. Stability is guaranteed for 0.47µF and greater load capacitors with an ESR up to 5Ω. Ceramic or tantalum capacitors can be used. Three devices with different guaranteed output current specifications are available: IMP2014 (ma), IMP2015 (110mA) and (1mA). Each device has output voltage options of 5V, 7V, 85V, 0V, 3V, 6V and 4.0V. Key Features Pin Compatible with TelCom TC1014/1015/1185 Lower Dropout Voltage for Long Battery Life IMP2014: 70mV vs. TelCom TC mV IMP2015: 1mV vs. TelCom TC mV : 250mV vs. TelCom TC mV Power Saving Shutdown Mode 0.2µA shutdown current Superior Load Regulation 0.32% Long Battery Life 33µA no load ground current Accurate Voltage ± 5% over temperature Low Drift : 40ppm/ C Guaranteed imum Current IMP2014: ma IMP2015: 110mA : 1mA Over-Current and Over-Temperature Protection Reference Bypass Input for Low-noise and Improved PSRR Compact SOT-23A-5 Package Applications Typical Application + Shutdown* Control 1 V IN 5 1µF IMP2014 1µF IMP2015 BYPASS 4 3 SHDN GND µF/3µF (optional) Pagers Cellular/GSM/PHS Phones Instrumentation Wireless Terminals Battery Powered Systems Medical Instruments Linear Post-Regulators * Tie to V IN if not used. 2014/15_0eps 1
2 Pin Configuration SOT-23A V IN 1 5 GND 2 IMP2014/15 SHDN 3 4 BYPASS 2014/15_01.eps Pin Descriptions Pin Part Number Number* Name Package Function 1 V I N Unregulated supply input. 2 G ND Ground terminal. 3 SHDN Shutdown control input. A shutdown mode is entered when SHDN is a logic LOW. s hutdown the output voltage falls to 0V and quiescent current drops to 0µ A. 4 BYPASS Reference bypass input. A capacitor connected from the BYPASS pin the noise present on the internal reference and enhances PSRR 5 Ordering Information voltage Voltage (V) Current (ma) Shutdown Pin Adjust Pin OKAY Flag Reference Bypass Pin During to ground reduces 2014/15_t01.eps Package Marking A B C D IMP2014-5JUK/T 5 M A x x IMP2014-7JUK/T 7 M B x x IMP JUK/T 85 M C x x IMP2014-0JUK/T 0 M D x x IMP2014-3JUK/T 3 M E x x IMP2014-6JUK/T 6 M F x x IMP JUK/T 4. 0 M G x x IMP2015-5JUK/T O A x x IMP2015-7JUK/T O B x x IMP JUK/T O C x x IMP2015-0JUK/T O D x x IMP2015-3JUK/T O E x x IMP2015-6JUK/T O F x x IMP JUK/T O G x x -5JUK/T 5 1 X A x x -7JUK/T 7 1 X B x x -85JUK/T 85 1 X C x x -0JUK/T 0 1 X D x x -3JUK/T 3 1 X E x x -6JUK/T 6 1 X F x x -4.0JUK/T X G x x xx = Date Code * /T indicates Tape and Reel 2014/15_t0eps 2
3 Absolute imum Ratings Input Voltage V Voltage V to V IN + 0.3V imum Voltage on Any Pin V to (V IN + 0.3V) Shutdown Voltage (SHDN) SHDN V IN + 0.3V These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability. All voltages are with respect to ground. Operating Junction Temperature Range C < T J < 125 C Storage Temperature C to 150 C Power Dissipation Internally limited Note: T J = Junction Temperature, T A = Ambient Temperature V IN = +1V, I L = 100µA, C L = 1µF, SHDN > V IH, T A = 25 C, unless otherwise noted. Bold/blue specifications apply for junction temperature range 40 C < T J < 125 C. Parameter Input Voltage Range Symbol V IN Conditions Notes: 1. V R is the regulated output voltage: 5V, 7V, 85V, 0V, 3V, 6V or 4.0V. Dropout Voltage is defined as the difference between IN and OUT when V R drops 2% below its nominal value. Specifications which would otherwise be affected by self-heating of the die are tested at a constant die temperature by using low duty cycle pulse testing. PSRR guaranteed by design. Typ Units 0C < T J < 125 C 6.50 V 40 C < T J < 125 C 6.50 imum Current IOMAX IMP2014 ma IMP Fixed Voltage Note 1 V R 5% V R ± 0.5% V R + 5% V Dropout Voltage (Note 2) V IN - VO I L = 100µA 1 mv I L = 20mA I L = 50mA 70 I L = 100mA (IMP2015, ) 90 1 Quiescent Current (Ground Current) S hutdown Supply Current I INS D I L = 150mA () No load µa SHDN = 0V T J 25 C Electrical Characteristics µa Temperature Coefficient 40 p pm/ C Thermal Regulation 0.04 %/ W Line Regulation V R + 1V V IN 6V % 2014/15_t02a.eps 3
4 Electrical Characteristics V IN = +1V, I L = 100µA, C L = 1µF, SHDN > V IH, T A = 25 C, unless otherwise noted. Bold/blue specifications apply for junction temperature range of 40 C < T J < 125 C. Parameter Symbol Conditions Notes: 1. V R is the regulated output voltage: 5V, 7V, 85V, 0V, 3V, 6V or 4.0V. Dropout Voltage is defined as the difference between IN and OUT when V R drops 2% below its nominal value. Specifications which would otherwise be affected by self-heating of the die are tested at a constant die temperature by using low duty cycle pulse testing. 4. PSRR guaranteed by design. Typ Units Load Regulation: IMP2014 I L = 100µ A to 50mA % IMP2015 I L = 100µ A to 100mA I L = 100µ A to 150mA Thermal Shutdown Die 150 C Temperature Thermal Shutdown Hysteresis 12 C Ripple Rejection PSRR V IN ( VO + 1V) ± 0.25V Freq. = 1kHz db C O = 3µ F ceramic Freq. = 10kHz 47 CBYPASS = 0.01µF Freq. = 1MHz 34 Noise 300Hz to 50kHz No bypass capacitor I L = 50mA (IMP2014) 280 µv RMS = 100mA SHDN Input SHDN Input Reverse HIGH Threshold LOW Threshold Current into V I L 300Hz to 50kHz CBYPASS = 0.01µF I L = 50mA (IMP2014) = 100mA I L OUT V ) µv RMS 5V V IN 6.5V 45 of VI % N 5V V IN 6.5V 15 of VI ( IN < V(OUT) 0 ma SHDN = HIGH = V V ( IN) < V(OUT) SHDN = LOW IN % N 2.7 µa Current Limit ma 2014/15_t02b.eps 4
5 Typical Characteristics Enable V IN = 1V 0V 5V/DIV 50mV/DIV 0V 1V/DIV 20µs/DIV 100µs/DIV Figure 1. Line Transient Response 2014/15_1eps 2014/15_1eps Figure Enable Input Response Load Pulse Load Pulse 20mA/DIV 50mA/DIV 25mV/DIV 25mV/DIV 50µs/DIV 50µs/DIV 2014/15_09.eps Figure Load Transient Response (50mA Step) 2014/15_10.eps Figure 4. Load Transient Response (100mA Step) 100mA/DIV 100ms/DIV 2014/15_11.eps Figure 5. Short Circuit Response 5
6 Application Information The IMP2014, IMP2015 and have been designed to offer exceptionally low dropout voltage, superior load regulation and minimum quiescent power. Shutdown Mode A battery-life-extending mode is available. Through the active LOW shutdown pin, SHDN, the regulator can be enabled or turned off. The regulator is shutdown (turned off) when SHDN is LOW and enabled (turned on) when SHDN is HIGH. The shutdown signal can be supplied from a CMOS gate or from an I/O port of a microcontroller. During shutdown, the output voltage falls to 0V and the supply current is typically only 200nA. If the shutdown mode is not needed, SHDN should be connected directly to the regulator input voltage pin. Capacitor The IMP2014, IMP2015 and were designed for stable operation with a wide range of capacitor values and type. The output capacitor should be above 0.47µF. A 1µF value is recommended. Ceramic or tantalum capacitors are suitable with an ESR of up to 5Ω. Reference Voltage Bypass Capacitor For low noise operation a 0.01µF or larger capacitor can be connected from the BYPASS pin to ground. For maximum power supply rejection/line rejection, a 3µF value is suggested. The IMP2014/2015/2185 were designed so that line regulation and ripple rejection would be maximized. This was accomplished by powering the internal bandgap reference from an internal regulated source. This "pre-regulation" greatly improves power supply regulation for input voltages greater than that of the internal voltage regulator, 5V. Thermal Shutdown An on-chip thermal protection circuit shuts the LDO regulator off when the die temperature exceeds 150 C. There is a built in 12 C hysteresis. The regulator will remain off until the die temperature drops to approximately to 138 C. 6
7 Package Dimensions A A2 A1 e Plastic SOT-23A (5-Pin) D e1 E1 E b L L1 C SOT-23 (5-Pin).eps Inches Nominal Plastic SOT-23 (5-Pin)* Millimeters Nominal A A A b b c c D E E e BSC 0.95 BSC e BSC 1.90 BSC L L REF 0. REF * JEDEC Drawing MO-178 Add /T to Part Number for Tape and Reel. 2014/15_t04.eps Daily Silver IMP Microelectronics Co.,Ltd 7 keda Road, Hi-Tech Park, NingBo,Zhejiang, P.R.C. Post Code : Tel:(086) Fax:(086) sales@ds-imp.com.cn Website: The IMP logo is a registered trademark of Daily Silver IMP. All other company and product names are trademarks of their respective owners Daily Silver IMP Revision : A Issue Date: 08/08/05 Type: Product
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