Linear LT3086 Cable Drop Compensation Datasheet

Transcription

1 Linear LT386 Cabe Drop Compensation Datasheet The LT 386 is a muti-feature, ow dropout, ow noise.a inear reguator that operates over a.4v to 4V input suppy range. Dropout votage at.a is typicay 33mV. One resistor sets output votage from.4v to 3V. Output votage toerance is guaranteed to ±% over ine, oad and temperature. The LT386 is stabe with ceramic output capacitors, requiring a minimum of μf. ManuaLib.com coects and cassifies the goba product instrunction manuas to hep users access anytime and anywhere, heping users make better use of products.

2 Features Appications LT386 4V,.A Low Dropout Adjustabe Linear Reguator with Monitoring and Cabe Drop Compensation Description n Wide Input Votage Range:.4V to 4V n Resistor Sets Output Votage:.4V to 3V n Output Current:.A n ±% Toerance Over Line, Load and Temperature n Output Current Monitor: = I OUT / n Temperature Monitor with Programmabe Therma Limit n Programmabe Cabe Drop Compensation n Parae Mutipe Devices for Higher Current n Dropout Votage: 33mV n Capacitor Soft-Starts Output and Decreases Noise n Low Output Noise: 4µV RMS (Hz to khz) n Precision, Programmabe Externa Current Limit n Power Good Fag with Programmabe Threshod n Ceramic Output Capacitors: µf Minimum n Quiescent Current in Shutdown: <µa n Reverse-Battery, -Current and -Output Protection n Avaiabe in 5mm 4mm 6-Lead DFN, 6-Lead TSSOP, 7-Lead DD-PAK and 7-Lead TO-. n Programmabe Linear Reguator n Post Reguator for Switching Suppies n USB Power Suppies n High Reiabiity Power Suppies The LT 386 is a muti-feature, ow dropout, ow noise.a inear reguator that operates over a.4v to 4V input suppy range. Dropout votage at.a is typicay 33mV. One resistor sets output votage from.4v to 3V. Output votage toerance is guaranteed to ±% over ine, oad and temperature. The LT386 is stabe with ceramic output capacitors, requiring a minimum of µf. The LT386 s programmabe cabe drop compensation cances output votage errors caused by resistive connections to the oad. A master/save configuration aows paraeing of mutipe devices for higher oad current and heat spreading without externa baast resistor requirements. Output current and temperature monitoring aong with a power good fag provide system diagnostic and debug capabiity. Interna faut circuitry incudes therma shutdown and current imit with fodback. Therma imit and current imit are aso externay programmabe. Packages incude the thermay enhanced 6-ead (5mm 4mm) DFN, 6-ead TSSOP, 7-ead DD-PAK and 7-ead TO-. L, LT, LTC, LTM, Linear Technoogy and the Linear ogo are registered trademarks of Linear Technoogy Corporation. A other trademarks are the property of their respective owners. Typica Appication 6V TO 5V TO ADC.8V AT.4A FULL-SCALE V TEMP mv/ C 5 C = 5mV 5V,.A USB Suppy with Cabe Drop Compensation IN OUT LT386 R µf 8.5k µf 9.9k +.k SHDN TEMP R CDC k TRACK CDC R CDC R PWRGD PWRGD V PWRGD 357Ω R CDC = R 3 R WIRE R WIRE =R LINE +R LINE * *SEE APPLICATIONS INFORMATION FOR INDUCTANCE EFFECTS ASSOCIATED WITH R WIRE CABLE R LINE R LINE LOAD V LOAD 5V AT.A 386 TA For more information OUTPUT VOLTAGE (V) LOAD CURRENT (A) Transient Response with Cabe Drop Compensation (CDC) WITH CDC V LOAD WITH CDC V LOAD WITHOUT CDC I LOAD =.5A TO.5A = 6V = 357Ω R WIRE =.4Ω R CDC = 46.4k TIME (µs) 36 TA4b 386f This Manua:

3 LT386 Absoute Maximum Ratings IN Pin Votage...±45V OUT Pin Votage...±36V Input-to-Output Differentia Votage (Note )...±45V Pin Votage....3, 36V SHDN Pin Votage...±45V CDC Pin (Internay Camped, Current into Pin)...<8mA Pin Votage....3, 7V Pin Votage....3, V TRACK Pin Votage....3, Internay Camped at.5v Pin Configuration (Note ) TEMP Pin Votage...V, 5V PWRGD Pin Votage....3, 36V R PWRGD Pin Votage....3, 36V Output Short-Circuit Duration... Indefinite Operating Junction Temperature (Notes 3, 5, ) E-Grade, I-Grade... 4 C to 5 C Storage Temperature Range to 5 C Lead Temperature (Sodering, sec) (TSSOP, DD-Pak, TO- Ony)...3 C TOP VIEW TOP VIEW PWRGD / 5 PWRGD 3 4 TRACK CDC 3 4 TRACK CDC R PWRGD TEMP SHDN R PWRGD TEMP SHDN 6 IN OUT 6 IN OUT 7 IN OUT 7 IN OUT 8 9 NC 8 9 DHD PACKAGE 6-LEAD (5mm 4mm) PLASTIC DFN T JMAX = 5 C, θ JA = 38 C/W TO 43 C/W*, θ JC = 4.3 C/W EXPOSED PAD (PIN 7) IS, MUST BE SOLDERED TO PCB FE PACKAGE 6-LEAD PLASTIC TSSOP T JMAX = 5 C, θ JA = 38 C/W TO 43 C/W*, θ JC = C/W EXPOSED PAD (PIN 7) IS, MUST BE SOLDERED TO PCB FRONT VIEW FRONT VIEW TAB IS TEMP SHDN IN OUT / TAB IS TEMP SHDN IN OUT / R PACKAGE 7-LEAD PLASTIC DD T JMAX = 5 C, θ JA = 7 C/W TO 9 C/W*, θ JC = 3 C/W *See Appications Information section. T7 PACKAGE 7-LEAD PLASTIC TO- T JMAX = 5 C, θ JA = 34 C/W, θ JC = 3 C/W For more information 386f This Manua:

4 Order Information LT386 LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT386EDHD#PBF LT386EDHD#TRPBF Lead (5mm 4mm) Pastic DFN 4 C to 5 C LT386IDHD#PBF LT386IDHD#TRPBF Lead (5mm 4mm) Pastic DFN 4 C to 5 C LT386EFE#PBF LT386EFE#TRPBF 386FE 6-Lead Pastic TSSOP 4 C to 5 C LT386IFE#PBF LT386IFE#TRPBF 386FE 6-Lead Pastic TSSOP 4 C to 5 C LT386ER#PBF LT386ER#TRPBF LT386R 7-Lead Pastic DD-PAK 4 C to 5 C LT386IR#PBF LT386IR#TRPBF LT386R 7-Lead Pastic DD-PAK 4 C to 5 C LT386ET7#PBF N/A LT386T7 7-Lead Pastic TO- 4 C to 5 C LT386IT7#PBF N/A LT386T7 7-Lead Pastic TO- 4 C to 5 C Consut LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a abe on the shipping container. Consut LTC Marketing for information on non-standard ead based finish parts. For more information on ead free part marking, go to: For more information on tape and ree specifications, go to: Eectrica Characteristics The denotes the specifications which appy over the fu operating temperature range, otherwise specifications are at T A = 5 C. PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Input Votage (Note 4) I LOAD =.A, =.4.55 V Reference Votage (Notes 3, 5) V =.55V, I LOAD = ma.55v < < 4V, ma < I LOAD <.A Reference Current I =.55V, I LOAD = ma.55v < < 4V, ma < I LOAD <.A Line Reguation V I =.55V to 4V, I LOAD = ma. Load Reguation V I LOAD = ma to.a, = +.55V (Notes 6, 7) I Dropout Votage I LOAD = ma = (NOMINAL), (Notes 7, 8) I LOAD = ma I LOAD = 5mA I LOAD =.5A I LOAD =.A Pin Current = (NOMINAL) +.55V, (Notes 7, 9) I LOAD = µa I LOAD = ma I LOAD = ma I LOAD = 5mA I LOAD =.5A I LOAD =.A mv mv µa µa.8 mv µa mv µa mv mv mv mv mv mv mv mv mv mv ma ma ma ma ma ma For more information 386f 3 This Manua:

5 LT386 Eectrica Characteristics The denotes the specifications which appy over the fu operating temperature range, otherwise specifications are at T A = 5 C. PARAMETER CONDITIONS MIN TYP MAX UNITS Quiescent Current in Shutdown = 4V, V SHDN = V. µa Output Votage Noise C =.µf, C OUT = µf, I LOAD =.A = 5V, BW = Hz to khz Shutdown Threshod SHDN Pin Current (Note ).55V < < 4V = Off to On = On to Off V SHDN = V V SHDN = 4V TEMP Votage (Note 3) T J = 5 C T J = 5 C TEMP Error (Note 3) C < T J < 5 C, I TEMP = C < T J < 5 C, I TEMP = µa to 8µA µv RMS V V 35 µa µa V V.9 V V I TEMP Therma Limit Current Threshod 5 C < T J < 5 C 95 5 µa Output Current = (NOMINAL) +.55V (Note 5) I LOAD = ma, = kω I LOAD = 5mA, = 33Ω I LOAD = A, = 33Ω I LOAD =.5A, = 33Ω I LOAD =.A, = 33Ω Output Current Sharing Error (Note 4) = 33Ω, I OUT(MASTER) =.A % TRACK Pin Pu-Up Current V TRACK = 75mV µa R PWRGD Reference Votage.55V < < 4V mv R PWRGD Reference Current.55V < < 4V µa R PWRGD Reference Votage Hysteresis.55V < < 4V.4 mv R PWRGD Reference Current Hysteresis.55V < < 4V 3 na PWRGD V OL I PWRGD = µa (Faut Condition) 55 mv PWRGD Interna Time Deay V OL TO V OH (Rising Edge) µs PWRGD Pin Leakage Current V PWGRD = 3V, V RPWGRD = 5mV µa CDC Reference Votage.55V < < 4V, = V mv CDC/V IMON Votage Gain.55V < < 4V, < I CDC < µa, V IMON = 8mV to V/V Rippe Rejection =.9V (AVG), V RIPPLE =.5V P-P, = V f RIPPLE = Hz, I LOAD =.A 65 8 db Interna Current Limit =.55V = (NOMINAL) +.55V (Notes 7, ), = 5% µa µa ma ma ma.4.9 A A Threshod Votage.55V < < 4V mv Input Reverse Leakage Current = 4V, = ma Reverse Output Current (Note ) = 3V, =, V SHDN = µa Note : Stresses beyond those isted under Absoute Maximum Ratings may cause permanent damage to the device. Exposure to any Absoute Maximum Rating condition for extended periods may affect device reiabiity and ifetime. Note : Absoute maximum input-to-output differentia votage is not achievabe with a combinations of rated IN pin and OUT pin votages. With the IN pin at 45V, the OUT pin may not be pued beow V. The tota IN to OUT differentia votage must not exceed ±45V. Note 3: The LT386 is tested and specified under puse oad conditions such that T J T A. The LT386E is production tested at T A = 5 C and performance is guaranteed from C to 5 C. Performance at 4 C to 5 C is assured by design, characterization and correation with statistica process contros. The LT386I is guaranteed over the fu 4 C to 5 C operating junction temperature range. Note 4: The LT386 is tested and specified for these conditions with the pin connected to the OUT pin, =.4V. Note 5: Maximum junction temperature imits operating conditions. The reguated output votage specification does not appy for a possibe combinations of input votage and output current. Limit the output current range if operating at arge input-to-output votage differentias. Limit the input-to-output votage differentia if operating at maximum output current. Current imit fodback imits the maximum output current as a function of input-to-output votage. See Current Limit vs in the Typica Performance Characteristics section. Note 6: Load reguation is Kevin-sensed at the package. Note 7: To satisfy minimum input votage requirements, the LT386 is 4 For more information 386f This Manua:

6 Eectrica Characteristics tested and specified for these conditions with a 3k resistor between OUT and for a V output votage. Note 8: Dropout votage is the minimum input-to-output votage differentia needed to maintain reguation at a specified output current. In dropout, the output votage equas: ( V DROPOUT ). For ow output votages and certain oad conditions, minimum input votage requirements imit dropout votage. See the Minimum Input Votage curve in the Typica Performance Characteristics section. Note 9: pin current is tested with = (NOMINAL) +.55V and PWRGD pin foating. pin current increases in dropout. See pin current curves in the Typica Performance Characteristics section. Note : SHDN pin current fows into the SHDN pin. Note : Reverse output current is tested with the IN pin grounded and the OUT pin forced to a votage. The current fows into the OUT pin and out of the pin. Note : The IC incudes overtemperature protection circuitry that protects the device during momentary overoad conditions. Junction temperature exceeds 5 C when the overtemperature circuitry is active uness therma LT386 imit is externay set beow 5 C by oading the TEMP pin. Continuous operation above the specified maximum junction temperature may impair device reiabiity. Note 3: The TEMP output votage represents the average die temperature next to the power transistor whie the center of the transistor can be significanty hotter during high power conditions. Due to power dissipation and temperature gradients across the die, the TEMP output votage measurement does not guarantee that absoute maximum junction temperature is not exceeded. Note 4: Output current sharing error is the difference in output currents of a save reative to its master when two LT386 reguators are paraeed. The device is tested as a save with V TRACK =.693V, = 33Ω and V =.4V, conditions when an idea master is outputting.a. The specification imits account for the save output tracking error from.a and the worst-case error that can be contributed by a master: the maximum deviation of V from.4v and from.ma. Note 5: The LT386 is tested and specified for these conditions with the and pins tied together. Typica Performance Characteristics T A = 5 C, uness otherwise noted. DROPOUT VOLTAGE (mv) Typica Dropout Votage Guaranteed Dropout Votage Dropout Votage T J = 5 C 5 T J = 5 C OUTPUT CURRENT (A) DROPOUT VOLTAGE (mv) 55 = TEST POINTS T J 5 C T J 5 C OUTPUT CURRENT (A) 386 G 386 G 386 G3 DROPOUT VOLTAGE (mv) I L =.A 4 I L =.5A 35 3 I L = A 5 I L = 5mA 5 I L = ma 5 I L = ma PIN REFERENCE VOLTAGE (mv) Pin Reference Votage Pin Reference Current Quiescent Current I L = ma G4 PIN REFERENCE CURRENT (µa) I L = ma G5 For more information QUIESCENT CURRENT (ma) = 6V = 5V I L = V SHDN =. V SHDN = G6 386f 5 This Manua:

7 LT386 Typica Performance Characteristics T A = 5 C, uness otherwise noted. QUIESCENT CURRENT (ma) Quiescent Current, =.4V T J = 5 C R = I L = V SHDN = V SHDN = INPUT VOLTAGE (V) G7 QUIESCENT CURRENT (ma) Quiescent Current, = 5V. T J = 5 C.8 R = 9k I L =.6.4. V SHDN = V SHDN = INPUT VOLTAGE (V) 386 G8 PIN CURRENT (ma) Pin Current, =.4V (Light Load) T J = 5 C 9 V SHDN = 8 R = R L =.8Ω I L = 5mA 4 3 R L = 4Ω I L = ma R L = 4Ω, I L = ma INPUT VOLTAGE (V) 386 G9 PIN CURRENT (ma) Pin Current, =.4V (Heavy Load) T J = 5 C V SHDN = R = R L =.9Ω, I L =.A R L =.67Ω, I L =.5A R L =.4Ω, I L = A INPUT VOLTAGE (V) 386 G PIN CURRENT (ma) Pin Current, = 5V (Light Load) T J = 5 C V SHDN = R = 9k R L = Ω I L = 5mA R L = 5Ω I L = ma R L = 5k, I L = ma INPUT VOLTAGE (V) 386 G PIN CURRENT (ma) Pin Current, = 5V (Heavy Load) T J = 5 C V SHDN = R = 9k R L =.38Ω I L =.A R L = 3.333Ω I L =.5A R L = 5Ω, I L = A INPUT VOLTAGE (V) 386 G PIN CURRENT (ma) Pin Current vs I LOAD SHDN Pin Threshod SHDN Pin Input Current = (NOMINAL) +.55V OUTPUT CURRENT (A). 386 G3 SHDN PIN THRESHOLD (V) OFF TO ON ON TO OFF.95 SHDN TIED TO V SHDN.3V, > (MIN) G4 SHDN PIN INPUT CURRENT (µa) = V SHDN SHDN PIN VOLTAGE (V) 386 G5 6 For more information 386f This Manua:

8 Typica Performance Characteristics T A = 5 C, uness otherwise noted. LT386 SHDN PIN INPUT CURRENT (µa) SHDN Pin Input Current OUT Over IN Shutdown Threshod R PWRGD Pin Threshod 8 6 V SHDN = 4V 4 8 V SHDN = 6V OUT OVER IN SHUTDOWN THRESHOLD (mv) ON TO OFF 75 5 OFF TO ON G6 386 G7 386 G8 R PWRGD PIN THRESHOLD (mv) 48 I L = OUTPUT RISING OUTPUT FALLING R PWRGD PIN INPUT CURRENT (µa) R PWRGD Pin Input Current PWRGD Output Low Votage PWRGD Interna Time Deay 5. I L = 5.8 OUTPUT RISING OUTPUT FALLING G9 PWRGD OUTPUT LOW VOLTAGE (mv) I PWRGD = µa G PWRGD INTERNAL TIME DELAY (µs) I PWRGD = µa V OL TO V OH G I OUT / RATIO (A/A) I OUT / Ratio Current Monitor at Light Load Pin Threshod Votage T J = 5 C T J = 5 C T J = 4 C = V IMON / TIED TO = 33Ω = +.55V OUTPUT CURRENT (A). 386 G CURRENT MONITOR (V IMON / ) (µa) I L = I L = ma TIED TO = kω = +.55V G3 PIN THRESHOLD (mv) G4 For more information 386f 7 This Manua:

9 LT386 Typica Performance Characteristics T A = 5 C, uness otherwise noted. PIN CURRENT (µa) Pin Input Current TRACK Ampifier Input Offset TRACK Ampifier Gain PIN VOLTAGE (mv) TRACK AMPLIFIER INPUT OFF (mv) TRACK = 75mV 4 TRACK = mv 6 TRACK = 4mV G5 386 G6 386 G7 TRACK AMPLIFIER GAIN (V/V) TRACK = 75mV... TRACK = mv.9 TRACK = 4mV TRACK PIN PULL-UP CURRENT (µa) TRACK Pin Pu-Up Current TRACK Pin Pu-Up Current CDC Pin Reference Votage TRACK PIN PULL-UP CURRENT (µa) TRACK = TRACK = 75mV CDC PIN REFERENCE VOLTAGE (mv) R CDC = = I L = TRACK PIN VOLTAGE (V) 386 G G G3 CDC/V IMON VOLTAGE GAIN (V/V) CDC Ampifier Gain V IMON = 8mV TO mv R CDC = G3 CDC/V IMON VOLTAGE GAIN (V/V) CDC Ampifier Gain V IMON = 8mV TO mv T J = 5 C T J = 5 C T J = 4 C R CDC (kω) 386 G3 CDC PIN CURRENT (ma) CDC Pin Interna Camp Faut Current > (NOMINAL) T J = 4 C T J = 5 C T J = 5 C CDC PIN VOLTAGE (V) 386 G33 8 For more information 386f This Manua:

10 Typica Performance Characteristics T A = 5 C, uness otherwise noted. LT386 TEMP PIN ERROR ( C) TEMP Pin Error.5 TEMP = V TEMP /(mv/ C) I TEMP =.5 I TEMP = 8µA G34 THERMAL LIMIT THRESHOLD (µa) I TEMP Therma Limit Threshod 5 TEMP = V TEMP /(mv/ C) 4 3 RISING FALLING G35 CURRENT LIMIT (A) Interna Current Limit vs = 5%.6 T J = 4 C.3 T J = 5 C T J = 5 C INPUT/OUTPUT DIFFERENTIAL (V) 386 G36 CURRENT LIMIT (A) Interna Current Limit vs Temperature Reverse Output Current Reverse Output Current =.55V = V G37 REVERSE OUTPUT CURRENT (ma) T J = 5 C = V = V = V RPWRGD CURRENT FLOWS THROUGH PINS TO GROUND. OUT, R PWRGD OUTPUT VOLTAGE (V) 386 G38 REVERSE OUTPUT CURRENT (µa) = V V SHDN = V = 5V R = 9k R PWRGD = 8k OUT R PWRGD G39 OUTPUT OVERSHOOT PULL-DOWN (ma) Overshoot Pu-Down Current Input Rippe Rejection 5V Input Rippe Rejection > V = 5mV CURRENT FLOWS THROUGH OUT PIN TO OUTPUT VOLTAGE (V) 386 G4 RIPPLE REJECTION (db) 9 =.4V 8 7 C OUT = µf 6 5 = 5V 4 3 C OUT = µf k k k M M FREQUENCY (Hz) 386 G4 I L =.A, C = V TEMP =.5V =.6V + 5mV RMS RIPPLE (FOR =.4V) = 5.7V + 5mV RMS RIPPLE (FOR = 5V) For more information RIPPLE REJECTION (db) 9 C = nf 8 7 C OUT = µf 6 C = C OUT = µf k k k M M FREQUENCY (Hz) 386 G4 I L =.A = 5V V TEMP =.5V = 5.7V + 5mV RMS RIPPLE 386f 9 This Manua:

11 LT386 Typica Performance Characteristics RIPPLE REJECTION (db) CHANGE IN PIN REFERENCE CURRENT (na) Rippe Rejection vs Temperature 5V Rippe Rejection vs Reguation Reference Votage Load 9 =.4V 8 7 = V 6 = 5V G43 I L =.A, C = V TEMP =.5V =.9V +.5V P-P RIPPLE (FOR =.4V, V) = 5.9V +.5V P-P RIPPLE (FOR = 5V) RIPPLE AT f = Hz Reference Current Load Reguation = (NOMINAL) +.55V I L = ma TO.A I L = ma TO.5A G46 RIPPLE REJECTION (db) MINIMUM INPUT VOLTAGE (V) 5mV RIPPLE ON RMS 9 I L =.A 8 C OUT = µf C = nf 7 V TEMP =.5V RIPPLE AT f = khz 6 5 RIPPLE AT f = khz 4 3 RIPPLE AT f = MHz AVERAGE INPUT-TO-OUTPUT DIFFERENTIAL (V) Minimum Input Votage I L =.A I L = ma T A = 5 C, uness otherwise noted. 386 G G47 CHANGE IN PIN REFERENCE VOLTAGE (mv) OUTPUT NOISE SPECTRAL DENSITY (µv/ Hz). = (NOMINAL) +.55V I L = ma TO.A I L = ma TO.5A Output Noise Spectra Density, C = I L =.A C OUT = µf V TEMP =.5V = 3.3V =.5V =.V =.4V = 5V 386 G45. k k k FREQUENCY (Hz) 386 G48 OUTPUT NOISE SPECTRAL DENSITY (µv/ Hz) Output Noise Spectra Density vs C = 5V I L =.A C OUT = µf V TEMP =.5V. C = nf C = nf C = pf C = nf. k k k FREQUENCY (Hz) 386 G49 OUTPUT NOISE VOLTAGE (µv RMS ) RMS Output Noise vs Load Current, C = C OUT = µf C OUT = µf f = Hz TO khz V TEMP =.5V = 5V = 3.3V =.5V =.V 5 =.4V µ m m m LOAD CURRENT (A) 386 G5 OUTPUT NOISE VOLTAGE (µv RMS ) RMS Output Noise vs Load Current, C = nf C OUT = µf C OUT = µf f = Hz TO khz V TEMP =.5V = 5V =.4V µ m m m LOAD CURRENT (A) 386 G5 For more information 386f This Manua:

12 Typica Performance Characteristics T A = 5 C, uness otherwise noted. LT386 OUTPUT NOISE VOLTAGE (µv RMS ) RMS Output Noise vs Load Current f = Hz TO khz =.4V V TEMP =.5V C OUT = 47µF C OUT = µf C OUT = µf C OUT = µf µ m m m LOAD CURRENT (A) 386 G5 OUTPUT NOISE VOLTAGE (µv RMS ) RMS Output Noise vs Feedforward Capacitor (C ) =.5V = 5V f = Hz TO khz I L =.A C OUT = µf V TEMP =.5V = 3.3V 5 =.V 5 =.4V p p n n n FEEDFORWARD CAPACITOR C (F) 386 G53 µv/div Output Votage Noise Load Transient Response Load Transient Response = 5V R = 9k C = nf C OUT = µf I L =.A TIME ms/div 386 G54 OUTPUT VOLTAGE DEVIATION (mv) LOAD CURRENT (A) = 5.5V 5 = 5V C OUT = µf 5 C = 5 C = nf 5 3 I L = 5mA TO.5A TIME (µs) 386 G55 OUTPUT VOLTAGE DEVIATION (mv) LOAD CURRENT (A) 3 3 = 5.5V = 5V C = nf I L = ma TO.A C OUT = µf CERAMIC C OUT = µf CERAMIC + µf TANTALUM TIME (µs) 386 G56 OUTPUT VOLTAGE DEVIATION (mv) INPUT VOLTAGE (V) Line Transient Response I L =.A = 5V C OUT = µf = 5.55V TO V TIME (ms) 386 G57 OUTPUT VOLTAGE (V) SHDN PIN VOLTAGE (V) Start-Up Response 6 C OUT = µf 5 R = 9k 4 C = R L = 5kΩ (I L = ma) R L =.38Ω (I L =.A) TIME (µs) G58 START-UP TIME (ms). Start-Up Time vs C I L = ma TLING TO = 3.3V =.5V = 5V =.V. p p n n n FEEDFORWARD CAPACITOR, C (F) 386 G59 For more information 386f This Manua:

13 LT386 Pin Functions (DFN/TSSOP/DD-PAK/TO-) (Pins, 6, Exposed Pad Pin 7/Pins, 8, 9, 6, Exposed Pad Pin 7/Pin 4/Pin 4): Ground. The exposed pad of the DFN and TSSOP packages as we as the Tab of the DD-Pak and TO- packages is an eectrica connection to. To ensure proper eectrica and therma performance, tie the exposed pad or tab directy to the remaining pins of the reevant package and the PCB ground. pin current is typicay.ma at zero oad and increases to about 44mA at fu oad. (Pin /Pin /Pin /Pin ): Externa Current Limit Programming. This pin externay programs current imit if connected to and a resistor to. Current imit activates if the votage at equas.8v. Current imit equas: (.8V/ ). An interna camp typicay imits the votage to V. If externa current imit is set to ess than A, connect a series k-nf network in parae with the resistor for stabiity. Interna current imit fodback overrides externay programmed current imit if differentia votage is excessive. If externa current imit programming is not used, then ground this pin. (Pin 3/Pin /Pin /Pin ): Output Current Monitor. This pin sources a current equa to / of output oad current. Connecting a resistor from to programs a oad current dependent votage for monitoring by an ADC. If connects to, current imit is externay programmabe. CDC (Pin 4/Pin 3/NA/NA): Cabe Drop Compensation. Connecting a singe resistor (R CDC ) between the CDC and pins provides programmabe cabe drop compensation that cances output votage errors caused by resistive connections to the oad. A resistor ( ) from to is aso required to enabe Cabe Drop Compensation. Choose first based on required current imit. =.8V / Cacuate the vaue of R CDC with this formua: R CDC = ( R )/(3 R WIRE ) where R WIRE is the tota cabe or wire resistance to and from the oad. From a practica appication standpoint, LTC recommends imiting cabe drop compensation to % of for appications needing good reguation. The imiting factor is variations in wire temperature as copper wire resistance changes about 9% for a 5 C temperature change. If output reguation requirements are oose (e.g., when using a secondary reguator), cabe drop compensation of up to 5% may be used. R PWRGD (Pin 5/Pin 4/NA/NA): Power Good Threshod Votage Programming. This pin is the input to the power good comparator. Connecting a resistor between OUT and R PWRGD programs an adjustabe power good threshod votage. The threshod votage is.4v on the R PWRGD pin, and a 5µA current source is connected from R PWRGD to. If the votage at R PWRGD is ess than.4v, the PWRGD fag asserts and pus ow. If the votage at R PWRGD is greater than.4v, the PWRGD fag de-asserts and becomes high impedance. For most appications, PWRGD is pued high with a pu-up resistor. Cacuate the vaue of R PWRGD with this formua: R PWRGD = (X (NOMINAL).4V)/5µA where X is normay in the 85% to 95% range. A 7µs degitching fiter suppresses fase tripping of the PWRGD fag at the rising edge of PWRGD with instant reset. Hysteresis at the R PWRGD pin is typicay.6% on the.4v threshod and the 5µA current source. (Pin 6/Pin 5/Pin /Pin ): Output Votage Programming. This pin is the error ampifier s inverting termina. It reguates to.4v and a 5µA current source is connected from to. Connecting a singe resistor from OUT to programs output votage. Cacuate the vaue of the required resistor from the formua: R = (.4V)/5µA Connecting a capacitor in parae with R provides output votage soft-start capabiity, improves transient response and decreases output votage noise. The LT386 error ampifier design is configured so that the reguator aways operates in unity-gain. OUT (Pins 7, 8/Pins 6, 7/Pin 3/Pin 3): Output. These pin(s) suppy power to the oad. Connect a OUT pins together on the DHD and FE packages for proper operation. For more information 386f This Manua:

14 LT386 Pin Functions (DFN/TSSOP/DD-PAK/TO-) Stabiity requirements demand a minimum µf ceramic output capacitor with an ESR ess than mω to prevent osciations. Large oad transients require arger output capacitance to imit peak votage transients. Permissibe output votage range is.4v to 3V. The LT386 requires a ma minimum oad current to ensure proper reguation and stabiity. IN (Pins, /Pins, /Pin 5/Pin 5): Input. These pin(s) suppy power to the device. Connect a IN pins together on the DHD and FE packages for proper operation. The LT386 requires a oca IN bypass capacitor if it is ocated more than a few inches from the main input fiter capacitor. In genera, battery output impedance rises with frequency, so adding a bypass capacitor in battery powered circuits is advisabe. A µf minimum input capacitor generay suffices. The IN pin(s) withstand a reverse votage of 45V. The device imits current fow and no negative votage appears at OUT. The device protects itsef and the oad against batteries that are pugged in backwards. SHDN (Pin /Pin /Pin 6/Pin 6): Shutdown/UVLO. Puing the SHDN pin typicay beow V puts the LT386 into a ow power state and turns the output off. Quiescent current in shutdown is typicay ess than µa. The SHDN pin turn-on threshod is typicay.v. This pin may either be used as a shutdown function or as an undervotage ockout function. If using this pin as an undervotage ockout function, use a resistor divider between IN and with the tap point tied to SHDN. If using the pin as a shutdown function, drive the pin with either ogic or an open coector/drain with a pu-up resistor. The resistor suppies the pu-up current to the open coector/drain ogic, normay severa microamperes, and the SHDN pin current, typicay ess than µa at 6V. If unused, connect the SHDN pin to IN. TEMP (Pin 3/Pin 3/Pin 7/Pin 7): Die Junction Temperature. This pin outputs a votage indicating the LT386 average die junction temperature. At 5 C, this pin typicay outputs 5mV. The TEMP pin sope equas mv/ C so that at 5 C, this pin typicay outputs.5v. This pin does not read temperatures ess than C. The TEMP pin is not meant to be an accurate temperature sensor, but is usefu for debug, monitoring and cacuating therma resistance of the package mounted to the PCB. The TEMP pin aso incorporates the abiity to program a therma imit temperature ower than the interna typica therma shutdown temperature of 65 C. Tying a resistor from TEMP to programs the therma imit temperature with a µa trip point. Cacuate the vaue of the resistor from the formua: T SHDN mv C R TEMP = µa where T SHDN is the desired die therma imit temperature. There are severa degrees of hysteresis in the therma shutdown that cyces the reguator output on and off. Limit the capacitance on the TEMP pin to ess than pf. To prevent saturation in the TEMP output device, ensure that is higher than V TEMP by 5mV. TRACK (Pin 4/Pin 4/NA/NA): Track pin for paraeing. The TRACK pin aows mutipe LT386s to be paraeed in a master/save(s) configuration for higher output current appications. This aso aows heat to be spread out on the PCB. This circuit technique does not require baast resistors and does not degrade oad reguation. Tying the TRACK pin of the save device(s) to the / pins of the master device enabes this function. If the TRACK function is unused, TRACK is in a defaut camped high state. A TRACK pin votage beow.v on save device (s) shuts off the interna 5µA reference current at such that ony the 5µA reference current of the master device is active. A pins must be tied together in a master/ save configuration. PWRGD (Pin 5/Pin 5/NA/NA): Power Good Fag. The PWRGD pin is an open coector ogic pin connected to the output of the power good comparator. PWRGD asserts ow if the R PWRGD pin is ess than 4mV. The maximum ow output eve of mv over temperature is defined for μa of sink current. If R PWRGD is greater than 4mV, the PWRGD pin de-asserts and becomes high impedance. The PWRGD pin may be pued to 36V without damaging any interna circuitry regardess of the input votage. For more information 386f 3 This Manua:

15 LT386 Bock Diagram IN.5Ω Q POWER OUT 5Ω + CURRENT MONITOR = I OUT 5k 3mV mv EXTERNAL ILIMIT + + INTERNAL ILIMIT 3mV + CABLE DROP COMP k ERROR AMP 4k + CDC 75k 9mV 9mV TRACK.3V 3µA.V k TRACK ENABLE + k TRACK g m = 8µ + EN 5k EN 5µA PWRGD 7µs DELAY R PWRGD RISING EDGE IN + V REF 4mV R PWRGD 5µA TEMP TEMP + V TEMP mv/ C 5 C = 5mV µa SHUTDOWN CONTROL +.V SHDN 386 BD 4 For more information 386f This Manua:

16 Appications Information The LT386 is a mutifunction, ow dropout, ow noise, inear reguator with shutdown, and adjustabe power good. The device suppies.a with a typica dropout votage of 33mV and operates over a wide.4v to 4V input suppy range. The operating quiescent current is.ma and drops to ess than µa in shutdown. The LT386 reguator optimizes stabiity and transient response with a minimum ow ESR µf ceramic output capacitor. A singe resistor sets the output votage from.4v to 3V. Simiary, a singe resistor sets the power good threshod. The reguator typicay provides. ine reguation and. oad reguation. The LT386 has convenient programmabe diagnostic features. An output current monitor, that is typicay / of the output current, can set the current imit ower than the typica.4a interna imit. A temperature monitor, that is typicay mv/ C where 5mV = 5 C, can set the therma imit ower than the typica 65 C interna therma imit. For appications where the votage error at the oad is caused by the resistance in the connections between the LT386 and the oad, programmabe cabe drop compensation cances the error with a singe resistor. Mutipe LT386 reguators can be paraeed for higher oad currents and heat spreading without the need for externa baast resistors. During oad transients where the output overshoots (reguated output votages of.8v or higher), an interna pu-down current activates puing about 5mA from the OUT pin to ground. The pu-down current is disabed when the output is at or beow reguation. The reguator and the output overshoot pu-down turn off when the output votage is pued higher than the input by typicay 5mV. Curves of OUT Over IN Shutdown Threshod appear in the Typica Performance Characteristics section. Interna protection circuitry incudes reverse-battery protection, reverse-output protection, reverse-current protection, current imit with fodback and therma shutdown. Programming Output Votage The LT386 has an output votage range of.4 to 3V. The output votage is programmed with a singe resistor, R, connected from OUT to the pin, as shown in Figure. The pin has an interna 5µA current source LT386 to ground that generates a votage drop across R. The device servos the output to maintain the pin votage at.4v referenced to ground. Cacuate the output votage using the formua in Figure. Curves of Pin Reference Votage and Current vs Temperature appear in the Typica Performance Characteristics section. V IMON IN SHDN OUT LT F R =I R +.4V I = 5µA R =.4V 5µA OUTPUT RANGE =.4V TO 3V Figure. Programming Output Votage Tabe. Output Votage R Vaues (V) R (Ω) IDEAL SINGLE DUAL ERROR FOR SINGLE k.k.8k +.5%. 6k 6.k 5.8k +.8%.5 k.k.5k + 5.3%.8 8k 8k N/A % 3k k %.5 4k 4.k 4.k % k 57.6k 57.6k % 5 9k 9.9k 9.9k +.k. 3k 3k N/A % Tabe shows the nearest resistor vaues for some common output votages, aong with the output error caused by not using the idea resistance vaue. These errors can be as high as because of the % spacing between standard resistors. If tighter output toerance is required, consider using more accurate resistors. Aternativey, the resistance of R can be fine-tuned by adding a ow vaue resistor in series, see Tabe dua coumn. Programming Power Good The adjustabe power good threshod is programmed with a singe resistor, R PG, simiar to how the output votage is programmed by R. Simiar to the pin, R PWRGD determines the power good threshod with the For more information 386f 5 This Manua:

17 LT386 Appications Information combination of a.4v reference votage and a precision 5µA pu-down current. The power good signa pus high if the votage on R PWRGD increases above.4v. Buit-in hysteresis of typicay.6% exist for both the.4v votage threshod and the 5µA current source. Connecting a resistor between the RPWRGD and PWRGD pins can increase the power good hysteresis. See the Appication circuits for an exampe. 6 V IMON IN SHDN OUT LT386 R PWRGD PWRGD 386 F R R PG R PG = x (NOMINAL).4V 5µA WHERE 85% x 95% TYPICALLY V LOGIC OR R PGD V PWRGD C PG (OPTIONAL) Figure. Programming Power Good The PWRGD pin is the power good open coector ogic output. An interna deay of typicay 7µs exists ony for the rising edge (when the reguator output votage rises above the power good threshod) to reject noise or chatter during startup. If the power good function is not needed, eave the R PWRGD and PWRGD pins foating. The power good threshod is typicay programmed to 85% to 95% of the reguated output votage. Due to variations in reguator parameters and resistor variations, it is not practica to set the power good threshod greater than 95% of the output votage. Account for oad transients where the output votage droops momentariy before recovering. If increasing output capacitance to reduce output votage undershoot or if setting the power good threshod ower is not possibe, a capacitor, C PG, from R PWRGD to ground can fiter and deay the output signa. This aows for a configurabe de-gitching period before the power good threshod trips. For exampe, consider an appication with a nomina V output using µf of output capacitance and the power good threshod set for 9% of (NOMINAL). A.5A output oad current step momentariy undershoots beow the 9% threshod for more than 4µs, thus triggering the PWRGD pin to pu ow. Using a C PG of greater than 7pF degitches the power good comparator and prevents the PWRGD pin from puing ow for undershoot events ess than 4µs in duration. For more information For appications using cabe drop compensation and requiring a power good signa, cacuate the vaue of R PG based on the votage at the oad rather than the LT386 s output votage. In order for the power good threshod to be independent of the cabe drop compensation s moduation of the LT386 s output votage as a function of oad current, connect a resistor between CDC and R PWRGD with the same vaue as R CDC, the resistor between CDC and. This technique avoids connecting the R PG resistor to the oad votage through a ong trace/wire and eiminates potentia stray signa couping into the R PWRGD pin. See the front page Typica Appication circuit as an exampe. Output Votage Noise and Transient Response The LT386 reguator provides ow output votage noise over a Hz to khz bandwidth whie operating at fu oad. Output votage noise is approximatey 65nV/ Hz over this frequency bandwidth at the unity gain output votage of.4v at.a. To ower output votage noise for higher output votages, incude a feedforward capacitor, C, from OUT to the pin, as shown in Figure 3. A good quaity, ow eakage capacitor is recommended. This capacitor bypasses the votage setting resistor, R, providing a ow frequency noise poe. With the use of nf for C, output votage noise decreases from 8µV RMS to 4µV RMS at.a when the output votage is set to 5V. Higher vaues of output votage noise are often measured if care is not exercised with regard to circuit ayout and testing. Crosstak from nearby active signa traces may induce unwanted noise onto the LT386 s output. Power suppy rippe rejection must aso be considered. The LT386 reguator does not have unimited power suppy rejection and wi pass a sma portion of the input noise to the output. V IMON IN OUT LT386 SHDN 386 F3 R C Figure 3. Feedforward Capacitor for Improved Transient Response C OUT 386f This Manua:

18 Appications Information Using a feedforward capacitor, C, has the added benefit of improving transient response for output votages greater than.4v. With no feedforward capacitor, the setting time and output votage transients increase as the output votage is set above.4v. See Figure 4 and Transient Response curves in the Typica Performance Characteristics section. OUTPUT VOLTAGE DEVIATION (mv) LOAD CURRENT (A) C = nf C = C = pf C = nf I L = ma TO.A = 5.5V = 5V C OUT = µf TIME (µs) 386 F4 Figure 4. Transient Response vs Feedforward Capacitor Start-up time is affected by the use of a C feedforward capacitor. Start-up time is directy proportiona to the size of the feedforward capacitor and output votage. Setting time to is approximatey: t TLE = 4. C 5µA See the Start-Up Time vs C curve in the Typica Performance Characteristics section. If the LT386 is configured for cabe drop compensation, LTC does not recommend using a feedforward capacitor because C fiters the CDC correction signa and transient response to oad current changes degrades. Output Current Monitor and Externa Current Limit Current out of the pin is typicay equa to / of the reguator s output current. The output current monitor maintains accuracy across the fu input votage range, even during dropout. A resistor,, paced from to ground, sets the votage scae factor for use with anaog-to-digita converters, as shown in Figure 5. For exampe, with 44Ω for, V IMON is set for.663v when I OUT =.5A. 8 TO ADC V IMON IN SHDN OUT LT386 / 386 F5 LT386 Figure 5. Output Current Monitor and Externa Current Limit R = I OUT V IMON = IT =.8V Externa current imit activates if the votage on the pin exceeds the typica.8v threshod. Tying the and pins together aows the user to program a desired current imit based on the output current. An interna current imit, typicay.4a, is aways active and imits output current even if the pin is grounded. In addition, interna current imit fodback overrides externa current imit if the differentia votage becomes excessive. Note that the output current monitor represents not just the oad current, but the current into the output capacitor as we. During startup and arge oad transients, the output current monitor indicates the current required to charge the output capacitor in addition to the oad current. To prevent externa current imit from engaging prematurey, set the externa current imit above the maximum oad current to aow the output capacitor to recover without being current imited. For externa current imits set for ess than A, connect a series k-nf RC network from to ground to ensure current imit oop stabiity. Adding an RC network from to ground aso deays the current monitor signa, aowing output currents higher than the externa current imit for a imited duration. This is usefu for appications with arge output capacitance that woud otherwise trigger externa current imit during startup and arge oad transients, sowing output votage recovery. To guarantee externa current imit stabiity, ensure that the RC network from to has a capacitor vaue equa to or greater than nf and the resistor vaue is between. C.6 and k. C is the capacitor vaue in units of farads. LTC does not recommend an RC network other than the k-nf combination if using the cabe drop compensation and paraeing functions. For more information 386f 7 This Manua:

19 LT386 Appications Information To configure the output current monitor and externa current imit correcty, decide on the necessary current imit and fu-scae monitor output votage. Votage is imited to.8v if is tied to. Externa current imit is typicay set to % above maximum oad current to aow for arge transient events and threshod variations. For exampe, if the maximum oad current is.5a and both and pins are tied together, an scaing resistor of 44Ω yieds an externa current imit of.8a. If higher output current monitor votages are needed, the DFN package offers the abiity to separate the and pins with a resistor, as shown in Figure 6. To prevent saturation in the output device, choose so that V IMON is at east.6v ess than. If externa current is not needed, ground the pin. Output current monitor accuracy for very ow output currents is imited by the offset in the current monitor ampifier and parasitic current paths. The equivaent circuit of the parasitic current paths are shown in Figure 7. With zero output oad current, the current into is typicay µa when the and pins are tied together. As a resut, oad currents between ma and ma typicay cannot be measured. See Current Monitor Offset curves in the Typica Performance Characteristics section. Load Reguation and Cabe Drop Compensation Output oad reguation for the LT386 is typicay.. Optima reguation is obtained when the R feedback resistor is connected to the OUT pin of the reguator. In high current appications, sma votage drops appear due to the resistances of PCB traces or wires between the reguator and the oad. These drops may be eiminated by connecting R directy to the output at the oad as shown in Figure 8. Note that the votage drop across R OUT and R RTN add to the dropout votage of the reguator. The votage drop across R shoud aso be minimized to reduce output votage error due to ground pin current. See Pin Current curves in the Typica Performance Characteristics section. The LT386 has cabe drop compensation (CDC) functionaity that aows deivery of we reguated votage to remote oads using ony two wires of known fixed resistance. Compensation is user programmed by connecting a resistor, R CDC, between the and CDC pins, as shown in Figure 9. IN SHDN OUT LT386 R OUT R V IMON TO ADC R OPT (DFN PACKAGE ONLY) R LIM IN OUT LT386 SHDN R =R LIM +R OPT IT =.8V R LIM R MON R R RTN Figure 8. Kevin Sense Connection LOAD 386 F8 386 F6 Figure 6. Separate and (DFN Package Ony) IN LT386 IN LT386 I OUT / I OUT / k 43k 3mV 48mV 67k 6mV NOT TIED TO TIED TO 386 F7 IN SHDN OUT LT386 CDC R R CDC R LINE C LOAD (OPTIONAL) C OUT R ESR (OPTIONAL) R LINE L LINE L LINE R CDC = R 3 R WIRE R WIRE =R LINE +R LINE LOAD 386 F9 8 Figure 7. Equivaent Circuits of and For more information Figure 9. Cabe Drop Compensation 386f This Manua:

20 Appications Information At zero oad current, the CDC pin typicay reguates to the same votage as the pin. The votage decreases at a rate equa to /3 of the change in votage. For exampe, if V IMON increases from to.6v, V CDC decreases by.v. As a resut, the current that fows through R CDC is proportiona to oad current which increases the votage across R, effectivey increasing output votage. R CDC is seected using the foowing equation so that the votage at the OUT pin increases to cance the votage drop in the cabes connected to the oad. R CDC = R 3 R WIRE where R WIRE is the tota resistance of the suppy and return cabing connecting the LT386 to the oad. Figure shows the transient response with cabe drop compensation. With compensation, the output votage at the oad remains neary constant. Note that the transient votage droop in output votage is about the same as the votage droop with no compensation, but with the output votage returning to the correct compensated votage. OUTPUT VOLTAGE (V) LOAD CURRENT (A) WITH CDC V LOAD WITH CDC V LOAD WITHOUT CDC I LOAD =.5A TO.5A = 6V = 357Ω R WIRE =.4Ω R CDC = 46.4k R = 9k C OUT = µf C LOAD = TIME (µs) 386 F Figure. Transient Response with Cabe Drop Compensation C LOAD. The vaue of R ESR is approximatey: R ESR = L WIRE C LOAD LT386 There are imits to the amount of votage drop that can be compensated using cabe drop compensation. Using cabe drop compensation subjects oad reguation to the variabiity of the current monitor votage output and the cabing resistance. LTC recommends imiting cabe drop compensation to % of for appications needing good reguation. The imiting factor is variations in wire temperature as copper wire resistance changes about 9% for a 5 C temperature change. If output reguation requirements are oose (e.g., when using a secondary reguator), cabe drop compensation of up to 5% may be used. Noise from the current monitor output affects noise seen at the output. Fitering the current monitor output with an RC network from to ground is effective at reducing this noise source, especiay at ight oads. Consut the Output Current Monitor and Externa Current Limit section for more information Paraeing Mutipe Reguators The LT386 has been specificay designed to make paraeing mutipe reguators together easy. Paraeing enabes appications to increase tota output current and to spread heat dissipated by the reguator over a wider area on the PCB. The parae scheme is based on a master/save principe, where one LT386 is designated as master, and the other reguators act as saves with active sharing of tota oad current, as shown in Figure. The save s interna If ong cabes are used, an additiona suppy bypass capacitor, C LOAD, shoud be added directy to the oad to hande arge oad transient conditions. C OUT must sti directy connect to the OUT pin to ensure stabe operation of the LT386, minimizing output capacitor ESR and ESL. Long cabes have inductance where a resonance forms between the wire inductance, L WIRE and C LOAD. Damping is accompished by adding series resistance, R ESR, to For more information IN SHDN OUT LT386 MASTER R V TRACK = V ILIM(MASTER) OUT SHDN IN LT386 SLAVE(S) TRACK 386 F Figure. Master/Save(s) Configuration for Paraeing 386f 9 This Manua:

21 LT386 Appications Information current tracking ampifier compares the current monitor output from the master with the current monitor output seen at the save s pin, and servos the save s output current to match the master s. The master LT386 is connected exacty the same as a singe reguator where its output current monitor votage seen at its pin is used as the common current tracking signa. The save devices connect this signa to their TRACK pins to make their output current equa to the master s. The TRACK pin has an interna pu-up current that is typicay 5µA at.75v. When the TRACK pin is unused, the pin is pued up and camped at.5v, disabing the current tracking ampifier. When the TRACK pin is connected to the master current tracking signa, the TRACK pin votage is pued beow the.v threshod, enabing the current tracking ampifier and disabing the save s 5µA reference current, I. Disabing the reference current ensures that the master is the ony device controing the output votage. Set the maximum master current tracking signa to ess than.8v to prevent externa current imit from triggering prematurey. To prevent the save current tracking ampifier from ever being disabed, the save TRACK pin must be tied to the master pin. The master pin has an interna V camp that is beow the save.v current tracking ampifier enabe threshod. When mutipe saves are used, a smaer master resistor shoud be used to compensate for the pu-up currents from a the TRACK pins of the saves. For exampe, a master sourcing.a typicay has.697v at its pin with an resistor of 33Ω. Referring to the TRACK pin pu-up current curve in the Typica Performance Characteristics, with.697v on the TRACK pin, each save typicay adds 5µA to the master s.ma output. For an appication with 5 saves connected, decrease s vaue to:.697v = [.ma + ( 5 5µA)] = 35Ω The cosest resistor vaue equas 34Ω. A save reguators must have their pins connected to the master pin. The TRACK ampifier operates by adjusting the save interna reference votage sighty as a function of the difference in master and save current monitor votages. This has a strong effect on the save output current, which forces the save output current to match the master. Mismatch between master and save interna reference votages and current monitor outputs, offset in the save TRACK ampifier and TRACK pin pu-up currents a contribute to output current sharing error. In the case of negative offset, a save runs ess current than the master. At very ight oads, negative offset enabes the save output overshoot pu-down circuit, forcing the master to suppy current to keep the output votage within reguation. As a resut, quiescent current may increase for very ight oads in the master/save configuration. In some appications, mutipe reguators may be spaced some distance apart to optimize heat distribution. That makes the use of ow resistance traces important to connect each reguator to the oca ground system and to avoid ground oops created by oad currents. Ground currents can be as high as 3mA at.5a and 5mA at.a, for each reguator. Limiting differentia ground pin votages to ess than mv minimizes tracking errors. Ground trace resistance between master and saves shoud be ess than mv/3ma =.33Ω at.5a oad, and mv/5ma =.Ω for.a oad. Output Capacitance The LT386 reguator is stabe with a wide range of output capacitors. The ESR of the output capacitor affects stabiity, most notaby with sma capacitors. Use a minimum output capacitor of µf with an ESR of.ω or ess to prevent osciations. The output oad transient response is a function of output capacitance. Larger vaues of output capacitance decrease the peak deviations and provide improved transient response for arger oad current changes. For appications with arge oad current transients, a ow ESR ceramic capacitor in parae with a buk tantaum capacitor often provides an optimay damped response. For exampe, a 47µF tantaum capacitor with ESR =.Ω in parae with the µf ceramic capacitor with ESR <.Ω reduces output deviation by about : for arge transient oads and increases oop phase margin. For more information 386f This Manua: