Complementary Metal-Oxide-Semiconductor Field-Effect Transistor Circuits

Transcription

1 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo Chapter Complementary Metal-Oxide-emiconductor Field-Effect ransistor Circuits Complementary Metal-Oxide emiconductor echnology (CMO) is optimally suited for digital circuits. he unique properties of this technology range from small dimensions (lengths under 0nm) and ery large input impedance to small leakage currents. hey make CMO transistors ery good candidates for fast and power efficient digital processing and for storage of large amounts of digital data. Mixed-mode (analog and digital) use of CMO technology exten from C-to-C power conerters to millimeter wae analog circuits with operating frequencies aboe 00Hz. Modern CMO technologies enable the integration of seeral billion transistors into a single chip, which has resulted into the implementation of complex mixed-mode systems for computing, wireless communication, sensor signal conditioning, and other applications. Another reason why CMO technology is currently the integrated circuit fabrication technology of choice for consumer products is that CMO chips can be fabricated at low cost when production olumes are high. n this chapter, you will learn the fundamentals of the MO transistor deice characteristics. You will learn releant metho for the small-signal analysis of amplifier configurations with MO transistors. Practical design techniques are highlighted at the end of the chapter... CMO ransistors Fundamentals. As isualized in Fig. 6.a, the Metal-Oxide-emiconductor Field-Effect ransistor (MOFE or simply MO) is fabricated with a planar manufacturing process, where step-by-step processing facilitates the creation of ery compact and efficient deices. Most commonly, N-MO (or NMO) deices (with an N-type channel) are built oer a P-type substrate. wo highly doped N + junctions are used as drain and source terminals. Notice that to isolate the drain and source terminals, the diodes due to the interfaces between N + regions and the P-substrate must be reerse biased. he P-type substrate is connected to the lowest potential to maintain the reerse-biased PN junctions. he gate () is biased at a positie potential with respect to the substrate to attract electrons (minority carriers in the substrate) to the interface between the thin silicon dioxide (iox) and substrate layers, creating an inersion layer. he electrons accumulated in the channel are then swept from the source () to the drain () when a drain-source oltage ( = - ) is applied, resulting in a drain-source current (i ). he transistor operation is a strong function of the channel length (L) and width (W), which are the dimensions displayed in Fig. b. Metal Channel hin iox hick B Oxide L i N + N + N + i B W B P-type ubstrate (a) (b) (c)

2 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo Fig. 6.. N-type MO transistor. a) Cross iew of a N-MO transistor; b) top iew displaying the definition of channel length (L) and width (W); b) symbol of the N-MO transistor. he threshold oltage ( ) is, in a first approximation, the oltage required to turn the transistor on. When = - is smaller than, the transistor operates in the so-called sub-threshold region, which is also known as weak inersion region. Under this condition, the gate-substrate electric field is not strong enough to attract a large number of quasi-free carriers to the channel, resulting in small drainsource currents usually in the range of nanoamperes to microamperes. When the condition > is satisfied, the ertical electric field is strong enough to attract significant quasi-free carriers to the channel. hese carriers are swept when a drain-source oltage is applied. he MO transistor has two modes of operation while in strong inersion: a) when the < -, then the MO transistor operates in the linear region (also called triode region); and b), if > -, then it operates in the saturation region. he regions of operation are annotated in the characteristic cures of the drain-source current (s. and s. ) in Fig. 6.. Note that the saturation oltage ( A = ) indicates the boundary between the triode and saturation regions for a transistor whose operating point is defined by the gatesource oltage ( ). Quadratic approximation rain current riode region aturation region l Weak inersion trong inersion = A (a) Fig. 6.. N-type MO transistor: a) input characteristic cure showing the actual drain current and the quadratic approximation; b) typical transistor output characteristics. (b).. MO ransistor Operating in the riode egion. f the MO transistor operates in strong inersion (in the presence of a strong ertical electric field) but with a small drain-source oltage, then the lateral electrical field is weak and the concentration of carriers is quite homogeneous across the entire channel. n this regime, the basic PPCE model approximates the drain current using the following non-linear function: W K n, if 0 and, (6.) L

3 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo where K n (= n C OX ) is a technological parameter equal to the product of channel carrier mobility and the ratio of the permittiity of the gate-channel silicon-oxide oer its thickness (C OX = ε OX /t OX ). stan for the threshold oltage, which is another technological parameter that depen on the source-to-substrate oltage as follows: F 0 B F, (6.) where 0, F and are technological parameters, and B is the source-to-substrate oltage (source-tobulk oltage). n a first-order approximation, 0 is independent of the transistor oltages, such that the threshold oltage can be considered constant if B does not change. his statement is not alid for deep submicron technologies (with L << μm) where more accurate models hae to be used during simulations. he linear small-signal model of the MO transistor operating in triode region can be obtained by expanding Equation 6. using a multi-dimensional series expansion. f both the gate-source oltage and drain-source oltage hae small-signal components on top of the C components, and if the threshold oltage is assumed oltage inariant, the series expansion of the bi-dimensional expression of i (, ) yiel i id id Q Q id id n Q Q 3 3 id 3 id Q Q i d Q 3 id 3 Q 3 i d Q 3..., (6.3) where the sub-index Q indicates that the expression is to be ealuated at the operating point (C alue of and ). n this equation, n = K n (W/L). t is not difficult to add the effects of the B oltage on the threshold oltage, but the expressions would become more complex without adding significant alue for most hand calculations. Let us be focus on the most releant terms in Equation 6.3 to obtain a first-order small-signal model for MO transistors. Employing this equation for the expansion of the drain current expression (Eq. 6.) of the transistor operating in the triode region, and assuming that < A and >, the result is: i A, (6.4) 3

4 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo he aboe equation reeals that the drain current has seeral components: the first one is proportional to the AC signal applied at the gate-source terminals. f is kept constant, then the circuit operates as a linear transconductor where the equialent transconductance alue is controlled by the C oltage. his configuration is frequently used in applications where linear oltage-controlled current sources are needed, such as in operational transconductance amplifiers, linear filters, and other circuits. gnoring the higher order terms in Eq. 6.4, the small-signal drain-source current can be approximated as A gm g i, (6.5) where the transistor transconductance is g m = and drain-source conductance is g = ( A - ). t is worth mentioning that if is zero, the transistor s conductance is not zero, but the transconductance becomes zero. his operating condition is ery useful since the power consumption is zero due to the = 0 condition. he small-signal model is represented in Figure 6.3b. d i + i g C gd g d i g b - C g m g s s (a) Fig a) N-type transistor symbol and b) simplified small-signal model while operating in the triode region. (b) he gate-channel capacitance is approximately split into two equal pieces: one is connected between the gate and source, and the other one between the gate and drain. When operating in triode region, these capacitors can be approximated as C = C gd = 0.5 C OX W L in hand calculations. f is maintained constant, the drain current can be controlled with the C alue of A - according to Eq his configuration is especially useful when operating the transistor with smallsignal ariations ensuring that < A -, such that the circuit behaes as a linear oltagecontrolled conductor whose conductance is approximately equal to ( A - ). Wider linear range and better linearity are usually obtained when = 0 because this condition maximizes the linear term while the quadratic term remains constant, leading to smaller second-order harmonic distortion..3. MO ransistor Operating in the aturation egion. he drain-source current of long channel (L > 80nm) MO transistors when operating in saturation region ( > A and > ) can be approximated by a quadratic function as follows: 4

5 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo K W L l n, (6.6) where the channel-length modulation parameter lambda (l) models the drain current ariation due to the drain-source electric field. his parameter is more precisely estimated in higher-leel deice models used by circuit simulators, and it has been shown that its alue reduces with transistor length. For hand calculations, l is often approximated as l, (6.7) L early where the early oltage per unit length ( early ) is expressed in olts/μm. ince the drain oltage is primarily determined by the C oerdrie oltage ( - ), Eq. 6.6 can then be expressed in a simpler form: l A, (6.8) where the oerdrie oltage (or saturation oltage) is defined as A = -, and = K n (W/L)..3.. mall-ignal Model. n this section, the small-signal model is deried for a MO transistor operating in the saturation region. imilar to the case of the transistor operating in triode region, the most releant parameters are the small-signal transconductance and drain-source ( output ) resistance (r ). he drain-source resistance of MO deices cannot be ignored in many practical applications, especially when short-channel deices are used with large C bias currents. For this reason, a small-signal model with a drain-source conductance parameter (g = /r ) will be presented here. f the gate oltage is composed of a C component and a small AC component in, then the drain current can be expressed as function of the small-signal ariations and as i d l l A A A. (6.9) he drain current is a function of all the oltages applied to the transistor terminals, where are the C oltages, and B as well as the AC signals present at the gate ( ) and drain ( ) terminals. n this section it is assumed that the B does not hae significant oltage ariations, and the threshold oltage is assumed to be constant. his may not be the case in many practical circuits such as source 5

6 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo follower and common-base amplifier configurations. According to Eq. 6.9 the output current has seeral components, which are more recognizable if the equation is expanded: i A l l A l l l A (6.0) Fie current components are eident in the aboe equation: i) the first one is independent of the AC signals and correspon to the bias current (in Eq. 6.3); ii) the second component is proportional to the input signal with a coefficient that is defined as the small-signal transconductance, and this component is the desired current component; iii) the third term aries with the output signal, and this term correspond to the transistor output conductance; i) the fourth term is proportional to, and lea to second-order harmonic distortion in the signal, which is why it is adisable to reduce the power of this component as much as possible; ) the last term is due to the cross-product between and. ince the output oltage is correlated with the input signal, the last term usually results in third-order distortion, which is more eident if we approximate the fundamental component of the drain-source oltage as an amplified ersion of the input signal ( = A ). he linear model of the transistor is obtained under the assumption that <<, resulting in low sensitiity of the drain current to the nonlinear terms in Eq his assumption is a reasonable approximation for input signals with small amplitudes. he coefficient of in 6.0 can be recognized as the small-signal transconductance of the MO transistor. t can be also be formally obtained from Eq. 6.9 as g m i d A l. (6.) Q he MO transistor drain-source conductance can then be approximated as i d Q Notice that the aboe equation implies that r /( λ) g A l l (6.) For the case l A <<, the following small-signal transconductance expression can be used: g (6.3) m A 6

7 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo he small-signal model with the gate-source capacitance is displayed in Fig he alue of C can be estimated as C = WL ox /t ox, where W and L are the dimensions of gate width and length respectiely, t ox is the thickness of the gate oxide and ox is the permittiity of the thin silicon oxide layer. he input impedance of the MO transistor is capacitie, and it is determined as /(jc ), which is releant at high frequencies. he effect of C is usually ignored when /(jc ) is ery large compared to the impedance magnitudes of other passie elements. An eident effect of C is an impedance reduction at high frequency when looking into the gate of the transistor, which reduces the gate-source oltage swing when the input signal is applied at the gate. his lea to smaller drain current, and in most of the practical cases the capacitance is the ultimate limitation for the high-frequency response of the amplifier. ndeed the frequency response of the MO transistor is dictated by f t g m /(C ), which represents the unity-gain frequency of the transistor when driing an identical stage. he frequency f t is also often referred to as transition frequency. For integrated circuits, C C OX W L is usually in the range from a few pf for wide deices to a few ff for deep submicron transistors employing minimum dimensions. he alue of this capacitance could be in the range of nf for power amplifiers due to the fact that the dimensions of these deices are huge. he gate-source capacitor should not be ignored in the following cases: i) Analog signal processors operating aboe 00MHz. For example, the impedance of a pf capacitor at 00MHz is around -j.59kω, and its effects when combined with resistors in the kω range or smaller is critical. ii) Power amplifiers een if operating at low frequencies. he impedance of a 0nF capacitor at 0kHz is only -j.59kω. his capacitor and a resistor of 0kΩ lead to an C time constant that correspon to a frequency of approximately.59khz. iii) igital circuits operating aboe hundre of megahertz, particularly when accounting the power dissipated large digital circuits. For instance, 0 6 transistors with a gate-source capacitance of ff each running continuously with a clock frequency of Hz dissipate Watt when the supply oltage ( ) is (power of digital switching transistors = C f clk ). Usually oer 50% of the power dissipated in a cellular phone is due to the transistors in the digital signal processor. + - g i g =0 C g m s d g i + - g i g =0 C s d g m g m g (a) Fig implified MO small-signal models while operating in saturation region: a) hybrid-π model, and b) -model. (Use equations 6. and 6. for computing g m and g, respectiely.) (b) 7

8 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo n the rest of this chapter we are going to ignore the effect of both C and r are ignored to aoid complicating the circuits, and to clarify the main properties of the MO circuits. n general, is typically helpful to first analyze analog circuits with simplified deice models to estimate characteristics, and to include non-idealities such as C and r when deriing more complex equations for more insightful equations. After each analysis step, simulations should be used to alidate the results and to optimize performance by adjusting deice parameters based on the relationships that are apparent from the analytical equations. Notice that if C is ignored, the MO transistor s model is identical to the one representing a bipolar transistor with r π =. he differences are in the equations used to compute the alues of g m and g. Another notable simplification in this model is the assumption that the substrate is connected to its source terminal, such that bs does not hae an impact on the threshold oltage..3.. Harmonic istortion Components. he second harmonic distortion (H) can be obtained from Eq. 6.9 by computing the second deriatie of the drain current as function of. Assuming negligible signal ariations of the drain-source oltage, the H with a sinusoidal input signal haing an amplitude of -pk is H l 8 l A 4 pk A. (6.4) Notice that large second-order distortion will result when A is small compared to the input signal amplitude. he aboe expression shows that the second harmonic distortion generated by a MO transistor is smaller than H generated by a bipolar transistor for which the second-order distortion is approximately equal to /4 pk / th, where th is the thermal oltage ( 6m). he third-order distortion results from to the cross-product of and. Assuming that = A, then the third-order distortion can be defined as follows: A H3 l l A A l A pk A. (6.5) According to this expression, large alues for L (longer deices with smaller l) lead to smaller thirdorder distortion components. t is worth mentioning that this result is alid under the assumption that the threshold oltage is oltage-inariant. t can be shown by including the expression for (in A = - ) that additional third-order distortion is caused when the transistor is exposed to sb ariations..4. Common-ource Amplifier. he common-source amplifier shown in Fig. 6.5 usually has high input impedance, which is limited by the gate biasing resistors and. Coupling capacitors C and C are normally selected such that 8

9 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo their impedance in the frequency range of interest is negligible compared to the resistors. he gate oltage is conerted into current by the MO transistor, and conerted back into oltage by the parallel combination of the drain and load resistors. hus, this amplifier is suitable for oltage amplification. t can also be used as a oltage-to-current conerter (i.e., a transconductance amplifier) if the transistor s drain is connected to a subsequent circuit with low input impedance. + i - C g d C o L Fig Common-source amplifier with a resistie biasing network..4.. C Analysis. uring the C analysis the coupling capacitors are treated as open circuits. he current into the gate is zero because the gate channel interface is capacitie. herefore,. (6.6) he C drain current is computed using Eq. 6.8 for the saturation region, which is the region that is best suited for operating MO amplifiers: l. (6.7) Equation 6.7 cannot be soled directly because it is function of two unknowns: and. he second equation that allows us to sole 6.7 is related to the drain oltage. Notice that is gien by. (6.8) Equation 6.8 can be inserted into Eq. 6.8, leading to a second-order linear equation that dictates the drain current as function of,, and the technological parameters l and : 9

10 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo l. (6.9) For first-order (and easy) computations, it can be assumed that the alue of l is ery small, leading to a straightforward solution for. Note that Eq. 6.9 is quadratic, which results in two possible operating points defined by the two solutions for. Normally, only one of the solutions satisfies the conditions for transistor operation in the saturation region ( > and > A ), such that the other solution can be discarded in the analysis after checking the conditions..4.. AC Analysis. mall-signal AC analysis is carried out by shorting C oltage sources and opening C current sources. he resulting equialent circuit for the amplifier in Fig. 6.5 is depicted in Fig.6.6, where the gatesource capacitance (C ) and drain-source resistance (r ) of the transistor are included in the model. ince the gate current is zero (i= 0), the impedance looking into the gate is infinite ( /i = /0 = ). Hence, the small-signal gate-source oltage can be obtained by employing the expression for the oltage diider that is unaffected by g m, yielding Z i Z s i i i s ( C sc s C C sc s C C ) i. (6.0a) + i - Z i C C i=0 = g C d + r s = /g - m s g m r L o Fig Common-source amplifier: linear small-signal model. he series capacitor C blocks (high impedance at low frequencies) the low-frequency signal, generating the zero in Eq. 6.0a. his zero at the f = 0 increases the magnitude of the transfer function at a rate of +0dB/decade until the frequency of the pole ( p = /[ (C +C )]). After the frequency of pole, 0

11 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo the oltage gain / i becomes flat. Notice that the large resistor (in parallel with C ) can be ignored at high frequencies, leading to a simplified transfer function: i C ; if f / C. (6.0b) C C Eidently, is approximately equal to in if C >> C, which is usually the case in discrete amplifiers. he drain current (= /r s = g m ) generated by the oltage-controlled current source is computed using Ohm s law, and the drain oltage d can be determined by ealuating the product of the g m and the equialent impedance (= r ( L +/sc )) at node d. ome intuition on the operation of the circuit is gained by obsering that the equialent impedance at d is equal to r at ery low frequencies while its alue decreases at high frequencies and becomes equal to r L. his behaior suggest that when measured at d, the oltage gain is higher at low frequencies because a pole at intermediate frequencies causes the gain to drop with a rate of -0dB/decade, and a zero at higher frequency causes the gain to be constant. You can derie that the locations of the pole and zero are p = /( L C ) and z = /(( L r )C ). he output oltage o in Fig.6.6 can be obtained from d by making use of the oltage diider property. t can also be obtained by employing the current diision principle to find the expression of the current flowing through L, making the computation of o easy using Ohm s law. Following this approach, it can be shown that o i L d r g m L s C r L sc s r C r L. (6.) his equation shows that the output circuit configuration has a high-pass transfer function due to the zero located at = /[( r )C ] and the pole at = /[( r + L )C ]. he frequency components below the frequency of the pole will be attenuated due to the effect of the blocking capacitor C connected in series, and the oltage gain from to o at high frequencies becomes equal to -g m ( L r ). he combination of the results in 6.0a and 6. lea to the expression of the oerall oltage gain as

12 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo L m P Z P Z L m L i o g s s s s g C r s C r s C C s C s ) (. (6.) he oerall oltage gain has two poles and two zeros placed, which are located at the following frequencies: C r C r C C C L P Z P Z, (6.3) he MO transistor s input capacitance C decreases the frequency of the first pole, and its effect can be ignored if C is in the range of few nf or larger because C is typically under pf with the exception of the transistors used in power applications where C might een be larger than C. he second pole is usually formed by r and C. he larger the alue of r, the smaller will be the frequency of the second pole. n the passband (> P, P ), the expression for the oltage gain simplifies to L m i o r g (6.4) Eqn. 6.4 is useful for first estimations, but we hae to keep in mind that this expression is only alid for frequencies beyond the locations of the poles.

13 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo o i db C 0log0 C C 0 db/decade r L g m 40 db/decade P P (log) Fig Common source amplifier s magnitude response assuming that P < P. Fig. 6.7 shows the transfer function assuming that P < P. he typical practice in audio amplifiers is to increase the alues of C and C as much as possible. his approach is limited by form factor and cost since large capacitors are usually electrolytic. Another common practice is to increase the alue of ; which pushes P to lower frequencies. Many discrete capacitors on printed circuit boar hae significant losses and lead inductances, leading to an equialent circuit composed of the series combination of a capacitor, resistor, and inductor. herefore, the component has inductie impedance characteristics at high frequencies. his inductie behaior may appear een in the range of few megahertz. ue to broader frequency response, ceramic or tantalum capacitors are preferred for ideo applications; howeer, their alues are limited. he amplifier input impedance Z i is entirely determined by the parallel combination of and the impedance of the capacitor C as eident from Fig. 6.6 because i = 0: Z i sc. (6.5) s C Z i is mainly resistie ( ) for frequencies below the pole s frequency, but it becomes capacitie beyond the pole frequency ( /[sc ]). f a prior amplification stage dries the input impedance Z i, then the drier requires to be designed with more power consumption if high-frequency operation is needed because the impedance Z i reduces with frequency and the drier has to proide higher currents at high frequencies for large oltage swin across Z i Practical esign Considerations. Practical issues when designing the common-source amplifier include achieing low distortion figures and aoiding clipping of the signal when the different nodes experience large signal swin. Fig. 6.8 displays the input and output characteristics of a MO transistor. Notice in Fig. 6.8a that due to the non-linear (quadratic) nature of the gate-source oltage to drain current conersion, when large signals are applied at the input, then large asymmetries (distortion) result in the drain current. hese effects are analyzed in the following subsection. Another aspect is the 3

14 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo proper selection of the C drain-source oltage to bias the transistor because clipping may occur for an inappropriate operating point (Q-point) when is too close to or A, as illustrated in Fig. 8b. ignal swing limitations. he output signal swing is bounded by the power supply and the minimum drain-source oltage required for maintaining transistor operation in the saturation region. f the operating point is selected such that is small (see Q in Fig. 6.8b), the negatie peak alue of the drain oltage swing is limited as follows:, (6.6) A o pk where d-pk is the peak alue of the drain oltage. f on the other hand the Q-point is selected with a large oltage, the positie swing is limited by the power supply, as displayed in Fig 6.8b (Q ). n this case, the oltage is constrained to the following condition. (6.7) o pk Equations 6.6 and 6.7 are combined in the following expression: A o pk o pk. (6.8) he first step in the design process consists of finding the resistances and alues that satisfy the gain, input impedance, and linearity requirements. Equation 6.8 will be used during the design stage to ensure that the transistor does not exhibit hard clipping. n case additional degrees of freedom exist, other conditions such as minimum power consumption can be accounted for. i i tatic load line Q / = A Q Q A (a) (b) 4

15 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo Fig MO transistor: a) input characteristics showing the mapping of signals applied across the gate-source terminals to the drain current, and b) output characteristics showing the implications on signal clipping when selecting the operating point Q Harmonic istortion due to Nonlinear ate-ource oltage to rain Current Conersion. A designer should limit the signal swing, otherwise the nonlinear behaior of the transistor s oltage-to-current conersion results in low signal-to-distortion ratios. he harmonic distortion generated by a standalone MO transistor is quantified through equations 6.4 and 6.5. he i -to- oltage gain for the example amplifier is gien in Eq.6.0. For in-band signals, the computation of H yiel C C C H la 8 l i 4 pk A (6.9) with g m r r L L. (6.30) Equation 6.30 is a ery stringent constraint when designing low-distortion amplifiers. he dominant parameter determining the amplifier linearity is the ratio of input signal power to saturation oltage. f l is ery small, then a simpler yet useful expression for hand calculations results: C H C C i 4 pk A C C C id 8 pk. (6.3) Note that the relation i d-pk / i-pk = g m = / A was used during in the equality of Eq For the inband frequencies the peak oltage and current are related by o-pk = i d-pk ( L ), and if the alue of the maximum permissible H is defined, then the C drain current can be bounded (from 6.3) as C C C o 8 H pk L. (6.3) 5

16 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo Eidently, the larger the output signal swing is, the larger the bias current must be to maintain the desired harmonic distortion performance. he aboe equation is ery handy when designing low-distortion single-ended amplifiers. he third-order distortion is determined by Eq. 6.5, which lea to the following expression for the example amplifier: H3 l l A l A. (6.33) From the aboe equation it can be concluded that low H3 figures require large A alues, and that long-channel deices (with small l alues) help to reduce H3. Notice that large oltage gain ( / ) increases distortion since it increases the output oltage swing, thereby increasing the power of the cross-product distortion components. mall signals are conerted to current in a more linear fashion than large signals. For instance, limiting the amplitude of the input signal to A /.5 yiel H -0 db while i = A /0 lea to H -3dB. A more effectie design approach employs fully-differential architectures where the een harmonic distortions are less critical. Howeer, the oerhead is that those architectures are more complex and require additional circuitry for controlling the operating point. he study of these architectures is outside of the scope of this book..5. Common-ource Amplifier with ource egeneration. Better linearity figures can be obtained by adding a linear resistor between the source of the transistor and an AC ground. n order to obtain first order approximations, we will ignore the effects of l in the analysis below..5.. C Analysis. he C drain current of the amplifier in Fig. 6.9a can be obtained if the equation related to the gate-source terminals and the transistor equation are soled as follows:, (6.34) or. (6.35) / Equations 6.34 and 6.35 can be combined, leading to the following equation: 6

17 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo 0 (6.36) his nonlinear equation can be soled using the quadratic formula, resulting in two solutions. We hae to select the one that correspond to the operation of the circuit. One of the solutions lea to a positie alue that correspon to a gate-source oltage ( ) that is smaller than the threshold oltage. hat solution does not make sense since < would not satisfy the condition for operation in the saturation region, which can be obsered for Q in Fig. 6.9b. he solution of Eq that meets the > saturation requirement is: t follows that. (6.37). (6.38) Before continuing with the analysis, it is worth to interpret this intermediate result. n practice, the transistor parameters β and change by more than 0% for mass-produced deices. t is particularly interesting to inspect the ariation of the drain current as function of the threshold oltage because this ariation has significant effect on the ariability of the drain current. From Eq we can find that d d. (6.39) Notice that larger alues reduce the ariability of under threshold oltage ariations. his is one of the main adantages of the resistie source-degeneration technique. For the case of = 0, it follows from Eq that d d for =0 (6.40) Equations 6.39 and 6.40 can be compared to show that the current ariability of the source degenerated topology is smaller than that of the amplifier with = 0: 7

18 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo d d d d with 0 (6.4) with 0 Although it is not immediately eident by inspection of the equation, a plot of Eq. 6.4 shows that drain current ariability decreases for increasing alues, een if the resistance is small. Hence, the source degeneration resistance improes the amplifier s robustness to manufacturing process ariations. he second releant equation of interest relates the drain-source oltage with the power supply oltage and the drain current. he analysis of the circuit displayed in Fig. 6.9a yiel. (6.4) he operating point is obtained by soling 6.38 and 6.4 for and. he transistor small-signal parameters are computed employing equations t is releant to ensure that the drain-source oltage is large enough to tolerate the output signal swing without inducing clipping issues. d o Q + i - C g C L Q (a) + i - i d Z d i C g i=0 g m C = + - s r s =/g m L (b) o (c) 8

19 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo Fig Common-source amplifier with source degeneration resistor: a) schematic, b) graphical representation of the basic C equations and Q-point, and c) small-signal equialent circuit..5.. AC Analysis. Fig. 6.9c shows the small-signal diagram of the common-source amplifier with source degeneration resistor. he circuit s input impedance measured after the blocking capacitor C is equal to. Hence, for high input impedance sources it is highly desirable to increase to minimize the signal losses because is grounded, which usually results in a oltage diider between the input source impedance and. he gate oltage is determined by the oltage diider due to C and, leading to a transfer function with a zero at the origin and a pole: g in = s C +s C. (6.43) he gate oltage ( g ) is conerted into current (i d = g / [r s + ]) by the series combination of r s and. he equialent impedance at the drain of the amplifier conerts this current into oltage, such that a large drain impedance lea to high oltage gain. he gate-to-drain transfer function is d = ( +s ) ( L C ) (6.44) g r + +s( + L )C he low-frequency gate-drain oltage gain is determined by the ratio of the drain resistor and the total source resistance, including r of the transistor. Notice that decreases the oltage gain. he transfer function from the drain to the output is: 0 d = s LC +s L C. (6.45) he preious equations are combined to obtain the oerall amplifier transfer function, leading to 0 = ( ) ( s C s ) ( L C ). (6.46) in r + +s C +s( + L )C his transfer function has two zeroes due to the fact that C and C are connected in series with the signal path, which blocks the low-frequency signal. At high frequencies these capacitors behae as short circuits and their effects disappear. At the frequency range beyond the dominant pole, the amplifier s gain can be approximated as 9

20 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo 0 in L r + (6.47) he oltage gain is a function of the ratio of the load impedance and the oerall series resistance at the source (r + ). his is an important result because it means that oltage gain has low sensitiity to transistors parameters (that depend on fabrication process, bias, and temperature ariations) if >> r s. atios of resistor are usually well-controlled when using resistors with similar oltage and temperature coefficients, which permits reliable mass production. Large source degeneration resistors make the operating point more stable, the oltage gain more precise, and the amplifier more linear, but the tradeoffs are reduced oltage gain or higher power consumption to achiee the same gain as a common-source amplifier without source degeneration. he addition of also reduces the oltage headroom at the output, which makes it more difficult to select an operating point that allows large output oltage swin with limited supply oltage Nonlinearities of the ource-egenerated Common-ource Configuration. Let us find first-order equations to predict the linearity of the source-degenerated topology. f is replaced by + in, then the drain current of the source-degenerated amplifier can be obtained from 6.7 as i i in. (6.48) he aboe equation can be rearranged as preparation to sole for i / : i i in i 0. (6.49) his equation can be soled with the quadratic formula because it is only a function of the gate oltage and technological parameters. he alid solution of the second-order equation is: i in i (6.50) Equation 6.50 can be squared and expanded in a aylor series to find the expressions for the harmonic distortion components. Following the same approach as for the bipolar deices in chapter, it follows that 0

21 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo... i 3 5 / 3 / / in in in (6.5) he first term in Eq. 6.5 represents the C current component, while the second term is the fundamental current component. he coefficient of in is the oerall transconductance gain of the sourcedegenerated amplifier: / m (6.5) Notice that for large, the oerall transconductance approaches the alue of /. he result is a ery linear amplifier but with limited oltage-to-current conersion gain. he linearity improement is demonstrated if the nd and 3 rd -order distortions are analyzed. he second-order harmonic distortion can be obtained from 6.5 as in 4 H / (6.53) o get more insights into the benefits of the source degeneration technique, let us expand the denominator of the second factor of Eq in a aylor series, then after some algebraic manipulation steps it can be deried that A in in 4 4 H / / (6.54)

22 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo he first factor in the aboe expression is less than one, while the second factor is larger than one. hose factors can be plotted and it can be shown that the combination of the first two factors is less than one if 0. he main benefit of source degeneration is in the third term. he source degeneration resistor reduces the denominator, leading to a reduction of the second-order harmonic distortion. Making A = reduces H by a factor of two (or 6dB). his benefit is achieed at the cost of higher power consumption if the same gain is desired; and we also need to accommodate the C oltage headroom demanded by the resistor. Fully differential topologies are often used in more adanced applications. n this case the een-order harmonic distortions are not the major limitation, but the odd-order harmonic components become critical. he benefits of the source degeneration design approach are een more releant in this case. he third-order distortion can be obtained as H3 5/ / 8 in in / 4 A (6.55) For the case A =, the third harmonic distortion reduces by a factor of 4 due to the last factor, which correspon to db better linearity. n practice, the reduction of the harmonic distortion is een larger because the first two factors are below unity for Common-ate Amplifier. he common-gate configuration displayed in Fig. 6.0 is analyzed next. n this configuration, the input signal is applied through the low-impedance source terminal, while the gate terminal is connected to an AC ground through the large capacitor C 3. he output signal is at the drain terminal. t will be shown in the following subsection that the input impedance of this architecture is relatiely small, such that driing it with a oltage source requires significant input power. A unique property of this topology is that the low input impedance can be easily adjusted to match it with the impedance of an input source that has low impedance. C represents the parasitic capacitors associated with the input current source (i i ) and the equialent capacitances of the transistor itself. t will be eident at the end of this section that this circuit s bandwidth is ery wide, which makes this topology one of the most popular broadband radio frequency (F) front-en. his amplifier is also ery useful when the input signal is current, as is further discussed in the following subsections. Many optical communication front-en employ the common-gate configuration to process the output current of photodiodes. his circuit is also ery popular in multi-stage amplifiers as an intermediate stage to couple the input stage to the output stage. he C analysis of this and other configurations is similar to the one described in ection.5., and the C equations (e.g., ) are not repeated here.

23 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo d o C3 d g s C Z i o L C 3 g = g m i=0 + r s = /g m - s Z i C L C i i C i i (a) Fig Common-gate configuration drien by an input current source: a) schematic of the transimpedance amplifier, and b) its small-signal circuit. he gate-source capacitance is ignored. (b).6.. AC Analysis. A main difference between the common-source and common-gate configuration lays in the alue of the input impedance. he analysis of the common-gate configuration in Fig. 6.0 shows that the input impedance is gien by Z i = (r ) r =. (6.56) sc +s(r )C At low frequencies, the input impedance is determined by the parallel combination of the gate-source equialent resistance r and the bias resistor. his impedance is small since r = /g m. he pole is typically at a high frequency due to the fact that r is usually small..6.. Common-ate Amplifier used as a Current-to-oltage Conerter. he input signal of the example common-gate amplifier in Fig. 6.0 is current, and the transfer function that relates the input current to the oltage at the source terminal is: i in = r +s(r )C. (6.57) he oltage swing at the input signal source is small at low and high frequencies due to the small input impedance of the topology. he frequency of the pole is usually ery high for the same reason. Following the procedure used to analyze the preious architectures, the oltage gain from the source to the drain can be determined as d = ( +s ) ( L C ). (6.58) s r +s( + L )C 3

24 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo Notice that the series capacitor C generates a zero-pole pair. he drain oltage d is equal to /r s at low frequencies, and it becomes equal to the ratio of ( L )/r s at frequencies beyond the location of the zero-pole pair. he drain-to-output oltage transfer function can then be obtained from the oltage diider at the output: 0 d = s LC +s L C. (6.59) Equations are combined to obtain the amplifier s transimpedance gain: 0 = ( ) ( d ) ( 0 r ) = ( ) ( s ) ( L C ). (6.60) i in i in s d +s(r )C r +s( + L )C he output oltage is dictated by the output impedance L at medium and high frequencies. he second term in Eq is just a result of the current diider due to r and. Only the current flowing through r flows through the channel and is then conerted into oltage by the load impedance attached at the drain of the MO transistor. C generates a zero-pole pair, and after the frequency of the pole the last term becomes equal to L /( + L ). his circuit can achiee operation oer a ery wide frequency range, and it can also proide a large current-to-oltage conersion factor. Normally, the pole at the transistor s source terminal is at a ery high frequency due to the low input impedance, and its effect is usually negligible. At intermediate frequencies, equation 6.60 can be approximated as 0 i in = ( r + ) ( L ), (6.6) which is entirely determined by the parallel combination of the resistors attached at the drain of the transistor proided that >> r. n more adanced design approaches, the biasing resistor is replaced by an actie current source, but such metho are not discussed in this introductory text. Notice that in this architecture, the circuit is fundamentally a current follower: the input current flows into the source where it diides between s and r s. he current diision factor is eident in the first factor of Eq he current flowing through the transistor channel is conerted into a oltage by the load impedance that determined by L beyond the frequency of the output pole Common-ate Configuration as a oltage Amplifier. n Fig. 6., the input oltage is injected at the low-impedance source terminal, while the gate terminal is attached to an AC ground. he output signal is at the drain terminal. he input-to-source oltage transfer function is determined by the oltage diider due to C and r, resulting in a transfer function with a zero at the origin and a pole whose frequency is determined by the time constant at the source node. Using conentional circuit analysis techniques, it can be shown that the input-to-source transfer function can be deried as 4

25 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo d o C 3 g d s C Z i C + i - o L C 3 g = g m i=0 + r s = /g m - s C Z i + i - C L (a) Fig. 6.. Common-gate configuration: a) schematic, b) equialent small-signal model. (b) in = s( r )C +s( r )C. (6.6) he capacitor C decouples the input signal source and from the C bias oltage at the source terminal. n addition, this blocking capacitor attenuates the low-frequency signals at the source of the transistor, but beyond the frequency of the pole the oltage gain is close to unity when i is ideal (with zero output resistance). ince r is usually small, a large capacitor is typically needed to push this pole to a low frequency. espite of its small input impedance, the common-gate topology can achiee significant oltage gain. he source-drain oltage transfer function can be deried as d = ( +s ) ( L C ). (6.63) r +s( + L )C he source-to-output transfer function is 0 d = s LC +s L C. (6.64) Finally, the input-to-source transfer function ( s / i ) is less than unity, leading to a oltage attenuator. f r is significantly smaller than the oerall impedance attached to the source, then the gate-source oltage gain is almost unity. he preious equations can be combined to obtain the oerall amplifier transfer function: 0 = ( s( r )C ) ( s ) ( L C ) (6.65) in +s( r )C r +s( + L )C 5

26 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo he aboe transfer function has two zeroes that block low-frequency signals due to the fact that C and C are connected in series with the signal trajectory. At high frequency these capacitors behae as short circuits, and their effects disappear. At the frequency range beyond the dominant pole, the commondrain amplifier s oltage gain can be approximated as 0 in L r (6.66) he non-inerting oltage gain is function of the ratio of the load impedance and the transistor s gatesource resistance r. his oltage gain can be as high as the one obtained with the common-source amplifier. he main difference between the common-source and common-gate configurations lays in the alue of the input impedance. he analysis of the common-gate configuration shows that the input impedance is gien by Z in = (r ) + sc (6.67) At high frequencies the input impedance is determined by the parallel of combination the gate-source equialent resistance r and the bias resistor. his impedance is usually small. When used as a oltage amplifier, a major drawback of this architecture is that the current gain is less than unity, which is a result of the low input impedance characteristics of the common-gate configuration. Hence, the architecture is mainly used when the goal is to conert current into oltage. his is the case when the input signal is current, such as for photodetectors in image processors and optical communication systems..7. Common-rain Amplifier. A third basic configuration is realized if the input signal is applied at the gate terminal and the output oltage is defined at the source terminal, as depicted in Fig. 6.. he circuit operates as a oltage diider whose oltage gain is close to but less than unity. he obious question is: why is this topology used een though it does not proide any oltage gain. o answer this question, consider the two releant adantages of this topology oer the others: i) the source follows the ariations of the gate (with small ) and it exhibits relatiely small harmonic distortion components due to the inherent source degeneration, ii) high power can be deliered to the load impedance; in theory its power efficiency can be as high as 5% if the transistor parameter r is much smaller than the load impedance. he topology s C analysis is similar to the other amplifier cases, and the basic equations needed to define its operating point are gien in ection.5.. 6

27 ntroduction to Electronic Circuits: A esign-oriented Approach Jose ila-martinez and Marin Onabajo + i - C g d s C 3 C L o + i - C Z i = g + - i=0 s g m r s =/g m C o L (a) Fig. 6.. Common-drain configuration: a) schematic of the common-drain (or oltage follower) amplifier, and b) its small-signal equialent circuit. (b).7.. AC Analysis. ince the gate current is zero, the input signal-to-gate oltage transfer function is determined by the oltage diider due to C and, which is g in = s C +s C. (6.68) he source-to-gate oltage is just another oltage diider between the equialent gate-source resistance r (=/g m ) and the oerall impedance seen from the transistor s source terminal. Hence, the gate-source transfer function can be found to be s = ( +s ) ( L C ). (6.69) g r + +s( L +r )C Notice that the gate-source transfer function is less than unity, leading to a oltage attenuator. f r is significantly smaller than the oerall impedance attached to the source, then the gate-source oltage gain is almost unity and the circuit behaes as a oltage follower. his property is exploited in many applications such as buffers because the input impedance is ery high. Neertheless, the power is amplified because oltage gain is unity while current with significant gain can be deliered to the load. Finally, the source-to-output transfer function can be obtained as 0 = s LC +s L C. (6.70) he preious equations can be combined to form the oerall amplifier transfer function: 7